VMM, recompiler: Purge deprecated macros.

Spelling.

PGM: Extended the WP0+RO+US hack to include big pages and adjusted some assertions to handle the hack.

Fixed up and enabled Netware WP0+RO+US hack.

PGMAllBth.h: Duh, not >, but <, darn it.

CR0.WP applies to CPL > 3, not just CPL == 0. Sketched out a Netware hack.

Don't call MMHyperIsInsideArea if we're using HM to execute code, it will return bogus results!

VMM: Consistently flush TLB entries for non-present pages.

PGMAllBth.h: Skip a path in Trap0eHandler that hooks into CSAM if CSAM is disabled, avoid some work (like disassembling the instruction).

VMM: Invalidate page even when it's not present now.

Ring-1 compression patches, courtesy of trivirt AG: - main: diff to remove the hwvirt requirement for QNX - rem: diff for dealing with raw ring 0/1 selectors and general changes to allowed guest execution states - vmm: changes for using the guest's TSS selector index as our hypervisor TSS selector (makes str safe) (VBOX_WITH_SAFE_STR ) - vmm: changes for dealing with guest ring 1 code (VBOX_WITH_RAW_RING1) - vmm: change to emulate smsw in RC/R0 (QNX uses this old style instruction a lot so going to qemu for emulation is very expensive) - vmm: change (hack) to kick out patm virtual handlers in case they conflict with guest GDT/TSS write monitors; we should allow multiple handlers per page, but that change would be rather invasive

PGMPool: Eliminated fictive page (except NIL). #6367

header (C) fixes

DBGF,DBGC,++: PVM -> PUVM. Some refactoring and cleanup as well.

VMM: HM cleanup.

VMM: Changed a few ifndef IN_RING0 to ifndef VBOX_WITH_RAW_MODE_NOT_R0.

SELM,DIS,CPUM,EM: Hidden selector register cleanups.

CPUMGetGuestCPL: Drop the context core pointer and use the Guest state in CPUMCPU via pVCpu.

CPUM: Combined the visible and hidden selector register data into one structure. Preparing for lazily resolving+caching of hidden registers in raw-mode.

Doxygen.

Avoid using SELMValidateAndConvertCSAddr+EMInterpretDisasOneEx when possible and call EMInterpretDisasOne instead. Changed EMInterpretDisasOne to use SELMValidateAndConvertCSAddr instead of SELMToFlatEx.

Doxygen.

Doxygen, comment typos.

bugref..

DIS: The start of the scoping exercise... Fixed PREFIX_ADDRSIZE that I just busted in the previous commit.

PGMPool: Adding A20 state to the page pool (partly disabled).

PGMPool: PGMPOOLPAGE adjustments and cleanups, no real code changes intended.

PGM: More A20 fixes.

PGM: A quick stab at correct A20 gate masking (new code is disabled).

SELM: Refactoring (PVM -> PVMCPU).

Introduced VBOX_WITH_REM in Config.kmk and the VMM.

Disabled seemingly harmless assertion.

VMM: don't use generic IPE status codes, use specific ones. Part 1.

PGMAllBth.h: Disabled annoying SMP assertions.

PGMAllBth.h: disabled annoying assertions.

VMM: -Wunused-parameter

VMM: -W4 warnings (MSC).

VMM,INTNET: Addressing unused variable warnings.

PGM: Attempt at fixing the VERR_MAP_FAILED during state save problem on 32-bit hosts when assigning lots of memory to the guest. PGM should lock down guest RAM pages before use and release them afterwards like everyone else. Still quite some stuff left to do there, so I've deviced a little hack for tracking unlocked mappings and using this as input when deciding to do async or sync chunk unmapping at save/load time. See xtracker #5912 and public ticket 7929.

VMM/VT-x: Fix for PAE guests running on 32-bit hosts or 64-bit hosts where VBoxInternal/PGM/MaxRing3Chunks is used.

oooops.

*.kmk: Installation/staging adjustments (kBuild 0.2.0 preps).

PGM: Fixed locking issues in PGMR3PhysMMIORegister and PGMR3PhysMMIODeregister. Also addressed a harmless on in PGMR3PhysRomRegister (only used at init time, so no races). Fortified the code with assertions more lock assertion, replacing the incorrect PGMIsLocked() checks (we only care if the current thread is the lock owner). Cleaned up some ReturnStmt macros and adding more of them.

PGM: Put a TLB in front of the RAM ranges to speed up lookup (disabled).

PGM: Fixed large pages and write monitoring (live snapshot). Added checks for PGM_PAGE_PDE_TYPE_PDE_DISABLED in a few places where only PGM_PAGE_PDE_TYPE_PDE was checked for (might have missed some).

Fix running 64bit guests on 32bit hosts with nested paging

mark the source of the bloat.

warnings (gcc-4.5).

Extra comment

scm cleanup run.

*: spelling fixes, thanks Timeless!

Moved stats around

Cleaned up SyncPageWorker for non-paging modes.

Sync the entire page table for new nested page tables. (partially syncing them doesn't really make sense)

Compile error

Take a shortcut

Oops

Cleaned up a bit

Don't bother checking for virtual handlers in ring-0.

Removed wrong assertion

Optimization

Moved logging and stat

SyncPageWorkerTrackDeref: Use the hint we retrieved from the cached dirty guest PT. Do not reset the modifications counter in InvalidatePage.

scm cleanup

Got rid of unnecessary dirty page flush in InvalidatePage. (NOTE: high risk change)

Updates

Extended dirty page optimization for the pae/32-bit shw/gst combination (disabled).

Typo

Some cleanup

PGMAllBth.h: MMIO opt fix.

Removed X86_PTE_PAE_PG_MASK, renamed X86_PTE_PAE_PG_MASK_FULL to X86_PTE_PAE_PG_MASK.

Changing the remaining X86_PTE_PAE_PG_MASK uses to X86_PTE_PAE_PG_MASK_FULL.

PGMAllBth/SyncPage: Don't assert on stale TLB after W7-64 changed some A bits. Just invalidate the entry and try again.

PGM/SyncPage: To be on the safe side, always sync the target page when doing multiple pages.

Removed GST_PDPE_PG_MASK and renamed GST_PDPE_PG_MASK_FULL to GST_PDPE_PG_MASK.

Changed all X86_PDPE_PG_MASK references to X86_PDPE_PG_MASK_FULL.

x86.h,*: Eliminated X86_PML4E_PG_MASK and renamed X86_PML4E_PG_MASK_FULL to X86_PML4E_PG_MASK.

Changed the remaining X86_PML4E_PG_MASK uses to X86_PML4E_PG_MASK_FULL.

Mostly safe X86_PTE_PAE_PG_MASK -> X86_PTE_PAE_PG_MASK_FULL conversions.

Safe X86_PDPE_PG_MASK -> X86_PDPE_PG_MASK_FULL conversions.

VMM: Removed the PGMR3DumpHierarchyGC/HC functions.

PGM: paging hierarchy dumpers refactoring in progress.

PGM: Don't sync unnecessary PTE bits.

pgmPoolAllocEx/pgmPoolAlloc: Just use pgmPoolAllocEx when you want locking.

PGM: Don't shadow PDE bits 62/3:52 (NXE=1/0), only shadow the bits we need to (exception G, A and D).

PGMAllBth.h: fixed assertion.

PGM: The other w7-64 regression. Trouble is that they're using PTE bits 52:62 for something.

nc

FT: disable large page usage Removed debug code

PGM: Make sure we deploy the MMIO hack on all possible pages. Physical handler stats.

PGM: Addressed a fixme. logging and minor cleanup.

PGM: Wrap up all access to PAE/LM PTEs so that we can treat the invalid entries used by PGM_WITH_MMIO_OPTIMIZATIONS as not-present.

PGMPool: Drop cRefs since it's always 1.

EM: Addressed VBOXSTRICTRC todo from r64673. Decided to only use VBOXSTRICTRC on the methods that would actually return VINF_EM_* stuff.

Compile fix

Wrong check

Extra debug command

PGM,IOM: MMIO optimization - hacking in progress. (still disabled)

PGM,HWACCM: MMIO optimizations - coding in progress.

InvalidatePage: Drop the unused hint here as we'll be releaseing the AutoSet shortly after returning anyway.

PGMAllBth.h: Must pass the RW flag to SyncHandlerPte. Some more logging.

PGM: Replaced the hazzardous raw-mode context dynamic mapping code with the PGMR0DynMap code used by darwin/x86. This is a risky change but it should pay off once stable by providing 100% certainty that dynamically mapped pages aren't resued behind our back (this has been observed in seemingly benign code paths recently).

PGMAllBth.h: Temporarily shut up ugly raw-mode context assertion.

PGM: Some more preparatory cleanup.

PGM: More inline cleanup (prep for tracking dynamic mappings in raw-mode).

PGM: Pass pVCpu instead of pPGM (PPGMCPU) and eliminate PGMPOOL_PAGE_2_PTR_BY_PGM and PGMPOOL_PAGE_2_PTR_BY_PGMCPU.

PGM: If we get to the end of Trap0eHandler it doesn't mean it is a guest fault, but that RT_FAILURE(rc). ASSUMING this always means that it is time for a guru meditation.

PGM: Removed CheckPageFault as it is no longer used. Removed pfn*SyncPage since it is always used directly. Made a few more internal functions static to encourage compiler optimizations.

PGM: cache the last physical handler lookup result in each ring.

PGM: Moved the PGM stats out of the VM structure. Reduces the size of the PGMCPU structure quite a bit.

docs

PGM: #PF stats. Drop the old ones in favor of StatRZTrap0eTime2*. Added a few new stats to that group.

PGM: Moved the code dealing with access handlers out of the #PF function.

PGM: More #PF cleanup, eliminating a few PGMGstGetPage() calls that are unnecessary now.

PGM: Some #PF cleanup, no code change just rearranging and unindenting it a bit.

PGMAllBth.h: Cleaned out the old code.

PGMAllBth.h: Enabled the GstWalk code again as it doesn't seem to make any difference on the tests after all.

PGM: Disabled the GstWalk #PF code.

build fix?

PGM: Use GstWalk in the #PF, part 1.

PGM: Prep for shadowing EFER.NXE and CR4.PSE to avoid function calls.

PGM: A couple of simplifications and optimizations. -assertions

PGM: A couple of simplifications and optimizations.

build fixes.

PGM: Cleanups related to pending MMIO/#PF optimizations. Risky.

PGM: Cleanups related to pending MMIO/#PF optimizations. Risky.

Obsolete pgmLock/Unlock

VMM,REM: Only invalidate hidden registers when using raw-mode. Fixes save restore during mode switching code like the windows boot menu. (#5057)

Too noisy

Shared paging updates

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