SELMAll.cpp revision f091ce66ee934d599f16056078a9a76d7286b959
/* $Id$ */
/** @file
* SELM All contexts.
*/
/*
* Copyright (C) 2006-2012 Oracle Corporation
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*/
/*******************************************************************************
* Header Files *
*******************************************************************************/
#define LOG_GROUP LOG_GROUP_SELM
#include "SELMInternal.h"
/*******************************************************************************
* Global Variables *
*******************************************************************************/
#if defined(LOG_ENABLED) && defined(VBOX_WITH_RAW_MODE_NOT_R0)
/** Segment register names. */
#endif
#ifdef VBOX_WITH_RAW_MODE_NOT_R0
/**
* Converts a GC selector based address to a flat address.
*
* No limit checks are done. Use the SELMToFlat*() or SELMValidate*() functions
* for that.
*
* @returns Flat address.
* @param pVM Pointer to the VM.
* @param Sel Selector part.
* @param Addr Address part.
* @remarks Don't use when in long mode.
*/
{
/** @todo check the limit. */
if (!(Sel & X86_SEL_LDT))
else
{
/** @todo handle LDT pages not present! */
}
}
#endif /* VBOX_WITH_RAW_MODE_NOT_R0 */
/**
* Converts a GC selector based address to a flat address.
*
* No limit checks are done. Use the SELMToFlat*() or SELMValidate*() functions
* for that.
*
* @returns Flat address.
* @param pVM Pointer to the VM.
* @param SelReg Selector register
* @param pCtxCore CPU context
* @param Addr Address part.
*/
{
/*
* Deal with real & v86 mode first.
*/
{
else
}
#ifdef VBOX_WITH_RAW_MODE_NOT_R0
/** @todo when we're in 16 bits mode, we should cut off the address as well?? */
#else
#endif
/* 64 bits mode: CS, DS, ES and SS are treated as if each segment base is 0
(Intel� 64 and IA-32 Architectures Software Developer's Manual: 3.4.2.1). */
{
switch (SelReg)
{
case DISSELREG_FS:
case DISSELREG_GS:
default:
return Addr; /* base 0 */
}
}
/* AMD64 manual: compatibility mode ignores the high 32 bits when calculating an effective address. */
}
/**
* Converts a GC selector based address to a flat address.
*
* Some basic checking is done, but not all kinds yet.
*
* @returns VBox status
* @param pVCpu Pointer to the VMCPU.
* @param SelReg Selector register.
* @param pCtxCore CPU context.
* @param Addr Address part.
* @param fFlags SELMTOFLAT_FLAGS_*
* GDT entires are valid.
* @param ppvGC Where to store the GC flat address.
*/
VMMDECL(int) SELMToFlatEx(PVMCPU pVCpu, DISSELREG SelReg, PCPUMCTXCORE pCtxCore, RTGCPTR Addr, uint32_t fFlags, PRTGCPTR ppvGC)
{
/*
* Fetch the selector first.
*/
/*
* Deal with real & v86 mode first.
*/
{
if (ppvGC)
{
else
}
return VINF_SUCCESS;
}
#ifdef VBOX_WITH_RAW_MODE_NOT_R0
#else
#endif
/* 64 bits mode: CS, DS, ES and SS are treated as if each segment base is 0
(Intel� 64 and IA-32 Architectures Software Developer's Manual: 3.4.2.1). */
bool fCheckLimit = true;
{
fCheckLimit = false;
switch (SelReg)
{
case DISSELREG_FS:
case DISSELREG_GS:
break;
default:
break;
}
}
else
{
/* AMD64 manual: compatibility mode ignores the high 32 bits when calculating an effective address. */
}
/*
* Check type if present.
*/
{
{
/* Read only selector type. */
case X86_SEL_TYPE_RO:
case X86_SEL_TYPE_RO_ACC:
case X86_SEL_TYPE_RW:
case X86_SEL_TYPE_RW_ACC:
case X86_SEL_TYPE_EO:
case X86_SEL_TYPE_EO_ACC:
case X86_SEL_TYPE_ER:
case X86_SEL_TYPE_ER_ACC:
if (!(fFlags & SELMTOFLAT_FLAGS_NO_PL))
{
/** @todo fix this mess */
}
/* check limit. */
return VERR_OUT_OF_SELECTOR_BOUNDS;
/* ok */
if (ppvGC)
return VINF_SUCCESS;
case X86_SEL_TYPE_EO_CONF:
case X86_SEL_TYPE_EO_CONF_ACC:
case X86_SEL_TYPE_ER_CONF:
case X86_SEL_TYPE_ER_CONF_ACC:
if (!(fFlags & SELMTOFLAT_FLAGS_NO_PL))
{
/** @todo fix this mess */
}
/* check limit. */
return VERR_OUT_OF_SELECTOR_BOUNDS;
/* ok */
if (ppvGC)
return VINF_SUCCESS;
case X86_SEL_TYPE_RO_DOWN:
case X86_SEL_TYPE_RO_DOWN_ACC:
case X86_SEL_TYPE_RW_DOWN:
case X86_SEL_TYPE_RW_DOWN_ACC:
if (!(fFlags & SELMTOFLAT_FLAGS_NO_PL))
{
/** @todo fix this mess */
}
/* check limit. */
if (fCheckLimit)
{
return VERR_OUT_OF_SELECTOR_BOUNDS;
return VERR_OUT_OF_SELECTOR_BOUNDS;
}
/* ok */
if (ppvGC)
return VINF_SUCCESS;
default:
return VERR_INVALID_SELECTOR;
}
}
return VERR_SELECTOR_NOT_PRESENT;
}
#ifdef VBOX_WITH_RAW_MODE_NOT_R0
/**
* Converts a GC selector based address to a flat address.
*
* Some basic checking is done, but not all kinds yet.
*
* @returns VBox status
* @param pVCpu Pointer to the VMCPU.
* @param eflags Current eflags
* @param Sel Selector part.
* @param Addr Address part.
* @param fFlags SELMTOFLAT_FLAGS_*
* GDT entires are valid.
* @param ppvGC Where to store the GC flat address.
* @param pcb Where to store the bytes from *ppvGC which can be accessed according to
* the selector. NULL is allowed.
* @remarks Don't use when in long mode.
*/
{
/*
* Deal with real & v86 mode first.
*/
{
if (ppvGC)
if (pcb)
return VINF_SUCCESS;
}
/** @todo when we're in 16 bits mode, we should cut off the address as well?? */
if (!(Sel & X86_SEL_LDT))
{
if ( !(fFlags & SELMTOFLAT_FLAGS_HYPER)
return VERR_INVALID_SELECTOR;
}
else
{
return VERR_INVALID_SELECTOR;
/** @todo handle LDT page(s) not present! */
}
/* calc limit. */
/* calc address assuming straight stuff. */
/* Cut the address to 32 bits. */
pvFlat &= 0xffffffff;
/*
* Check if present.
*/
if (u1Present)
{
/*
* Type check.
*/
#define BOTH(a, b) ((a << 16) | b)
{
/** Read only selector type. */
if (!(fFlags & SELMTOFLAT_FLAGS_NO_PL))
{
/** @todo fix this mess */
}
/* check limit. */
return VERR_OUT_OF_SELECTOR_BOUNDS;
/* ok */
if (ppvGC)
if (pcb)
return VINF_SUCCESS;
if (!(fFlags & SELMTOFLAT_FLAGS_NO_PL))
{
/** @todo fix this mess */
}
/* check limit. */
return VERR_OUT_OF_SELECTOR_BOUNDS;
/* ok */
if (ppvGC)
if (pcb)
return VINF_SUCCESS;
if (!(fFlags & SELMTOFLAT_FLAGS_NO_PL))
{
/** @todo fix this mess */
}
/* check limit. */
return VERR_OUT_OF_SELECTOR_BOUNDS;
return VERR_OUT_OF_SELECTOR_BOUNDS;
/* ok */
if (ppvGC)
if (pcb)
return VINF_SUCCESS;
case BOTH(0,X86_SEL_TYPE_SYS_286_TSS_AVAIL):
case BOTH(0,X86_SEL_TYPE_SYS_LDT):
case BOTH(0,X86_SEL_TYPE_SYS_286_TSS_BUSY):
case BOTH(0,X86_SEL_TYPE_SYS_286_CALL_GATE):
case BOTH(0,X86_SEL_TYPE_SYS_TASK_GATE):
case BOTH(0,X86_SEL_TYPE_SYS_286_INT_GATE):
case BOTH(0,X86_SEL_TYPE_SYS_286_TRAP_GATE):
case BOTH(0,X86_SEL_TYPE_SYS_386_TSS_AVAIL):
case BOTH(0,X86_SEL_TYPE_SYS_386_TSS_BUSY):
case BOTH(0,X86_SEL_TYPE_SYS_386_CALL_GATE):
case BOTH(0,X86_SEL_TYPE_SYS_386_INT_GATE):
case BOTH(0,X86_SEL_TYPE_SYS_386_TRAP_GATE):
if (!(fFlags & SELMTOFLAT_FLAGS_NO_PL))
{
/** @todo fix this mess */
}
/* check limit. */
return VERR_OUT_OF_SELECTOR_BOUNDS;
/* ok */
if (ppvGC)
if (pcb)
return VINF_SUCCESS;
default:
return VERR_INVALID_SELECTOR;
}
}
return VERR_SELECTOR_NOT_PRESENT;
}
#endif /* VBOX_WITH_RAW_MODE_NOT_R0 */
#ifdef VBOX_WITH_RAW_MODE_NOT_R0
{
/*
* Try read the entry.
*/
if (RT_FAILURE(rc))
{
Log(("SELMLoadHiddenSelectorReg: Error reading descriptor %s=%#x: %Rrc\n", g_aszSRegNms[iSReg], Sel, rc));
return;
}
/*
* Validate it and load it.
*/
{
Log(("SELMLoadHiddenSelectorReg: Guest table entry is no good (%s=%#x): %.8Rhxs\n", g_aszSRegNms[iSReg], Sel, &GstDesc));
return;
}
Log(("SELMLoadHiddenSelectorReg: loaded %s=%#x:{b=%llx, l=%x, a=%x, vs=%x} (gst)\n",
}
/**
* CPUM helper that loads the hidden selector register from the descriptor table
* when executing with raw-mode.
*
* @remarks This is only used when in legacy protected mode!
*
* @param pVCpu Pointer to the current virtual CPU.
* @param pCtx The guest CPU context.
* @param pSReg The selector register.
*
* @todo Deal 100% correctly with stale selectors. What's more evil is
* invalid page table entries, which isn't impossible to imagine for
* LDT entries for instance, though unlikely. Currently, we turn a
* blind eye to these issues and return the old hidden registers,
* though we don't set the valid flag, so that we'll try loading them
* over and over again till we succeed loading something.
*/
{
/*
* Get the shadow descriptor table entry and validate it.
* Should something go amiss, try the guest table.
*/
if (!(Sel & X86_SEL_LDT))
{
/** @todo this shall not happen, we shall check for these things when executing
* LGDT */
{
selLoadHiddenSelectorRegFromGuestTable(pVCpu, pCtx, pSReg, pCtx->gdtr.pGdt + (Sel & X86_SEL_MASK), Sel, iSReg);
return;
}
}
else
{
/** @todo this shall not happen, we shall check for these things when executing
* LLDT */
pShwDesc = (PCX86DESC)((uintptr_t)pVM->selm.s.CTX_SUFF(pvLdt) + pVM->selm.s.offLdtHyper + (Sel & X86_SEL_MASK));
{
selLoadHiddenSelectorRegFromGuestTable(pVCpu, pCtx, pSReg, pCtx->ldtr.u64Base + (Sel & X86_SEL_MASK), Sel, iSReg);
return;
}
}
/*
* All fine, load it.
*/
Log(("SELMLoadHiddenSelectorReg: loaded %s=%#x:{b=%llx, l=%x, a=%x, vs=%x} (shw)\n",
}
#endif /* VBOX_WITH_RAW_MODE_NOT_R0 */
/**
* Validates and converts a GC selector based code address to a flat
* address when in real or v8086 mode.
*
* @returns VINF_SUCCESS.
* @param pVCpu Pointer to the VMCPU.
* @param SelCS Selector part.
* @param pHidCS The hidden CS register part. Optional.
* @param Addr Address part.
* @param ppvFlat Where to store the flat address.
*/
DECLINLINE(int) selmValidateAndConvertCSAddrRealMode(PVMCPU pVCpu, RTSEL SelCS, PCCPUMSELREGHID pSReg, RTGCPTR Addr,
{
else
return VINF_SUCCESS;
}
#ifdef VBOX_WITH_RAW_MODE_NOT_R0
/**
* Validates and converts a GC selector based code address to a flat address
*
* @returns VBox status code.
* @param pVM Pointer to the VM.
* @param pVCpu Pointer to the VMCPU.
* @param SelCPL Current privilege level. Get this from SS - CS might be
* conforming! A full selector can be passed, we'll only
* use the RPL part.
* @param SelCS Selector part.
* @param Addr Address part.
* @param ppvFlat Where to store the flat address.
* @param pcBits Where to store the segment bitness (16/32/64). Optional.
*/
DECLINLINE(int) selmValidateAndConvertCSAddrRawMode(PVM pVM, PVMCPU pVCpu, RTSEL SelCPL, RTSEL SelCS, RTGCPTR Addr,
{
/** @todo validate limit! */
if (!(SelCS & X86_SEL_LDT))
else
{
/** @todo handle LDT page(s) not present! */
}
/*
* Check if present.
*/
{
/*
* Type check.
*/
{
/*
* Check level.
*/
)
{
/*
* Limit check.
*/
{
/* Cut the address to 32 bits. */
*ppvFlat &= 0xffffffff;
if (pcBits)
return VINF_SUCCESS;
}
return VERR_OUT_OF_SELECTOR_BOUNDS;
}
return VERR_INVALID_RPL;
}
return VERR_NOT_CODE_SELECTOR;
}
return VERR_SELECTOR_NOT_PRESENT;
}
#endif /* VBOX_WITH_RAW_MODE_NOT_R0 */
/**
* Validates and converts a GC selector based code address to a flat address
*
* @returns VBox status code.
* @param pVCpu Pointer to the VMCPU.
* @param SelCPL Current privilege level. Get this from SS - CS might be
* conforming! A full selector can be passed, we'll only
* use the RPL part.
* @param SelCS Selector part.
* @param pSRegCS The full CS selector register.
* @param ppvFlat Where to store the flat address upon successful return.
*/
DECLINLINE(int) selmValidateAndConvertCSAddrHidden(PVMCPU pVCpu, RTSEL SelCPL, RTSEL SelCS, PCCPUMSELREGHID pSRegCS,
{
/*
* Check if present.
*/
{
/*
* Type check.
*/
{
/*
* Check level.
*/
)
{
/* 64 bits mode: CS, DS, ES and SS are treated as if each segment base is 0
(Intel� 64 and IA-32 Architectures Software Developer's Manual: 3.4.2.1). */
{
return VINF_SUCCESS;
}
/*
* Limit check. Note that the limit in the hidden register is the
* final value. The granularity bit was included in its calculation.
*/
{
return VINF_SUCCESS;
}
return VERR_OUT_OF_SELECTOR_BOUNDS;
}
Log(("selmValidateAndConvertCSAddrHidden: Invalid RPL Attr.n.u4Type=%x cpl=%x dpl=%x\n",
return VERR_INVALID_RPL;
}
return VERR_NOT_CODE_SELECTOR;
}
return VERR_SELECTOR_NOT_PRESENT;
}
/**
* Validates and converts a GC selector based code address to a flat address.
*
* @returns VBox status code.
* @param pVCpu Pointer to the VMCPU.
* @param Efl Current EFLAGS.
* @param SelCPL Current privilege level. Get this from SS - CS might be
* conforming! A full selector can be passed, we'll only
* use the RPL part.
* @param SelCS Selector part.
* @param pSRegCS The full CS selector register.
* @param ppvFlat Where to store the flat address upon successful return.
*/
VMMDECL(int) SELMValidateAndConvertCSAddr(PVMCPU pVCpu, X86EFLAGS Efl, RTSEL SelCPL, RTSEL SelCS, PCPUMSELREG pSRegCS,
{
#ifdef VBOX_WITH_RAW_MODE_NOT_R0
/* Use the hidden registers when possible, updating them if outdate. */
if (!pSRegCS)
return selmValidateAndConvertCSAddrRawMode(pVCpu->CTX_SUFF(pVM), pVCpu, SelCPL, SelCS, Addr, ppvFlat, NULL);
/* Undo ring compression. */
SelCPL &= ~X86_SEL_RPL;
SelCS &= ~X86_SEL_RPL;
#else
#endif
}
/**
* Returns Hypervisor's Trap 08 (\#DF) selector.
*
* @returns Hypervisor's Trap 08 (\#DF) selector.
* @param pVM Pointer to the VM.
*/
{
}
/**
* Sets EIP of Hypervisor's Trap 08 (\#DF) TSS.
*
* @param pVM Pointer to the VM.
* @param u32EIP EIP of Trap 08 handler.
*/
{
}
/**
* Sets ss:esp for ring1 in main Hypervisor's TSS.
*
* @param pVM Pointer to the VM.
* @param ss Ring1 SS register value. Pass 0 if invalid.
* @param esp Ring1 ESP register value.
*/
{
}
#ifdef VBOX_WITH_RAW_MODE_NOT_R0
/**
* Gets ss:esp for ring1 in main Hypervisor's TSS.
*
* Returns SS=0 if the ring-1 stack isn't valid.
*
* @returns VBox status code.
* @param pVM Pointer to the VM.
* @param pSS Ring1 SS register value.
* @param pEsp Ring1 ESP register value.
*/
{
{
int rc;
# ifdef IN_RC
bool fTriedAlready = false;
# ifdef DEBUG
# endif
if (RT_FAILURE(rc))
{
if (!fTriedAlready)
{
/* Shadow page might be out of sync. Sync and try again */
/** @todo might cross page boundary */
fTriedAlready = true;
if (rc != VINF_SUCCESS)
return rc;
goto l_tryagain;
}
return rc;
}
# else /* !IN_RC */
/* Reading too much. Could be cheaper than two separate calls though. */
if (RT_FAILURE(rc))
{
return rc;
}
# endif /* !IN_RC */
# ifdef LOG_ENABLED
ssr0 &= ~1;
# endif
/* Update our TSS structure for the guest's ring 1 stack */
}
return VINF_SUCCESS;
}
#endif /* VBOX_WITH_RAW_MODE_NOT_R0 */
/**
* Returns Guest TSS pointer
*
* @returns Pointer to the guest TSS, RTRCPTR_MAX if not being monitored.
* @param pVM Pointer to the VM.
*/
{
}
#ifdef VBOX_WITH_RAW_MODE_NOT_R0
/**
* Gets the hypervisor code selector (CS).
* @returns CS selector.
* @param pVM Pointer to the VM.
*/
{
}
/**
* Gets the 64-mode hypervisor code selector (CS64).
* @returns CS selector.
* @param pVM Pointer to the VM.
*/
{
}
/**
* Gets the hypervisor data selector (DS).
* @returns DS selector.
* @param pVM Pointer to the VM.
*/
{
}
/**
* Gets the hypervisor TSS selector.
* @returns TSS selector.
* @param pVM Pointer to the VM.
*/
{
}
/**
* Gets the hypervisor TSS Trap 8 selector.
* @returns TSS Trap 8 selector.
* @param pVM Pointer to the VM.
*/
{
}
/**
* Gets the address for the hypervisor GDT.
*
* @returns The GDT address.
* @param pVM Pointer to the VM.
* @remark This is intended only for very special use, like in the world
* switchers. Don't exploit this API!
*/
{
/*
* Always convert this from the HC pointer since we can be
* called before the first relocation and have to work correctly
* without having dependencies on the relocation order.
*/
}
#endif /* VBOX_WITH_RAW_MODE_NOT_R0 */
/**
* Gets info about the current TSS.
*
* @returns VBox status code.
* @retval VINF_SUCCESS if we've got a TSS loaded.
* @retval VERR_SELM_NO_TSS if we haven't got a TSS (rather unlikely).
*
* @param pVM Pointer to the VM.
* @param pVCpu Pointer to the VMCPU.
* @param pGCPtrTss Where to store the TSS address.
* @param pcbTss Where to store the TSS size limit.
* @param pfCanHaveIOBitmap Where to store the can-have-I/O-bitmap indicator. (optional)
*/
VMMDECL(int) SELMGetTSSInfo(PVM pVM, PVMCPU pVCpu, PRTGCUINTPTR pGCPtrTss, PRTGCUINTPTR pcbTss, bool *pfCanHaveIOBitmap)
{
/*
* The TR hidden register is always valid.
*/
if (!(tr & X86_SEL_MASK_OFF_RPL))
return VERR_SELM_NO_TSS;
if (pfCanHaveIOBitmap)
return VINF_SUCCESS;
}
/**
* Notification callback which is called whenever there is a chance that a CR3
* value might have changed.
* This is called by PGM.
*
* @param pVM Pointer to the VM.
* @param pVCpu Pointer to the VMCPU.
*/
{
/** @todo SMP support!! */
}