DBGFDisas.cpp revision e17f587595bd5d3a7be56a892e3fd3a0ef83d268
/* $Id$ */
/** @file
* DBGF - Debugger Facility, Disassembler.
*/
/*
* Copyright (C) 2006-2007 Sun Microsystems, Inc.
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
* Clara, CA 95054 USA or visit http://www.sun.com if you need
* additional information or have any questions.
*/
/*******************************************************************************
* Header Files *
*******************************************************************************/
#define LOG_GROUP LOG_GROUP_DBGF
#include "DBGFInternal.h"
/*******************************************************************************
* Structures and Typedefs *
*******************************************************************************/
/**
* Structure used when disassembling and instructions in DBGF.
* This is used so the reader function can get the stuff it needs.
*/
typedef struct
{
/** The core structure. */
/** The VM handle. */
/** The VMCPU handle. */
/** The address space for resolving symbol. */
/** Pointer to the first byte in the segemnt. */
/** Pointer to the byte after the end of the segment. (might have wrapped!) */
/** The size of the segment minus 1. */
/** The guest paging mode. */
/** Pointer to the current page - R3 Ptr. */
void const *pvPageR3;
/** Pointer to the current page - GC Ptr. */
/** Pointer to the next instruction (relative to GCPtrSegBase). */
/** The lock information that PGMPhysReleasePageMappingLock needs. */
/** Whether the PageMapLock is valid or not. */
bool fLocked;
/** 64 bits mode or not. */
bool f64Bits;
/*******************************************************************************
* Internal Functions *
*******************************************************************************/
static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTUINTPTR pSrc, uint8_t *pDest, uint32_t size, void *pvUserdata);
/**
* Calls the dissassembler with the proper reader functions and such for disa
*
* @returns VBox status code.
* @param pVM VM handle
* @param pVCpu VMCPU handle
* @param pSelInfo The selector info.
* @param enmMode The guest paging mode.
* @param GCPtr The GC pointer (selector offset).
* @param pState The disas CPU state.
*/
static int dbgfR3DisasInstrFirst(PVM pVM, PVMCPU pVCpu, PDBGFSELINFO pSelInfo, PGMMODE enmMode, RTGCPTR GCPtr, PDBGFDISASSTATE pState)
{
pState->hAs = pSelInfo->fFlags & DBGFSELINFO_FLAGS_HYPER /** @todo Deal more explicitly with RC in DBGFR3Disas*. */
&cbInstr);
if (RT_SUCCESS(rc))
{
return VINF_SUCCESS;
}
/* cleanup */
{
}
return rc;
}
#if 0
/**
* Calls the dissassembler for disassembling the next instruction.
*
* @returns VBox status code.
* @param pState The disas CPU state.
*/
{
if (RT_SUCCESS(rc))
{
return VINF_SUCCESS;
}
return rc;
}
#endif
/**
* Done with the dissassembler state, free associated resources.
*
* @param pState The disas CPU state ++.
*/
{
{
}
}
/**
* Instruction reader.
*
* @returns VBox status code. (Why this is a int32_t and not just an int is also beyond me.)
* @param PtrSrc Address to read from.
* In our case this is relative to the selector pointed to by the 2nd user argument of uDisCpu.
* @param pu8Dst Where to store the bytes.
* @param cbRead Number of bytes to read.
* @param uDisCpu Pointer to the disassembler cpu state. (Why this is a VBOXHUINTPTR is beyond me...)
* In this context it's always pointer to the Core of a DBGFDISASSTATE.
*/
static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTUINTPTR PtrSrc, uint8_t *pu8Dst, uint32_t cbRead, void *pvDisCpu)
{
for (;;)
{
/* Need to update the page translation? */
{
int rc = VINF_SUCCESS;
/* translate the address */
{
}
else
{
rc = PGMPhysGCPhys2CCPtrReadOnly(pState->pVM, pState->pvPageGC, &pState->pvPageR3, &pState->PageMapLock);
else
rc = PGMPhysGCPtr2CCPtrReadOnly(pState->pVCpu, pState->pvPageGC, &pState->pvPageR3, &pState->PageMapLock);
}
if (RT_FAILURE(rc))
{
return rc;
}
}
/* check the segemnt limit */
return VERR_OUT_OF_SELECTOR_BOUNDS;
/* calc how much we can read */
{
}
/* read and advance */
if (!cbRead)
return VINF_SUCCESS;
}
}
/**
* @copydoc FNDISGETSYMBOL
*/
static DECLCALLBACK(int) dbgfR3DisasGetSymbol(PCDISCPUSTATE pCpu, uint32_t u32Sel, RTUINTPTR uAddress, char *pszBuf, size_t cchBuf, RTINTPTR *poff, void *pvUser)
{
int rc;
if ( DIS_FMT_SEL_IS_REG(u32Sel)
{
if (RT_SUCCESS(rc))
}
else
if (RT_SUCCESS(rc))
{
}
return rc;
}
/**
* Disassembles the one instruction according to the specified flags and
* address, internal worker executing on the EMT of the specified virtual CPU.
*
* @returns VBox status code.
* @param pVM The VM handle.
* @param pVCpu The virtual CPU handle.
* @param Sel The code selector. This used to determin the 32/16 bit ness and
* calculation of the actual instruction address.
* @param pGCPtr Pointer to the variable holding the code address
* relative to the base of Sel.
* @param fFlags Flags controlling where to start and how to format.
* A combination of the DBGF_DISAS_FLAGS_* \#defines.
* @param pszOutput Output buffer.
* @param cchOutput Size of the output buffer.
* @param pcbInstr Where to return the size of the instruction.
*/
static DECLCALLBACK(int)
{
/*
* Get the Sel and GCPtr if fFlags requests that.
*/
int rc;
{
else
}
/*
* Read the selector info - assume no stale selectors and nasty stuff like that.
* Since the selector flags in the CPUMCTX structures aren't up to date unless
* we recently visited REM, we'll not search for the selector there.
*/
bool fRealModeAddress = false;
if ( pHiddenSel
{
}
else if (Sel == DBGF_SEL_FLAT)
{
: enmMode != PGMMODE_REAL
if (CPUMAreHiddenSelRegsValid(pVM))
{ /* Assume the current CS defines the execution mode. */
}
else
{
}
}
else if ( !(fFlags & DBGF_DISAS_FLAGS_CURRENT_HYPER)
|| enmMode == PGMMODE_REAL) )
{ /* V86 mode or real mode - real mode addressing */
fRealModeAddress = true;
}
else
{
if (RT_FAILURE(rc))
{
return rc;
}
}
/*
* Disassemble it.
*/
if (RT_FAILURE(rc))
{
return rc;
}
/*
* Format it.
*/
char szBuf[512];
&SelInfo);
/*
* Print it to the user specified buffer.
*/
if (fFlags & DBGF_DISAS_FLAGS_NO_BYTES)
{
else if (fRealModeAddress)
else if (Sel == DBGF_SEL_FLAT)
{
if (enmMode >= PGMMODE_AMD64)
else
}
else
{
if (enmMode >= PGMMODE_AMD64)
else
}
}
else
{
szBuf);
else if (fRealModeAddress)
szBuf);
else if (Sel == DBGF_SEL_FLAT)
{
if (enmMode >= PGMMODE_AMD64)
szBuf);
else
szBuf);
}
else
{
if (enmMode >= PGMMODE_AMD64)
szBuf);
else
szBuf);
}
}
if (pcbInstr)
return VINF_SUCCESS;
}
/**
* Disassembles the one instruction according to the specified flags and address.
*
* @returns VBox status code.
* @param pVM VM handle.
* @param idCpu The ID of virtual CPU.
* @param Sel The code selector. This used to determin the 32/16 bit ness and
* calculation of the actual instruction address.
* @param GCPtr The code address relative to the base of Sel.
* @param fFlags Flags controlling where to start and how to format.
* A combination of the DBGF_DISAS_FLAGS_* \#defines.
* @param pszOutput Output buffer.
* @param cchOutput Size of the output buffer.
* @param pcbInstr Where to return the size of the instruction.
*
* @remarks May have to switch to the EMT of the virtual CPU in order to do
* address conversion.
*/
VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, VMCPUID idCpu, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags,
{
/*
* Optimize the common case where we're called on the EMT of idCpu since
* we're using this all the time when logging.
*/
int rc;
if ( pVCpu
else
{
if (RT_SUCCESS(rc))
{
}
}
return rc;
}
/**
* Disassembles the current guest context instruction.
* All registers and data will be displayed. Addresses will be attempted resolved to symbols.
*
* @returns VBox status code.
* @param pVCpu VMCPU handle.
* @param pszOutput Output buffer.
* @param cchOutput Size of the output buffer.
*/
{
*pszOutput = '\0';
}
/**
* Disassembles the current guest context instruction and writes it to the log.
* All registers and data will be displayed. Addresses will be attempted resolved to symbols.
*
* @returns VBox status code.
* @param pVCpu VMCPU handle.
* @param pszPrefix Short prefix string to the dissassembly string. (optional)
*/
{
char szBuf[256];
szBuf[0] = '\0';
if (RT_FAILURE(rc))
else
return rc;
}
/**
* Disassembles the specified guest context instruction and writes it to the log.
* Addresses will be attempted resolved to symbols.
*
* @returns VBox status code.
* @param pVM VM handle.
* @param pVCpu The virtual CPU handle, defaults to CPU 0 if NULL.
* @param Sel The code selector. This used to determin the 32/16 bit-ness and
* calculation of the actual instruction address.
* @param GCPtr The code address relative to the base of Sel.
*/
{
char szBuf[256];
szBuf[0] = '\0';
int rc = DBGFR3DisasInstrEx(pVCpu->pVMR3, pVCpu->idCpu, Sel, GCPtr, 0, &szBuf[0], sizeof(szBuf), NULL);
if (RT_FAILURE(rc))
RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrLog(, %RTsel, %RGv) failed with rc=%Rrc\n", Sel, GCPtr, rc);
return rc;
}