tstMicro.h revision 2af0dd14e6c1c9297537694bd8ff24ae5838620c
/* $Id$ */
/** @file
* Micro Testcase, profiling special CPU operations.
*/
/*
* Copyright (C) 2006-2007 Sun Microsystems, Inc.
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
* Clara, CA 95054 USA or visit http://www.sun.com if you need
* additional information or have any questions.
*/
#ifndef ___tstMicro_h
#define ___tstMicro_h
/**
* The testcase identifier.
*/
typedef enum TSTMICROTEST
{
/** The max testcase. */
} TSTMICROTEST;
/**
*
*/
typedef struct TSTMICRORESULT
{
/** The total number of ticks spent executing the testcase.
* This may include extra overhead stuff if we're weird stuff during trap handler. */
/** Number of ticks spent getting into Rx from R0.
* This will include time spent setting up the testcase in R3. */
/** Number of ticks spent executing the trap.
* I.e. from right before trapping instruction to the start of the trap handler.
* This does not apply to testcases which doesn't trap. */
/** Number of ticks spent resuming Rx executing after a trap.
* This does not apply to testcases which doesn't trap. */
/** Number of ticks to get to back to r0 after resuming the trapped code.
* This does not apply to testcases which doesn't trap. */
/**
* Micro profiling testcase
*/
typedef struct TSTMICRO
{
/** The RC address of this structure. */
/** Just for proper alignment. */
/** TSC sampled right before leaving R0. */
/** TSC sampled right before the exception. */
/** TSC sampled right after entering the trap handler. */
/** TSC sampled right before exitting the trap handler. */
/** TSC sampled right after resuming guest trap. */
/** TSC sampled right after re-entering R0. */
/** Number of times entered (should be one). */
/** Advance EIP. */
/** The last CR3 code. */
/** The last error code. */
/** The last trap eip. */
/** The original IDT address and limit. */
/** Our IDT. */
/** The overhead for the rdtsc + 2 xchg instr. */
/** The testresults. */
/** Ring-3 stack. */
DECLASM(void) tstTrapHandlerNoErr(void);
DECLASM(void) tstTrapHandler(void);
DECLASM(void) tstInterrupt42(void);
#endif