mm.h revision 6d299e273a1b143cbe6e66cc7810f73ba0cd9488
/** @file
* MM - The Memory Manager.
*/
/*
* Copyright (C) 2006-2007 Sun Microsystems, Inc.
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*
* The contents of this file may alternatively be used under the terms
* of the Common Development and Distribution License Version 1.0
* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
* VirtualBox OSE distribution, in which case the provisions of the
* CDDL are applicable instead of those of the GPL.
*
* You may elect to license modified versions of this file under the
* terms and conditions of either the GPL or the CDDL or both.
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
* Clara, CA 95054 USA or visit http://www.sun.com if you need
* additional information or have any questions.
*/
#ifndef ___VBox_mm_h
#define ___VBox_mm_h
/** @defgroup grp_mm The Memory Manager API
* @{
*/
/** @name RAM Page Flags
* Since internal ranges have a byte granularity it's possible for a
* page be flagged for several uses. The access virtualization in PGM
* will choose the most restricted one and use EM to emulate access to
* the less restricted areas of the page.
*
* Bits 0-11 only since they are fitted into the offset part of a physical memory address.
* @{
*/
#if 1
/** Reserved - Not RAM, ROM nor MMIO2.
* If this bit is cleared the memory is assumed to be some kind of RAM.
* Normal MMIO may set it but that depends on whether the RAM range was
* created specially for the MMIO or not.
*
* @remarks The current implementation will always reserve backing
* memory for reserved ranges to simplify things.
*/
#define MM_RAM_FLAGS_RESERVED RT_BIT(0)
/** ROM - Read Only Memory.
* The page have a HC physical address which contains the BIOS code. All write
* access is trapped and ignored.
*
* HACK: Writable shadow ROM is indicated by both ROM and MMIO2 being
* set. (We're out of bits.)
*/
/** MMIO - Memory Mapped I/O.
* All access is trapped and emulated. No physical backing is required, but
* might for various reasons be present.
*/
/** MMIO2 - Memory Mapped I/O, variation 2.
* The virtualization is performed using real memory and only catching
* a few accesses for like keeping track for dirty pages.
* @remark Involved in the shadow ROM hack.
*/
#endif
#ifndef VBOX_WITH_NEW_PHYS_CODE
/** Physical backing memory is allocated dynamically. Not set implies a one time static allocation. */
#endif /* !VBOX_WITH_NEW_PHYS_CODE */
/** The shift used to get the reference count. */
#define MM_RAM_FLAGS_CREFS_SHIFT 62
/** The mask applied to the the page pool idx after using MM_RAM_FLAGS_CREFS_SHIFT to shift it down. */
#define MM_RAM_FLAGS_CREFS_MASK 0x3
/** The (shifted) cRef value used to indiciate that the idx is the head of a
* physical cross reference extent list. */
/** The shift used to get the page pool idx. (Apply MM_RAM_FLAGS_IDX_MASK to the result when shifting down). */
#define MM_RAM_FLAGS_IDX_SHIFT 48
/** The mask applied to the the page pool idx after using MM_RAM_FLAGS_IDX_SHIFT to shift it down. */
#define MM_RAM_FLAGS_IDX_MASK 0x3fff
/** The idx value when we're out of of extents or there are simply too many mappings of this page. */
/** Mask for masking off any references to the page. */
/** @} */
#ifndef VBOX_WITH_NEW_PHYS_CODE
/** @name MMR3PhysRegisterEx registration type
* @{
*/
typedef enum
{
/** Normal physical region (flags specify exact page type) */
MM_PHYS_TYPE_NORMAL = 0,
/** Allocate part of a dynamically allocated physical region */
MM_PHYS_TYPE_32BIT_HACK = 0x7fffffff
} MMPHYSREG;
/** @} */
#endif
/**
* Memory Allocation Tags.
* For use with MMHyperAlloc(), MMR3HeapAlloc(), MMR3HeapAllocEx(),
* MMR3HeapAllocZ() and MMR3HeapAllocZEx().
*
* @remark Don't forget to update the dump command in MMHeap.cpp!
*/
typedef enum MMTAG
{
MM_TAG_INVALID = 0,
MM_TAG_32BIT_HACK = 0x7fffffff
} MMTAG;
/** @defgroup grp_mm_hyper Hypervisor Memory Management
* @ingroup grp_mm
* @{ */
#ifndef IN_RING0
#endif
#ifndef IN_RING3
#else
{
return R3Ptr;
}
#endif
#ifndef IN_GC
#else
{
return (void *)RCPtr;
}
#endif
#ifndef IN_RING3
#else
{
return pv;
}
#endif
#ifndef IN_RING0
#else
{
return pv;
}
#endif
#ifndef IN_GC
#else
{
}
#endif
#ifdef IN_GC
#else
{
}
#endif
#ifdef DEBUG
#endif
/** @def MMHYPER_RC_ASSERT_RCPTR
* Asserts that an address is either NULL or inside the hypervisor memory area.
* This assertion only works while IN_GC, it's a NOP everywhere else.
* @thread The Emulation Thread.
*/
#ifdef IN_GC
# define MMHYPER_RC_ASSERT_RCPTR(pVM, RCPtr) Assert(MMHyperIsInsideArea((pVM), (RTRCUINTPTR)(RCPtr)) || !(RCPtr))
#else
#endif
/** @} */
#ifdef IN_RING3
/** @defgroup grp_mm_r3 The MM Host Context Ring-3 API
* @ingroup grp_mm
* @{
*/
/** @defgroup grp_mm_r3_hyper Hypervisor Memory Manager (HC R3 Portion)
* @ingroup grp_mm_r3
* @{ */
MMDECL(int) MMR3HyperAllocOnceNoRel(PVM pVM, size_t cb, uint32_t uAlignment, MMTAG enmTag, void **ppv);
MMR3DECL(int) MMR3HyperMapHCPhys(PVM pVM, void *pvHC, RTHCPHYS HCPhys, size_t cb, const char *pszDesc, PRTGCPTR pGCPtr);
MMR3DECL(int) MMR3HyperMapGCPhys(PVM pVM, RTGCPHYS GCPhys, size_t cb, const char *pszDesc, PRTGCPTR pGCPtr);
MMR3DECL(int) MMR3HyperMapMMIO2(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr);
MMR3DECL(int) MMR3HyperMapHCRam(PVM pVM, void *pvHC, size_t cb, bool fFree, const char *pszDesc, PRTGCPTR pGCPtr);
MMR3DECL(int) MMR3HyperMapPages(PVM pVM, void *pvR3, RTR0PTR pvR0, size_t cPages, PCSUPPAGE paPages, const char *pszDesc, PRTGCPTR pGCPtr);
/** @} */
/** @defgroup grp_mm_phys Guest Physical Memory Manager
* @ingroup grp_mm_r3
* @{ */
MMR3DECL(int) MMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, unsigned cb, unsigned fFlags, const char *pszDesc);
#ifndef VBOX_WITH_NEW_PHYS_CODE
MMR3DECL(int) MMR3PhysRegisterEx(PVM pVM, void *pvRam, RTGCPHYS GCPhys, unsigned cb, unsigned fFlags, MMPHYSREG enmType, const char *pszDesc);
#endif
MMR3DECL(int) MMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc);
/** @} */
/** @defgroup grp_mm_page Physical Page Pool
* @ingroup grp_mm_r3
* @{ */
/** @} */
/** @defgroup grp_mm_heap Heap Manager
* @ingroup grp_mm_r3
* @{ */
/** @} */
/** @} */
#endif /* IN_RING3 */
#ifdef IN_GC
/** @defgroup grp_mm_gc The MM Guest Context API
* @ingroup grp_mm
* @{
*/
/** @} */
#endif /* IN_GC */
/** @} */
#endif