#define PGM_SAVED_STATE_VERSION 5

#define LOG_GROUP LOG_GROUP_PGM

#include <VBox/dbgf.h>

#include <VBox/pgm.h>

#include <VBox/cpum.h>

#include <VBox/iom.h>

#include <VBox/sup.h>

#include <VBox/mm.h>

#include <VBox/pdm.h>

#include <VBox/em.h>

#include <VBox/stam.h>

#include <VBox/rem.h>

#include <VBox/dbgf.h>

#include <VBox/rem.h>

#include <VBox/selm.h>

#include <VBox/ssm.h>

#include "PGMInternal.h"

#include <VBox/vm.h>

#include <VBox/dbg.h>

#include <VBox/hwaccm.h>

#include <VBox/log.h>

#include <iprt/assert.h>

#include <iprt/alloc.h>

#include <iprt/asm.h>

#include <iprt/thread.h>

#include <iprt/string.h>

#include <VBox/param.h>

#include <VBox/err.h>

static int pgmR3InitPaging(PVM pVM);

static DECLCALLBACK(void) pgmR3PhysInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);

static DECLCALLBACK(void) pgmR3InfoMode(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);

static DECLCALLBACK(void) pgmR3InfoCr3(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);

static DECLCALLBACK(int) pgmR3RelocatePhysHandler(PAVLROGCPHYSNODECORE pNode, void *pvUser);

static DECLCALLBACK(int) pgmR3RelocateVirtHandler(PAVLROGCPTRNODECORE pNode, void *pvUser);

static DECLCALLBACK(int) pgmR3Save(PVM pVM, PSSMHANDLE pSSM);

static DECLCALLBACK(int) pgmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version);

static int pgmR3ModeDataInit(PVM pVM, bool fResolveGCAndR0);

static void pgmR3ModeDataSwitch(PVM pVM, PGMMODE enmShw, PGMMODE enmGst);

static PGMMODE pgmR3CalcShadowMode(PGMMODE enmGuestMode, SUPPAGINGMODE enmHostMode, PGMMODE enmShadowMode, VMMSWITCHER *penmSwitcher);

#ifdef VBOX_WITH_STATISTICS

static void pgmR3InitStats(PVM pVM);

#endif

#ifdef VBOX_WITH_DEBUGGER

static DECLCALLBACK(int) pgmR3CmdRam(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs, PDBGCVAR pResult);

static DECLCALLBACK(int) pgmR3CmdMap(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs, PDBGCVAR pResult);

static DECLCALLBACK(int) pgmR3CmdSync(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs, PDBGCVAR pResult);

static DECLCALLBACK(int) pgmR3CmdSyncAlways(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs, PDBGCVAR pResult);

#endif

#ifdef VBOX_WITH_DEBUGGER

static const DBGCCMD g_aCmds[] =

{

/* pszCmd, cArgsMin, cArgsMax, paArgDesc, cArgDescs, pResultDesc, fFlags, pfnHandler pszSyntax, ....pszDescription */

{ "pgmram", 0, 0, NULL, 0, NULL, 0, pgmR3CmdRam, "", "Display the ram ranges." },

{ "pgmmap", 0, 0, NULL, 0, NULL, 0, pgmR3CmdMap, "", "Display the mapping ranges." },

{ "pgmsync", 0, 0, NULL, 0, NULL, 0, pgmR3CmdSync, "", "Sync the CR3 page." },

{ "pgmsyncalways", 0, 0, NULL, 0, NULL, 0, pgmR3CmdSyncAlways, "", "Toggle permanent CR3 syncing." },

};

#endif

#if 1/// @todo ndef __AMD64__

#define PGM_SHW_TYPE PGM_TYPE_32BIT

#define PGM_SHW_NAME(name) PGM_SHW_NAME_32BIT(name)

#define PGM_SHW_NAME_GC_STR(name) PGM_SHW_NAME_GC_32BIT_STR(name)

#define PGM_SHW_NAME_R0_STR(name) PGM_SHW_NAME_R0_32BIT_STR(name)

#include "PGMShw.h"

#define PGM_GST_TYPE PGM_TYPE_REAL

#define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name)

#define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_REAL_STR(name)

#define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_REAL_STR(name)

#define PGM_BTH_NAME(name) PGM_BTH_NAME_32BIT_REAL(name)

#define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_32BIT_REAL_STR(name)

#define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_32BIT_REAL_STR(name)

#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_32BIT_PT_FOR_PHYS

#include "PGMGst.h"

#include "PGMBth.h"

#undef BTH_PGMPOOLKIND_PT_FOR_PT

#undef PGM_BTH_NAME

#undef PGM_BTH_NAME_GC_STR

#undef PGM_BTH_NAME_R0_STR

#undef PGM_GST_TYPE

#undef PGM_GST_NAME

#undef PGM_GST_NAME_GC_STR

#undef PGM_GST_NAME_R0_STR

#define PGM_GST_TYPE PGM_TYPE_PROT

#define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name)

#define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_PROT_STR(name)

#define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_PROT_STR(name)

#define PGM_BTH_NAME(name) PGM_BTH_NAME_32BIT_PROT(name)

#define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_32BIT_PROT_STR(name)

#define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_32BIT_PROT_STR(name)

#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_32BIT_PT_FOR_PHYS

#include "PGMGst.h"

#include "PGMBth.h"

#undef BTH_PGMPOOLKIND_PT_FOR_PT

#undef PGM_BTH_NAME

#undef PGM_BTH_NAME_GC_STR

#undef PGM_BTH_NAME_R0_STR

#undef PGM_GST_TYPE

#undef PGM_GST_NAME

#undef PGM_GST_NAME_GC_STR

#undef PGM_GST_NAME_R0_STR

#define PGM_GST_TYPE PGM_TYPE_32BIT

#define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name)

#define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_32BIT_STR(name)

#define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_32BIT_STR(name)

#define PGM_BTH_NAME(name) PGM_BTH_NAME_32BIT_32BIT(name)

#define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_32BIT_32BIT_STR(name)

#define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_32BIT_32BIT_STR(name)

#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT

#define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB

#include "PGMGst.h"

#include "PGMBth.h"

#undef BTH_PGMPOOLKIND_PT_FOR_BIG

#undef BTH_PGMPOOLKIND_PT_FOR_PT

#undef PGM_BTH_NAME

#undef PGM_BTH_NAME_GC_STR

#undef PGM_BTH_NAME_R0_STR

#undef PGM_GST_TYPE

#undef PGM_GST_NAME

#undef PGM_GST_NAME_GC_STR

#undef PGM_GST_NAME_R0_STR

#undef PGM_SHW_TYPE

#undef PGM_SHW_NAME

#undef PGM_SHW_NAME_GC_STR

#undef PGM_SHW_NAME_R0_STR

#endif /* !__AMD64__ */

#define PGM_SHW_TYPE PGM_TYPE_PAE

#define PGM_SHW_NAME(name) PGM_SHW_NAME_PAE(name)

#define PGM_SHW_NAME_GC_STR(name) PGM_SHW_NAME_GC_PAE_STR(name)

#define PGM_SHW_NAME_R0_STR(name) PGM_SHW_NAME_R0_PAE_STR(name)

#define PGM_BTH_NAME(name) PGM_BTH_NAME_PAE_REAL(name)

#include "PGMShw.h"

#define PGM_GST_TYPE PGM_TYPE_REAL

#define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name)

#define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_REAL_STR(name)

#define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_REAL_STR(name)

#define PGM_BTH_NAME(name) PGM_BTH_NAME_PAE_REAL(name)

#define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_PAE_REAL_STR(name)

#define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_PAE_REAL_STR(name)

#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS

#include "PGMBth.h"

#undef BTH_PGMPOOLKIND_PT_FOR_PT

#undef PGM_BTH_NAME

#undef PGM_BTH_NAME_GC_STR

#undef PGM_BTH_NAME_R0_STR

#undef PGM_GST_TYPE

#undef PGM_GST_NAME

#undef PGM_GST_NAME_GC_STR

#undef PGM_GST_NAME_R0_STR

#define PGM_GST_TYPE PGM_TYPE_PROT

#define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name)

#define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_PROT_STR(name)

#define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_PROT_STR(name)

#define PGM_BTH_NAME(name) PGM_BTH_NAME_PAE_PROT(name)

#define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_PAE_PROT_STR(name)

#define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_PAE_PROT_STR(name)

#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS

#include "PGMBth.h"

#undef BTH_PGMPOOLKIND_PT_FOR_PT

#undef PGM_BTH_NAME

#undef PGM_BTH_NAME_GC_STR

#undef PGM_BTH_NAME_R0_STR

#undef PGM_GST_TYPE

#undef PGM_GST_NAME

#undef PGM_GST_NAME_GC_STR

#undef PGM_GST_NAME_R0_STR

#define PGM_GST_TYPE PGM_TYPE_32BIT

#define PGM_GST_NAME(name) PGM_GST_NAME_32BIT(name)

#define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_32BIT_STR(name)

#define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_32BIT_STR(name)

#define PGM_BTH_NAME(name) PGM_BTH_NAME_PAE_32BIT(name)

#define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_PAE_32BIT_STR(name)

#define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_PAE_32BIT_STR(name)

#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_32BIT_PT

#define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB

#include "PGMBth.h"

#undef BTH_PGMPOOLKIND_PT_FOR_BIG

#undef BTH_PGMPOOLKIND_PT_FOR_PT

#undef PGM_BTH_NAME

#undef PGM_BTH_NAME_GC_STR

#undef PGM_BTH_NAME_R0_STR

#undef PGM_GST_TYPE

#undef PGM_GST_NAME

#undef PGM_GST_NAME_GC_STR

#undef PGM_GST_NAME_R0_STR

#define PGM_GST_TYPE PGM_TYPE_PAE

#define PGM_GST_NAME(name) PGM_GST_NAME_PAE(name)

#define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_PAE_STR(name)

#define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_PAE_STR(name)

#define PGM_BTH_NAME(name) PGM_BTH_NAME_PAE_PAE(name)

#define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_PAE_PAE_STR(name)

#define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_PAE_PAE_STR(name)

#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT

#define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB

#include "PGMGst.h"

#include "PGMBth.h"

#undef BTH_PGMPOOLKIND_PT_FOR_BIG

#undef BTH_PGMPOOLKIND_PT_FOR_PT

#undef PGM_BTH_NAME

#undef PGM_BTH_NAME_GC_STR

#undef PGM_BTH_NAME_R0_STR

#undef PGM_GST_TYPE

#undef PGM_GST_NAME

#undef PGM_GST_NAME_GC_STR

#undef PGM_GST_NAME_R0_STR

#undef PGM_SHW_TYPE

#undef PGM_SHW_NAME

#undef PGM_SHW_NAME_GC_STR

#undef PGM_SHW_NAME_R0_STR

#define PGM_SHW_TYPE PGM_TYPE_AMD64

#define PGM_SHW_NAME(name) PGM_SHW_NAME_AMD64(name)

#define PGM_SHW_NAME_GC_STR(name) PGM_SHW_NAME_GC_AMD64_STR(name)

#define PGM_SHW_NAME_R0_STR(name) PGM_SHW_NAME_R0_AMD64_STR(name)

#include "PGMShw.h"

#define PGM_GST_TYPE PGM_TYPE_REAL

#define PGM_GST_NAME(name) PGM_GST_NAME_REAL(name)

#define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_REAL_STR(name)

#define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_REAL_STR(name)

#define PGM_BTH_NAME(name) PGM_BTH_NAME_AMD64_REAL(name)

#define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_AMD64_REAL_STR(name)

#define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_AMD64_REAL_STR(name)

#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS

#include "PGMBth.h"

#undef BTH_PGMPOOLKIND_PT_FOR_PT

#undef PGM_BTH_NAME

#undef PGM_BTH_NAME_GC_STR

#undef PGM_BTH_NAME_R0_STR

#undef PGM_GST_TYPE

#undef PGM_GST_NAME

#undef PGM_GST_NAME_GC_STR

#undef PGM_GST_NAME_R0_STR

#define PGM_GST_TYPE PGM_TYPE_PROT

#define PGM_GST_NAME(name) PGM_GST_NAME_PROT(name)

#define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_PROT_STR(name)

#define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_PROT_STR(name)

#define PGM_BTH_NAME(name) PGM_BTH_NAME_AMD64_PROT(name)

#define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_AMD64_PROT_STR(name)

#define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_AMD64_PROT_STR(name)

#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PHYS

#include "PGMBth.h"

#undef BTH_PGMPOOLKIND_PT_FOR_PT

#undef PGM_BTH_NAME

#undef PGM_BTH_NAME_GC_STR

#undef PGM_BTH_NAME_R0_STR

#undef PGM_GST_TYPE

#undef PGM_GST_NAME

#undef PGM_GST_NAME_GC_STR

#undef PGM_GST_NAME_R0_STR

#define PGM_GST_TYPE PGM_TYPE_AMD64

#define PGM_GST_NAME(name) PGM_GST_NAME_AMD64(name)

#define PGM_GST_NAME_GC_STR(name) PGM_GST_NAME_GC_AMD64_STR(name)

#define PGM_GST_NAME_R0_STR(name) PGM_GST_NAME_R0_AMD64_STR(name)

#define PGM_BTH_NAME(name) PGM_BTH_NAME_AMD64_AMD64(name)

#define PGM_BTH_NAME_GC_STR(name) PGM_BTH_NAME_GC_AMD64_AMD64_STR(name)

#define PGM_BTH_NAME_R0_STR(name) PGM_BTH_NAME_R0_AMD64_AMD64_STR(name)

#define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT

#define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB

#include "PGMGst.h"

#include "PGMBth.h"

#undef BTH_PGMPOOLKIND_PT_FOR_BIG

#undef BTH_PGMPOOLKIND_PT_FOR_PT

#undef PGM_BTH_NAME

#undef PGM_BTH_NAME_GC_STR

#undef PGM_BTH_NAME_R0_STR

#undef PGM_GST_TYPE

#undef PGM_GST_NAME

#undef PGM_GST_NAME_GC_STR

#undef PGM_GST_NAME_R0_STR

#undef PGM_SHW_TYPE

#undef PGM_SHW_NAME

#undef PGM_SHW_NAME_GC_STR

#undef PGM_SHW_NAME_R0_STR

PGMR3DECL(int) PGMR3Init(PVM pVM)

{

LogFlow(("PGMR3Init:\n"));

/*

AssertRelease(sizeof(pVM->pgm.s) <= sizeof(pVM->pgm.padding));

/*

pVM->pgm.s.offVM = RT_OFFSETOF(VM, pgm.s);

pVM->pgm.s.enmShadowMode = PGMMODE_INVALID;

pVM->pgm.s.enmGuestMode = PGMMODE_INVALID;

pVM->pgm.s.enmHostMode = SUPPAGINGMODE_INVALID;

pVM->pgm.s.GCPhysCR3 = NIL_RTGCPHYS;

pVM->pgm.s.GCPhysGstCR3Monitored = NIL_RTGCPHYS;

pVM->pgm.s.fA20Enabled = true;

pVM->pgm.s.pGstPaePDPTRHC = NULL;

pVM->pgm.s.pGstPaePDPTRGC = 0;

for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.apGstPaePDsHC); i++)

{

pVM->pgm.s.apGstPaePDsHC[i] = NULL;

pVM->pgm.s.apGstPaePDsGC[i] = 0;

pVM->pgm.s.aGCPhysGstPaePDs[i] = NIL_RTGCPHYS;

}

/*

uint64_t cbRam;

int rc = CFGMR3QueryU64(CFGMR3GetRoot(pVM), "RamSize", &cbRam);

if (rc == VERR_CFGM_VALUE_NOT_FOUND)

cbRam = pVM->pgm.s.cbRamSize = 0;

else if (VBOX_SUCCESS(rc))

{

if (cbRam < PAGE_SIZE)

cbRam = 0;

cbRam = RT_ALIGN_64(cbRam, PAGE_SIZE);

pVM->pgm.s.cbRamSize = (RTUINT)cbRam;

}

else

{

AssertMsgFailed(("Configuration error: Failed to query integer \"RamSize\", rc=%Vrc.\n", rc));

return rc;

}

/*

rc = SSMR3RegisterInternal(pVM, "pgm", 1, PGM_SAVED_STATE_VERSION, (size_t)cbRam + sizeof(PGM),

NULL, pgmR3Save, NULL,

NULL, pgmR3Load, NULL);

if (VBOX_FAILURE(rc))

return rc;

/* Initialise PGM critical section. */

rc = PDMR3CritSectInit(pVM, &pVM->pgm.s.CritSect, "PGM");

AssertRCReturn(rc, rc);

/*

rc = MMHyperAlloc(pVM, sizeof(PGMTREES), 0, MM_TAG_PGM, (void **)&pVM->pgm.s.pTreesHC);

if (VBOX_SUCCESS(rc))

{

pVM->pgm.s.pTreesGC = MMHyperHC2GC(pVM, pVM->pgm.s.pTreesHC);

/*

rc = pgmR3InitPaging(pVM);

}

if (VBOX_SUCCESS(rc))

{

/*

rc = pgmR3PoolInit(pVM);

}

if (VBOX_SUCCESS(rc))

{

/*

DBGFR3InfoRegisterInternal(pVM, "mode",

"Shows the current paging mode. "

"Recognizes 'all', 'guest', 'shadow' and 'host' as arguments, defaulting to 'all' if nothing's given.",

pgmR3InfoMode);

DBGFR3InfoRegisterInternal(pVM, "pgmcr3",

"Dumps all the entries in the top level paging table. No arguments.",

pgmR3InfoCr3);

DBGFR3InfoRegisterInternal(pVM, "phys",

"Dumps all the physical address ranges. No arguments.",

pgmR3PhysInfo);

DBGFR3InfoRegisterInternal(pVM, "handlers",

"Dumps physical and virtual handlers. "

"Pass 'phys' or 'virt' as argument if only one kind is wanted.",

pgmR3InfoHandlers);

STAM_REL_REG(pVM, &pVM->pgm.s.cGuestModeChanges, STAMTYPE_COUNTER, "/PGM/cGuestModeChanges", STAMUNIT_OCCURENCES, "Number of guest mode changes.");

#ifdef VBOX_WITH_STATISTICS

pgmR3InitStats(pVM);

#endif

#ifdef VBOX_WITH_DEBUGGER

/*

static bool fRegisteredCmds = false;

if (!fRegisteredCmds)

{

int rc = DBGCRegisterCommands(&g_aCmds[0], ELEMENTS(g_aCmds));

if (VBOX_SUCCESS(rc))

fRegisteredCmds = true;

}

#endif

return VINF_SUCCESS;

}

/* No cleanup necessary, MM frees all memory. */

return rc;

}

static int pgmR3InitPaging(PVM pVM)

{

/*

pVM->pgm.s.enmShadowMode = PGMMODE_INVALID;

pVM->pgm.s.enmGuestMode = PGMMODE_INVALID;

pVM->pgm.s.enmHostMode = SUPPAGINGMODE_INVALID;

/*

int rc = MMR3HyperReserve(pVM, PAGE_SIZE * 5, "CR3 mapping", &pVM->pgm.s.GCPtrCR3Mapping);

if (VBOX_FAILURE(rc))

{

AssertMsgFailed(("Failed to reserve two pages for cr mapping in HMA, rc=%Vrc\n", rc));

return rc;

}

MMR3HyperReserve(pVM, PAGE_SIZE, "fence", NULL);

/*

pVM->pgm.s.pInterPD = (PX86PD)MMR3PageAllocLow(pVM);

pVM->pgm.s.apInterPTs[0] = (PX86PT)MMR3PageAllocLow(pVM);

pVM->pgm.s.apInterPTs[1] = (PX86PT)MMR3PageAllocLow(pVM);

pVM->pgm.s.apInterPaePTs[0] = (PX86PTPAE)MMR3PageAlloc(pVM);

pVM->pgm.s.apInterPaePTs[1] = (PX86PTPAE)MMR3PageAlloc(pVM);

pVM->pgm.s.apInterPaePDs[0] = (PX86PDPAE)MMR3PageAlloc(pVM);

pVM->pgm.s.apInterPaePDs[1] = (PX86PDPAE)MMR3PageAlloc(pVM);

pVM->pgm.s.apInterPaePDs[2] = (PX86PDPAE)MMR3PageAlloc(pVM);

pVM->pgm.s.apInterPaePDs[3] = (PX86PDPAE)MMR3PageAlloc(pVM);

pVM->pgm.s.pInterPaePDPTR = (PX86PDPTR)MMR3PageAllocLow(pVM);

pVM->pgm.s.pInterPaePDPTR64 = (PX86PDPTR)MMR3PageAllocLow(pVM);

pVM->pgm.s.pInterPaePML4 = (PX86PML4)MMR3PageAllocLow(pVM);

if ( !pVM->pgm.s.pInterPD

|| !pVM->pgm.s.apInterPTs[0]

|| !pVM->pgm.s.apInterPTs[1]

|| !pVM->pgm.s.apInterPaePTs[0]

|| !pVM->pgm.s.apInterPaePTs[1]

|| !pVM->pgm.s.apInterPaePDs[0]

|| !pVM->pgm.s.apInterPaePDs[1]

|| !pVM->pgm.s.apInterPaePDs[2]

|| !pVM->pgm.s.apInterPaePDs[3]

|| !pVM->pgm.s.pInterPaePDPTR

|| !pVM->pgm.s.pInterPaePDPTR64

|| !pVM->pgm.s.pInterPaePML4)

{

AssertMsgFailed(("Failed to allocate pages for the intermediate context!\n"));

return VERR_NO_PAGE_MEMORY;

}

pVM->pgm.s.HCPhysInterPD = MMPage2Phys(pVM, pVM->pgm.s.pInterPD);

AssertRelease(pVM->pgm.s.HCPhysInterPD != NIL_RTHCPHYS && !(pVM->pgm.s.HCPhysInterPD & PAGE_OFFSET_MASK));

pVM->pgm.s.HCPhysInterPaePDPTR = MMPage2Phys(pVM, pVM->pgm.s.pInterPaePDPTR);

AssertRelease(pVM->pgm.s.HCPhysInterPaePDPTR != NIL_RTHCPHYS && !(pVM->pgm.s.HCPhysInterPaePDPTR & PAGE_OFFSET_MASK));

pVM->pgm.s.HCPhysInterPaePML4 = MMPage2Phys(pVM, pVM->pgm.s.pInterPaePML4);

AssertRelease(pVM->pgm.s.HCPhysInterPaePML4 != NIL_RTHCPHYS && !(pVM->pgm.s.HCPhysInterPaePML4 & PAGE_OFFSET_MASK));

/*

ASMMemZeroPage(pVM->pgm.s.pInterPD);

ASMMemZeroPage(pVM->pgm.s.apInterPTs[0]);

ASMMemZeroPage(pVM->pgm.s.apInterPTs[1]);

ASMMemZeroPage(pVM->pgm.s.apInterPaePTs[0]);

ASMMemZeroPage(pVM->pgm.s.apInterPaePTs[1]);

ASMMemZeroPage(pVM->pgm.s.pInterPaePDPTR);

for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.apInterPaePDs); i++)

{

ASMMemZeroPage(pVM->pgm.s.apInterPaePDs[i]);

pVM->pgm.s.pInterPaePDPTR->a[i].u = X86_PDPE_P | PGM_PLXFLAGS_PERMANENT

| MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[i]);

}

for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.pInterPaePDPTR64->a); i++)

{

const unsigned iPD = i % ELEMENTS(pVM->pgm.s.apInterPaePDs);

pVM->pgm.s.pInterPaePDPTR64->a[i].u = X86_PDPE_P | X86_PDPE_RW | X86_PDPE_US | X86_PDPE_A | PGM_PLXFLAGS_PERMANENT

| MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[iPD]);

}

RTHCPHYS HCPhysInterPaePDPTR64 = MMPage2Phys(pVM, pVM->pgm.s.pInterPaePDPTR64);

for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.pInterPaePML4->a); i++)

pVM->pgm.s.pInterPaePML4->a[i].u = X86_PML4E_P | X86_PML4E_RW | X86_PML4E_US | X86_PML4E_A | PGM_PLXFLAGS_PERMANENT

| HCPhysInterPaePDPTR64;

/*

pVM->pgm.s.pHC32BitPD = (PX86PD)MMR3PageAllocLow(pVM);

pVM->pgm.s.apHCPaePDs[0] = (PX86PDPAE)MMR3PageAlloc(pVM);

pVM->pgm.s.apHCPaePDs[1] = (PX86PDPAE)MMR3PageAlloc(pVM);

AssertRelease((uintptr_t)pVM->pgm.s.apHCPaePDs[0] + PAGE_SIZE == (uintptr_t)pVM->pgm.s.apHCPaePDs[1]);

pVM->pgm.s.apHCPaePDs[2] = (PX86PDPAE)MMR3PageAlloc(pVM);

AssertRelease((uintptr_t)pVM->pgm.s.apHCPaePDs[1] + PAGE_SIZE == (uintptr_t)pVM->pgm.s.apHCPaePDs[2]);

pVM->pgm.s.apHCPaePDs[3] = (PX86PDPAE)MMR3PageAlloc(pVM);

AssertRelease((uintptr_t)pVM->pgm.s.apHCPaePDs[2] + PAGE_SIZE == (uintptr_t)pVM->pgm.s.apHCPaePDs[3]);

pVM->pgm.s.pHCPaePDPTR = (PX86PDPTR)MMR3PageAllocLow(pVM);

pVM->pgm.s.pHCPaePML4 = (PX86PML4)MMR3PageAllocLow(pVM);

if ( !pVM->pgm.s.pHC32BitPD

|| !pVM->pgm.s.apHCPaePDs[0]

|| !pVM->pgm.s.apHCPaePDs[1]

|| !pVM->pgm.s.apHCPaePDs[2]

|| !pVM->pgm.s.apHCPaePDs[3]

|| !pVM->pgm.s.pHCPaePDPTR

|| !pVM->pgm.s.pHCPaePML4)

{

AssertMsgFailed(("Failed to allocate pages for the intermediate context!\n"));

return VERR_NO_PAGE_MEMORY;

}

/* get physical addresses. */

pVM->pgm.s.HCPhys32BitPD = MMPage2Phys(pVM, pVM->pgm.s.pHC32BitPD);

Assert(MMPagePhys2Page(pVM, pVM->pgm.s.HCPhys32BitPD) == pVM->pgm.s.pHC32BitPD);

pVM->pgm.s.aHCPhysPaePDs[0] = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[0]);

pVM->pgm.s.aHCPhysPaePDs[1] = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[1]);

pVM->pgm.s.aHCPhysPaePDs[2] = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[2]);

pVM->pgm.s.aHCPhysPaePDs[3] = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[3]);

pVM->pgm.s.HCPhysPaePDPTR = MMPage2Phys(pVM, pVM->pgm.s.pHCPaePDPTR);

pVM->pgm.s.HCPhysPaePML4 = MMPage2Phys(pVM, pVM->pgm.s.pHCPaePML4);

/*

ASMMemZero32(pVM->pgm.s.pHC32BitPD, PAGE_SIZE);

ASMMemZero32(pVM->pgm.s.pHCPaePDPTR, PAGE_SIZE);

for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.apHCPaePDs); i++)

{

ASMMemZero32(pVM->pgm.s.apHCPaePDs[i], PAGE_SIZE);

pVM->pgm.s.pHCPaePDPTR->a[i].u = X86_PDPE_P | PGM_PLXFLAGS_PERMANENT | pVM->pgm.s.aHCPhysPaePDs[i];

/* The flags will be corrected when entering and leaving long mode. */

}

ASMMemZero32(pVM->pgm.s.pHCPaePML4, PAGE_SIZE);

pVM->pgm.s.pHCPaePML4->a[0].u = X86_PML4E_P | X86_PML4E_RW | X86_PML4E_A

| PGM_PLXFLAGS_PERMANENT | pVM->pgm.s.HCPhysPaePDPTR;

CPUMSetHyperCR3(pVM, (uint32_t)pVM->pgm.s.HCPhys32BitPD);

/*

pVM->pgm.s.enmHostMode = SUPGetPagingMode();

switch (pVM->pgm.s.enmHostMode)

{

case SUPPAGINGMODE_32_BIT:

case SUPPAGINGMODE_32_BIT_GLOBAL:

case SUPPAGINGMODE_PAE:

case SUPPAGINGMODE_PAE_GLOBAL:

case SUPPAGINGMODE_PAE_NX:

case SUPPAGINGMODE_PAE_GLOBAL_NX:

break;

case SUPPAGINGMODE_AMD64:

case SUPPAGINGMODE_AMD64_GLOBAL:

case SUPPAGINGMODE_AMD64_NX:

case SUPPAGINGMODE_AMD64_GLOBAL_NX:

#ifndef VBOX_WITH_HYBIRD_32BIT_KERNEL

if (ARCH_BITS != 64)

{

AssertMsgFailed(("Host mode %d (64-bit) is not supported by non-64bit builds\n", pVM->pgm.s.enmHostMode));

LogRel(("Host mode %d (64-bit) is not supported by non-64bit builds\n", pVM->pgm.s.enmHostMode));

return VERR_PGM_UNSUPPORTED_HOST_PAGING_MODE;

}

#endif

break;

default:

AssertMsgFailed(("Host mode %d is not supported\n", pVM->pgm.s.enmHostMode));

return VERR_PGM_UNSUPPORTED_HOST_PAGING_MODE;

}

rc = pgmR3ModeDataInit(pVM, false /* don't resolve GC and R0 syms yet */);

if (VBOX_SUCCESS(rc))

rc = pgmR3ChangeMode(pVM, PGMMODE_REAL);

if (VBOX_SUCCESS(rc))

{

LogFlow(("pgmR3InitPaging: returns successfully\n"));

#if HC_ARCH_BITS == 64

LogRel(("Debug: HCPhys32BitPD=%VHp aHCPhysPaePDs={%VHp,%VHp,%VHp,%VHp} HCPhysPaePDPTR=%VHp HCPhysPaePML4=%VHp\n",

pVM->pgm.s.HCPhys32BitPD, pVM->pgm.s.aHCPhysPaePDs[0], pVM->pgm.s.aHCPhysPaePDs[1], pVM->pgm.s.aHCPhysPaePDs[2], pVM->pgm.s.aHCPhysPaePDs[3],

pVM->pgm.s.HCPhysPaePDPTR, pVM->pgm.s.HCPhysPaePML4));

LogRel(("Debug: HCPhysInterPD=%VHp HCPhysInterPaePDPTR=%VHp HCPhysInterPaePML4=%VHp\n",

pVM->pgm.s.HCPhysInterPD, pVM->pgm.s.HCPhysInterPaePDPTR, pVM->pgm.s.HCPhysInterPaePML4));

LogRel(("Debug: apInterPTs={%VHp,%VHp} apInterPaePTs={%VHp,%VHp} apInterPaePDs={%VHp,%VHp,%VHp,%VHp} pInterPaePDPTR64=%VHp\n",

MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[1]),

MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[1]),

MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[0]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[1]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[2]), MMPage2Phys(pVM, pVM->pgm.s.apInterPaePDs[3]),

MMPage2Phys(pVM, pVM->pgm.s.pInterPaePDPTR64)));

#endif

return VINF_SUCCESS;

}

LogFlow(("pgmR3InitPaging: returns %Vrc\n", rc));

return rc;

}

#ifdef VBOX_WITH_STATISTICS

static void pgmR3InitStats(PVM pVM)

{

PPGM pPGM = &pVM->pgm.s;

STAM_REG(pVM, &pPGM->StatGCInvalidatePage, STAMTYPE_PROFILE, "/PGM/GC/InvalidatePage", STAMUNIT_TICKS_PER_CALL, "PGMGCInvalidatePage() profiling.");

STAM_REG(pVM, &pPGM->StatGCInvalidatePage4KBPages, STAMTYPE_COUNTER, "/PGM/GC/InvalidatePage/4KBPages", STAMUNIT_OCCURENCES, "The number of times PGMGCInvalidatePage() was called for a 4KB page.");

STAM_REG(pVM, &pPGM->StatGCInvalidatePage4MBPages, STAMTYPE_COUNTER, "/PGM/GC/InvalidatePage/4MBPages", STAMUNIT_OCCURENCES, "The number of times PGMGCInvalidatePage() was called for a 4MB page.");

STAM_REG(pVM, &pPGM->StatGCInvalidatePage4MBPagesSkip, STAMTYPE_COUNTER, "/PGM/GC/InvalidatePage/4MBPagesSkip",STAMUNIT_OCCURENCES, "The number of times PGMGCInvalidatePage() skipped a 4MB page.");

STAM_REG(pVM, &pPGM->StatGCInvalidatePagePDMappings, STAMTYPE_COUNTER, "/PGM/GC/InvalidatePage/PDMappings", STAMUNIT_OCCURENCES, "The number of times PGMGCInvalidatePage() was called for a page directory containing mappings (no conflict).");

STAM_REG(pVM, &pPGM->StatGCInvalidatePagePDNAs, STAMTYPE_COUNTER, "/PGM/GC/InvalidatePage/PDNAs", STAMUNIT_OCCURENCES, "The number of times PGMGCInvalidatePage() was called for a not accessed page directory.");

STAM_REG(pVM, &pPGM->StatGCInvalidatePagePDNPs, STAMTYPE_COUNTER, "/PGM/GC/InvalidatePage/PDNPs", STAMUNIT_OCCURENCES, "The number of times PGMGCInvalidatePage() was called for a not present page directory.");

STAM_REG(pVM, &pPGM->StatGCInvalidatePagePDOutOfSync, STAMTYPE_COUNTER, "/PGM/GC/InvalidatePage/PDOutOfSync", STAMUNIT_OCCURENCES, "The number of times PGMGCInvalidatePage() was called for an out of sync page directory.");

STAM_REG(pVM, &pPGM->StatGCInvalidatePageSkipped, STAMTYPE_COUNTER, "/PGM/GC/InvalidatePage/Skipped", STAMUNIT_OCCURENCES, "The number of times PGMGCInvalidatePage() was skipped due to not present shw or pending pending SyncCR3.");

STAM_REG(pVM, &pPGM->StatGCSyncPT, STAMTYPE_PROFILE, "/PGM/GC/SyncPT", STAMUNIT_TICKS_PER_CALL, "Profiling of the PGMGCSyncPT() body.");

STAM_REG(pVM, &pPGM->StatGCAccessedPage, STAMTYPE_COUNTER, "/PGM/GC/AccessedPage", STAMUNIT_OCCURENCES, "The number of pages marked not present for accessed bit emulation.");

STAM_REG(pVM, &pPGM->StatGCDirtyPage, STAMTYPE_COUNTER, "/PGM/GC/DirtyPage/Mark", STAMUNIT_OCCURENCES, "The number of pages marked read-only for dirty bit tracking.");

STAM_REG(pVM, &pPGM->StatGCDirtyPageBig, STAMTYPE_COUNTER, "/PGM/GC/DirtyPage/MarkBig", STAMUNIT_OCCURENCES, "The number of 4MB pages marked read-only for dirty bit tracking.");

STAM_REG(pVM, &pPGM->StatGCDirtyPageTrap, STAMTYPE_COUNTER, "/PGM/GC/DirtyPage/Trap", STAMUNIT_OCCURENCES, "The number of traps generated for dirty bit tracking.");

STAM_REG(pVM, &pPGM->StatGCDirtyPageSkipped, STAMTYPE_COUNTER, "/PGM/GC/DirtyPage/Skipped", STAMUNIT_OCCURENCES, "The number of pages already dirty or readonly.");

STAM_REG(pVM, &pPGM->StatGCDirtiedPage, STAMTYPE_COUNTER, "/PGM/GC/DirtyPage/SetDirty", STAMUNIT_OCCURENCES, "The number of pages marked dirty because of write accesses.");

STAM_REG(pVM, &pPGM->StatGCDirtyTrackRealPF, STAMTYPE_COUNTER, "/PGM/GC/DirtyPage/RealPF", STAMUNIT_OCCURENCES, "The number of real pages faults during dirty bit tracking.");

STAM_REG(pVM, &pPGM->StatGCPageAlreadyDirty, STAMTYPE_COUNTER, "/PGM/GC/DirtyPage/AlreadySet", STAMUNIT_OCCURENCES, "The number of pages already marked dirty because of write accesses.");

STAM_REG(pVM, &pPGM->StatGCDirtyBitTracking, STAMTYPE_PROFILE, "/PGM/GC/DirtyPage", STAMUNIT_TICKS_PER_CALL, "Profiling of the PGMTrackDirtyBit() body.");

STAM_REG(pVM, &pPGM->StatGCSyncPTAlloc, STAMTYPE_COUNTER, "/PGM/GC/SyncPT/Alloc", STAMUNIT_OCCURENCES, "The number of times PGMGCSyncPT() needed to allocate page tables.");

STAM_REG(pVM, &pPGM->StatGCSyncPTConflict, STAMTYPE_COUNTER, "/PGM/GC/SyncPT/Conflicts", STAMUNIT_OCCURENCES, "The number of times PGMGCSyncPT() detected conflicts.");

STAM_REG(pVM, &pPGM->StatGCSyncPTFailed, STAMTYPE_COUNTER, "/PGM/GC/SyncPT/Failed", STAMUNIT_OCCURENCES, "The number of times PGMGCSyncPT() failed.");

STAM_REG(pVM, &pPGM->StatGCTrap0e, STAMTYPE_PROFILE, "/PGM/GC/Trap0e", STAMUNIT_TICKS_PER_CALL, "Profiling of the PGMGCTrap0eHandler() body.");

STAM_REG(pVM, &pPGM->StatCheckPageFault, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time/CheckPageFault", STAMUNIT_TICKS_PER_CALL, "Profiling of checking for dirty/access emulation faults.");

STAM_REG(pVM, &pPGM->StatLazySyncPT, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time/SyncPT", STAMUNIT_TICKS_PER_CALL, "Profiling of lazy page table syncing.");

STAM_REG(pVM, &pPGM->StatMapping, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time/Mapping", STAMUNIT_TICKS_PER_CALL, "Profiling of checking virtual mappings.");

STAM_REG(pVM, &pPGM->StatOutOfSync, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time/OutOfSync", STAMUNIT_TICKS_PER_CALL, "Profiling of out of sync page handling.");

STAM_REG(pVM, &pPGM->StatHandlers, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time/Handlers", STAMUNIT_TICKS_PER_CALL, "Profiling of checking handlers.");

STAM_REG(pVM, &pPGM->StatEIPHandlers, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time/EIPHandlers", STAMUNIT_TICKS_PER_CALL, "Profiling of checking eip handlers.");

STAM_REG(pVM, &pPGM->StatTrap0eCSAM, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time2/CSAM", STAMUNIT_TICKS_PER_CALL, "Profiling of the Trap0eHandler body when the cause is CSAM.");

STAM_REG(pVM, &pPGM->StatTrap0eDirtyAndAccessedBits, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time2/DirtyAndAccessedBits", STAMUNIT_TICKS_PER_CALL, "Profiling of the Trap0eHandler body when the cause is dirty and/or accessed bit emulation.");

STAM_REG(pVM, &pPGM->StatTrap0eGuestTrap, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time2/GuestTrap", STAMUNIT_TICKS_PER_CALL, "Profiling of the Trap0eHandler body when the cause is a guest trap.");

STAM_REG(pVM, &pPGM->StatTrap0eHndPhys, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time2/HandlerPhysical", STAMUNIT_TICKS_PER_CALL, "Profiling of the Trap0eHandler body when the cause is a physical handler.");

STAM_REG(pVM, &pPGM->StatTrap0eHndVirt, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time2/HandlerVirtual",STAMUNIT_TICKS_PER_CALL, "Profiling of the Trap0eHandler body when the cause is a virtual handler.");

STAM_REG(pVM, &pPGM->StatTrap0eHndUnhandled, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time2/HandlerUnhandled", STAMUNIT_TICKS_PER_CALL, "Profiling of the Trap0eHandler body when the cause is access outside the monitored areas of a monitored page.");

STAM_REG(pVM, &pPGM->StatTrap0eMisc, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time2/Misc", STAMUNIT_TICKS_PER_CALL, "Profiling of the Trap0eHandler body when the cause is not known.");

STAM_REG(pVM, &pPGM->StatTrap0eOutOfSync, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time2/OutOfSync", STAMUNIT_TICKS_PER_CALL, "Profiling of the Trap0eHandler body when the cause is an out-of-sync page.");

STAM_REG(pVM, &pPGM->StatTrap0eOutOfSyncHndPhys, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time2/OutOfSyncHndPhys", STAMUNIT_TICKS_PER_CALL, "Profiling of the Trap0eHandler body when the cause is an out-of-sync physical handler page.");

STAM_REG(pVM, &pPGM->StatTrap0eOutOfSyncHndVirt, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time2/OutOfSyncHndVirt", STAMUNIT_TICKS_PER_CALL, "Profiling of the Trap0eHandler body when the cause is an out-of-sync virtual handler page.");

STAM_REG(pVM, &pPGM->StatTrap0eOutOfSyncObsHnd, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time2/OutOfSyncObsHnd", STAMUNIT_TICKS_PER_CALL, "Profiling of the Trap0eHandler body when the cause is an obsolete handler page.");

STAM_REG(pVM, &pPGM->StatTrap0eSyncPT, STAMTYPE_PROFILE, "/PGM/GC/Trap0e/Time2/SyncPT", STAMUNIT_TICKS_PER_CALL, "Profiling of the Trap0eHandler body when the cause is lazy syncing of a PT.");

STAM_REG(pVM, &pPGM->StatTrap0eMapHandler, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/Handlers/Mapping", STAMUNIT_OCCURENCES, "Number of traps due to access handlers in mappings.");

STAM_REG(pVM, &pPGM->StatHandlersOutOfSync, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/Handlers/OutOfSync", STAMUNIT_OCCURENCES, "Number of traps due to out-of-sync handled pages.");

STAM_REG(pVM, &pPGM->StatHandlersPhysical, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/Handlers/Physical", STAMUNIT_OCCURENCES, "Number of traps due to physical access handlers.");

STAM_REG(pVM, &pPGM->StatHandlersVirtual, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/Handlers/Virtual", STAMUNIT_OCCURENCES, "Number of traps due to virtual access handlers.");

STAM_REG(pVM, &pPGM->StatHandlersVirtualByPhys, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/Handlers/VirtualByPhys", STAMUNIT_OCCURENCES, "Number of traps due to virtual access handlers by physical address.");

STAM_REG(pVM, &pPGM->StatHandlersVirtualUnmarked, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/Handlers/VirtualUnmarked", STAMUNIT_OCCURENCES,"Number of traps due to virtual access handlers by virtual address (without proper physical flags).");

STAM_REG(pVM, &pPGM->StatHandlersUnhandled, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/Handlers/Unhandled", STAMUNIT_OCCURENCES, "Number of traps due to access outside range of monitored page(s).");

STAM_REG(pVM, &pPGM->StatGCTrap0eConflicts, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/Conflicts", STAMUNIT_OCCURENCES, "The number of times #PF was caused by an undetected conflict.");

STAM_REG(pVM, &pPGM->StatGCTrap0eUSNotPresentRead, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/User/NPRead", STAMUNIT_OCCURENCES, "Number of user mode not present read page faults.");

STAM_REG(pVM, &pPGM->StatGCTrap0eUSNotPresentWrite, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/User/NPWrite", STAMUNIT_OCCURENCES, "Number of user mode not present write page faults.");

STAM_REG(pVM, &pPGM->StatGCTrap0eUSWrite, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/User/Write", STAMUNIT_OCCURENCES, "Number of user mode write page faults.");

STAM_REG(pVM, &pPGM->StatGCTrap0eUSReserved, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/User/Reserved", STAMUNIT_OCCURENCES, "Number of user mode reserved bit page faults.");

STAM_REG(pVM, &pPGM->StatGCTrap0eUSRead, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/User/Read", STAMUNIT_OCCURENCES, "Number of user mode read page faults.");

STAM_REG(pVM, &pPGM->StatGCTrap0eSVNotPresentRead, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/Supervisor/NPRead", STAMUNIT_OCCURENCES, "Number of supervisor mode not present read page faults.");

STAM_REG(pVM, &pPGM->StatGCTrap0eSVNotPresentWrite, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/Supervisor/NPWrite", STAMUNIT_OCCURENCES, "Number of supervisor mode not present write page faults.");

STAM_REG(pVM, &pPGM->StatGCTrap0eSVWrite, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/Supervisor/Write", STAMUNIT_OCCURENCES, "Number of supervisor mode write page faults.");

STAM_REG(pVM, &pPGM->StatGCTrap0eSVReserved, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/Supervisor/Reserved", STAMUNIT_OCCURENCES, "Number of supervisor mode reserved bit page faults.");

STAM_REG(pVM, &pPGM->StatGCTrap0eUnhandled, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/GuestPF/Unhandled", STAMUNIT_OCCURENCES, "Number of guest real page faults.");

STAM_REG(pVM, &pPGM->StatGCTrap0eMap, STAMTYPE_COUNTER, "/PGM/GC/Trap0e/GuestPF/Map", STAMUNIT_OCCURENCES, "Number of guest page faults due to map accesses.");

STAM_REG(pVM, &pPGM->StatGCGuestCR3WriteHandled, STAMTYPE_COUNTER, "/PGM/GC/CR3WriteInt", STAMUNIT_OCCURENCES, "The number of times the Guest CR3 change was successfully handled.");

STAM_REG(pVM, &pPGM->StatGCGuestCR3WriteUnhandled, STAMTYPE_COUNTER, "/PGM/GC/CR3WriteEmu", STAMUNIT_OCCURENCES, "The number of times the Guest CR3 change was passed back to the recompiler.");

STAM_REG(pVM, &pPGM->StatGCGuestCR3WriteConflict, STAMTYPE_COUNTER, "/PGM/GC/CR3WriteConflict", STAMUNIT_OCCURENCES, "The number of times the Guest CR3 monitoring detected a conflict.");

STAM_REG(pVM, &pPGM->StatGCPageOutOfSyncSupervisor, STAMTYPE_COUNTER, "/PGM/GC/OutOfSync/SuperVisor", STAMUNIT_OCCURENCES, "Number of traps due to pages out of sync.");

STAM_REG(pVM, &pPGM->StatGCPageOutOfSyncUser, STAMTYPE_COUNTER, "/PGM/GC/OutOfSync/User", STAMUNIT_OCCURENCES, "Number of traps due to pages out of sync.");

STAM_REG(pVM, &pPGM->StatGCGuestROMWriteHandled, STAMTYPE_COUNTER, "/PGM/GC/ROMWriteInt", STAMUNIT_OCCURENCES, "The number of times the Guest ROM change was successfully handled.");

STAM_REG(pVM, &pPGM->StatGCGuestROMWriteUnhandled, STAMTYPE_COUNTER, "/PGM/GC/ROMWriteEmu", STAMUNIT_OCCURENCES, "The number of times the Guest ROM change was passed back to the recompiler.");

STAM_REG(pVM, &pPGM->StatDynMapCacheHits, STAMTYPE_COUNTER, "/PGM/GC/DynMapCache/Hits" , STAMUNIT_OCCURENCES, "Number of dynamic page mapping cache hits.");

STAM_REG(pVM, &pPGM->StatDynMapCacheMisses, STAMTYPE_COUNTER, "/PGM/GC/DynMapCache/Misses" , STAMUNIT_OCCURENCES, "Number of dynamic page mapping cache misses.");

STAM_REG(pVM, &pPGM->StatHCDetectedConflicts, STAMTYPE_COUNTER, "/PGM/HC/DetectedConflicts", STAMUNIT_OCCURENCES, "The number of times PGMR3CheckMappingConflicts() detected a conflict.");

STAM_REG(pVM, &pPGM->StatHCGuestPDWrite, STAMTYPE_COUNTER, "/PGM/HC/PDWrite", STAMUNIT_OCCURENCES, "The total number of times pgmHCGuestPDWriteHandler() was called.");

STAM_REG(pVM, &pPGM->StatHCGuestPDWriteConflict, STAMTYPE_COUNTER, "/PGM/HC/PDWriteConflict", STAMUNIT_OCCURENCES, "The number of times pgmHCGuestPDWriteHandler() detected a conflict.");

STAM_REG(pVM, &pPGM->StatHCInvalidatePage, STAMTYPE_PROFILE, "/PGM/HC/InvalidatePage", STAMUNIT_TICKS_PER_CALL, "PGMHCInvalidatePage() profiling.");

STAM_REG(pVM, &pPGM->StatHCInvalidatePage4KBPages, STAMTYPE_COUNTER, "/PGM/HC/InvalidatePage/4KBPages", STAMUNIT_OCCURENCES, "The number of times PGMHCInvalidatePage() was called for a 4KB page.");

STAM_REG(pVM, &pPGM->StatHCInvalidatePage4MBPages, STAMTYPE_COUNTER, "/PGM/HC/InvalidatePage/4MBPages", STAMUNIT_OCCURENCES, "The number of times PGMHCInvalidatePage() was called for a 4MB page.");

STAM_REG(pVM, &pPGM->StatHCInvalidatePage4MBPagesSkip, STAMTYPE_COUNTER, "/PGM/HC/InvalidatePage/4MBPagesSkip",STAMUNIT_OCCURENCES, "The number of times PGMHCInvalidatePage() skipped a 4MB page.");

STAM_REG(pVM, &pPGM->StatHCInvalidatePagePDMappings, STAMTYPE_COUNTER, "/PGM/HC/InvalidatePage/PDMappings", STAMUNIT_OCCURENCES, "The number of times PGMHCInvalidatePage() was called for a page directory containing mappings (no conflict).");

STAM_REG(pVM, &pPGM->StatHCInvalidatePagePDNAs, STAMTYPE_COUNTER, "/PGM/HC/InvalidatePage/PDNAs", STAMUNIT_OCCURENCES, "The number of times PGMHCInvalidatePage() was called for a not accessed page directory.");

STAM_REG(pVM, &pPGM->StatHCInvalidatePagePDNPs, STAMTYPE_COUNTER, "/PGM/HC/InvalidatePage/PDNPs", STAMUNIT_OCCURENCES, "The number of times PGMHCInvalidatePage() was called for a not present page directory.");

STAM_REG(pVM, &pPGM->StatHCInvalidatePagePDOutOfSync, STAMTYPE_COUNTER, "/PGM/HC/InvalidatePage/PDOutOfSync", STAMUNIT_OCCURENCES, "The number of times PGMGCInvalidatePage() was called for an out of sync page directory.");

STAM_REG(pVM, &pPGM->StatHCInvalidatePageSkipped, STAMTYPE_COUNTER, "/PGM/HC/InvalidatePage/Skipped", STAMUNIT_OCCURENCES, "The number of times PGMHCInvalidatePage() was skipped due to not present shw or pending pending SyncCR3.");

STAM_REG(pVM, &pPGM->StatHCResolveConflict, STAMTYPE_PROFILE, "/PGM/HC/ResolveConflict", STAMUNIT_TICKS_PER_CALL, "pgmR3SyncPTResolveConflict() profiling (includes the entire relocation).");

STAM_REG(pVM, &pPGM->StatHCPrefetch, STAMTYPE_PROFILE, "/PGM/HC/Prefetch", STAMUNIT_TICKS_PER_CALL, "PGMR3PrefetchPage profiling.");

STAM_REG(pVM, &pPGM->StatHCSyncPT, STAMTYPE_PROFILE, "/PGM/HC/SyncPT", STAMUNIT_TICKS_PER_CALL, "Profiling of the PGMR3SyncPT() body.");

STAM_REG(pVM, &pPGM->StatHCAccessedPage, STAMTYPE_COUNTER, "/PGM/HC/AccessedPage", STAMUNIT_OCCURENCES, "The number of pages marked not present for accessed bit emulation.");

STAM_REG(pVM, &pPGM->StatHCDirtyPage, STAMTYPE_COUNTER, "/PGM/HC/DirtyPage/Mark", STAMUNIT_OCCURENCES, "The number of pages marked read-only for dirty bit tracking.");

STAM_REG(pVM, &pPGM->StatHCDirtyPageBig, STAMTYPE_COUNTER, "/PGM/HC/DirtyPage/MarkBig", STAMUNIT_OCCURENCES, "The number of 4MB pages marked read-only for dirty bit tracking.");

STAM_REG(pVM, &pPGM->StatHCDirtyPageTrap, STAMTYPE_COUNTER, "/PGM/HC/DirtyPage/Trap", STAMUNIT_OCCURENCES, "The number of traps generated for dirty bit tracking.");

STAM_REG(pVM, &pPGM->StatHCDirtyPageSkipped, STAMTYPE_COUNTER, "/PGM/HC/DirtyPage/Skipped", STAMUNIT_OCCURENCES, "The number of pages already dirty or readonly.");

STAM_REG(pVM, &pPGM->StatHCDirtyBitTracking, STAMTYPE_PROFILE, "/PGM/HC/DirtyPage", STAMUNIT_TICKS_PER_CALL, "Profiling of the PGMTrackDirtyBit() body.");

STAM_REG(pVM, &pPGM->StatGCSyncPagePDNAs, STAMTYPE_COUNTER, "/PGM/GC/SyncPagePDNAs", STAMUNIT_OCCURENCES, "The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit.");

STAM_REG(pVM, &pPGM->StatGCSyncPagePDOutOfSync, STAMTYPE_COUNTER, "/PGM/GC/SyncPagePDOutOfSync", STAMUNIT_OCCURENCES, "The number of time we've encountered an out-of-sync PD in SyncPage.");

STAM_REG(pVM, &pPGM->StatHCSyncPagePDNAs, STAMTYPE_COUNTER, "/PGM/HC/SyncPagePDNAs", STAMUNIT_OCCURENCES, "The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit.");

STAM_REG(pVM, &pPGM->StatHCSyncPagePDOutOfSync, STAMTYPE_COUNTER, "/PGM/HC/SyncPagePDOutOfSync", STAMUNIT_OCCURENCES, "The number of time we've encountered an out-of-sync PD in SyncPage.");

STAM_REG(pVM, &pPGM->StatFlushTLB, STAMTYPE_PROFILE, "/PGM/FlushTLB", STAMUNIT_OCCURENCES, "Profiling of the PGMFlushTLB() body.");

STAM_REG(pVM, &pPGM->StatFlushTLBNewCR3, STAMTYPE_COUNTER, "/PGM/FlushTLB/NewCR3", STAMUNIT_OCCURENCES, "The number of times PGMFlushTLB was called with a new CR3, non-global. (switch)");

STAM_REG(pVM, &pPGM->StatFlushTLBNewCR3Global, STAMTYPE_COUNTER, "/PGM/FlushTLB/NewCR3Global", STAMUNIT_OCCURENCES, "The number of times PGMFlushTLB was called with a new CR3, global. (switch)");

STAM_REG(pVM, &pPGM->StatFlushTLBSameCR3, STAMTYPE_COUNTER, "/PGM/FlushTLB/SameCR3", STAMUNIT_OCCURENCES, "The number of times PGMFlushTLB was called with the same CR3, non-global. (flush)");

STAM_REG(pVM, &pPGM->StatFlushTLBSameCR3Global, STAMTYPE_COUNTER, "/PGM/FlushTLB/SameCR3Global", STAMUNIT_OCCURENCES, "The number of times PGMFlushTLB was called with the same CR3, global. (flush)");

STAM_REG(pVM, &pPGM->StatGCSyncCR3, STAMTYPE_PROFILE, "/PGM/GC/SyncCR3", STAMUNIT_TICKS_PER_CALL, "Profiling of the PGMSyncCR3() body.");

STAM_REG(pVM, &pPGM->StatGCSyncCR3Handlers, STAMTYPE_PROFILE, "/PGM/GC/SyncCR3/Handlers", STAMUNIT_TICKS_PER_CALL, "Profiling of the PGMSyncCR3() update handler section.");

STAM_REG(pVM, &pPGM->StatGCSyncCR3HandlerVirtualUpdate, STAMTYPE_PROFILE, "/PGM/GC/SyncCR3/Handlers/VirtualUpdate",STAMUNIT_TICKS_PER_CALL, "Profiling of the virtual handler updates.");

STAM_REG(pVM, &pPGM->StatGCSyncCR3HandlerVirtualReset, STAMTYPE_PROFILE, "/PGM/GC/SyncCR3/Handlers/VirtualReset", STAMUNIT_TICKS_PER_CALL, "Profiling of the virtual handler resets.");

STAM_REG(pVM, &pPGM->StatGCSyncCR3Global, STAMTYPE_COUNTER, "/PGM/GC/SyncCR3/Global", STAMUNIT_OCCURENCES, "The number of global CR3 syncs.");

STAM_REG(pVM, &pPGM->StatGCSyncCR3NotGlobal, STAMTYPE_COUNTER, "/PGM/GC/SyncCR3/NotGlobal", STAMUNIT_OCCURENCES, "The number of non-global CR3 syncs.");

STAM_REG(pVM, &pPGM->StatGCSyncCR3DstCacheHit, STAMTYPE_COUNTER, "/PGM/GC/SyncCR3/DstChacheHit", STAMUNIT_OCCURENCES, "The number of times we got some kind of a cache hit.");

STAM_REG(pVM, &pPGM->StatGCSyncCR3DstFreed, STAMTYPE_COUNTER, "/PGM/GC/SyncCR3/DstFreed", STAMUNIT_OCCURENCES, "The number of times we've had to free a shadow entry.");

STAM_REG(pVM, &pPGM->StatGCSyncCR3DstFreedSrcNP, STAMTYPE_COUNTER, "/PGM/GC/SyncCR3/DstFreedSrcNP", STAMUNIT_OCCURENCES, "The number of times we've had to free a shadow entry for which the source entry was not present.");

STAM_REG(pVM, &pPGM->StatGCSyncCR3DstNotPresent, STAMTYPE_COUNTER, "/PGM/GC/SyncCR3/DstNotPresent", STAMUNIT_OCCURENCES, "The number of times we've encountered a not present shadow entry for a present guest entry.");

STAM_REG(pVM, &pPGM->StatGCSyncCR3DstSkippedGlobalPD, STAMTYPE_COUNTER, "/PGM/GC/SyncCR3/DstSkippedGlobalPD", STAMUNIT_OCCURENCES, "The number of times a global page directory wasn't flushed.");

STAM_REG(pVM, &pPGM->StatGCSyncCR3DstSkippedGlobalPT, STAMTYPE_COUNTER, "/PGM/GC/SyncCR3/DstSkippedGlobalPT", STAMUNIT_OCCURENCES, "The number of times a page table with only global entries wasn't flushed.");

STAM_REG(pVM, &pPGM->StatHCSyncCR3, STAMTYPE_PROFILE, "/PGM/HC/SyncCR3", STAMUNIT_TICKS_PER_CALL, "Profiling of the PGMSyncCR3() body.");

STAM_REG(pVM, &pPGM->StatHCSyncCR3Handlers, STAMTYPE_PROFILE, "/PGM/HC/SyncCR3/Handlers", STAMUNIT_TICKS_PER_CALL, "Profiling of the PGMSyncCR3() update handler section.");

STAM_REG(pVM, &pPGM->StatHCSyncCR3HandlerVirtualUpdate, STAMTYPE_PROFILE, "/PGM/HC/SyncCR3/Handlers/VirtualUpdate",STAMUNIT_TICKS_PER_CALL, "Profiling of the virtual handler updates.");

STAM_REG(pVM, &pPGM->StatHCSyncCR3HandlerVirtualReset, STAMTYPE_PROFILE, "/PGM/HC/SyncCR3/Handlers/VirtualReset", STAMUNIT_TICKS_PER_CALL, "Profiling of the virtual handler resets.");

STAM_REG(pVM, &pPGM->StatHCSyncCR3Global, STAMTYPE_COUNTER, "/PGM/HC/SyncCR3/Global", STAMUNIT_OCCURENCES, "The number of global CR3 syncs.");

STAM_REG(pVM, &pPGM->StatHCSyncCR3NotGlobal, STAMTYPE_COUNTER, "/PGM/HC/SyncCR3/NotGlobal", STAMUNIT_OCCURENCES, "The number of non-global CR3 syncs.");

STAM_REG(pVM, &pPGM->StatHCSyncCR3DstCacheHit, STAMTYPE_COUNTER, "/PGM/HC/SyncCR3/DstChacheHit", STAMUNIT_OCCURENCES, "The number of times we got some kind of a cache hit.");

STAM_REG(pVM, &pPGM->StatHCSyncCR3DstFreed, STAMTYPE_COUNTER, "/PGM/HC/SyncCR3/DstFreed", STAMUNIT_OCCURENCES, "The number of times we've had to free a shadow entry.");

STAM_REG(pVM, &pPGM->StatHCSyncCR3DstFreedSrcNP, STAMTYPE_COUNTER, "/PGM/HC/SyncCR3/DstFreedSrcNP", STAMUNIT_OCCURENCES, "The number of times we've had to free a shadow entry for which the source entry was not present.");

STAM_REG(pVM, &pPGM->StatHCSyncCR3DstNotPresent, STAMTYPE_COUNTER, "/PGM/HC/SyncCR3/DstNotPresent", STAMUNIT_OCCURENCES, "The number of times we've encountered a not present shadow entry for a present guest entry.");

STAM_REG(pVM, &pPGM->StatHCSyncCR3DstSkippedGlobalPD, STAMTYPE_COUNTER, "/PGM/HC/SyncCR3/DstSkippedGlobalPD", STAMUNIT_OCCURENCES, "The number of times a global page directory wasn't flushed.");

STAM_REG(pVM, &pPGM->StatHCSyncCR3DstSkippedGlobalPT, STAMTYPE_COUNTER, "/PGM/HC/SyncCR3/DstSkippedGlobalPT", STAMUNIT_OCCURENCES, "The number of times a page table with only global entries wasn't flushed.");

STAM_REG(pVM, &pPGM->StatVirtHandleSearchByPhysGC, STAMTYPE_PROFILE, "/PGM/VirtHandler/SearchByPhys/GC", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmHandlerVirtualFindByPhysAddr in GC.");

STAM_REG(pVM, &pPGM->StatVirtHandleSearchByPhysHC, STAMTYPE_PROFILE, "/PGM/VirtHandler/SearchByPhys/HC", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmHandlerVirtualFindByPhysAddr in HC.");

STAM_REG(pVM, &pPGM->StatHandlePhysicalReset, STAMTYPE_COUNTER, "/PGM/HC/HandlerPhysicalReset", STAMUNIT_OCCURENCES, "The number of times PGMR3HandlerPhysicalReset is called.");

STAM_REG(pVM, &pPGM->StatHCGstModifyPage, STAMTYPE_PROFILE, "/PGM/HC/GstModifyPage", STAMUNIT_TICKS_PER_CALL, "Profiling of the PGMGstModifyPage() body.");

STAM_REG(pVM, &pPGM->StatGCGstModifyPage, STAMTYPE_PROFILE, "/PGM/GC/GstModifyPage", STAMUNIT_TICKS_PER_CALL, "Profiling of the PGMGstModifyPage() body.");

STAM_REG(pVM, &pPGM->StatSynPT4kGC, STAMTYPE_COUNTER, "/PGM/GC/SyncPT/4k", STAMUNIT_OCCURENCES, "Nr of 4k PT syncs");

STAM_REG(pVM, &pPGM->StatSynPT4kHC, STAMTYPE_COUNTER, "/PGM/HC/SyncPT/4k", STAMUNIT_OCCURENCES, "Nr of 4k PT syncs");

STAM_REG(pVM, &pPGM->StatSynPT4MGC, STAMTYPE_COUNTER, "/PGM/GC/SyncPT/4M", STAMUNIT_OCCURENCES, "Nr of 4M PT syncs");

STAM_REG(pVM, &pPGM->StatSynPT4MHC, STAMTYPE_COUNTER, "/PGM/HC/SyncPT/4M", STAMUNIT_OCCURENCES, "Nr of 4M PT syncs");

STAM_REG(pVM, &pPGM->StatDynRamTotal, STAMTYPE_COUNTER, "/PGM/RAM/TotalAlloc", STAMUNIT_MEGABYTES, "Allocated mbs of guest ram.");

STAM_REG(pVM, &pPGM->StatDynRamGrow, STAMTYPE_COUNTER, "/PGM/RAM/Grow", STAMUNIT_OCCURENCES, "Nr of pgmr3PhysGrowRange calls.");

#ifdef PGMPOOL_WITH_GCPHYS_TRACKING

STAM_REG(pVM, &pPGM->StatTrackVirgin, STAMTYPE_COUNTER, "/PGM/Track/Virgin", STAMUNIT_OCCURENCES, "The number of first time shadowings");

STAM_REG(pVM, &pPGM->StatTrackAliased, STAMTYPE_COUNTER, "/PGM/Track/Aliased", STAMUNIT_OCCURENCES, "The number of times switching to cRef2, i.e. the page is being shadowed by two PTs.");

STAM_REG(pVM, &pPGM->StatTrackAliasedMany, STAMTYPE_COUNTER, "/PGM/Track/AliasedMany", STAMUNIT_OCCURENCES, "The number of times we're tracking using cRef2.");

STAM_REG(pVM, &pPGM->StatTrackAliasedLots, STAMTYPE_COUNTER, "/PGM/Track/AliasedLots", STAMUNIT_OCCURENCES, "The number of times we're hitting pages which has overflowed cRef2");

STAM_REG(pVM, &pPGM->StatTrackOverflows, STAMTYPE_COUNTER, "/PGM/Track/Overflows", STAMUNIT_OCCURENCES, "The number of times the extent list grows to long.");

STAM_REG(pVM, &pPGM->StatTrackDeref, STAMTYPE_PROFILE, "/PGM/Track/Deref", STAMUNIT_OCCURENCES, "Profiling of SyncPageWorkerTrackDeref (expensive).");

#endif

for (unsigned i = 0; i < PAGE_ENTRIES; i++)

{

/** @todo r=bird: We need a STAMR3RegisterF()! */

char szName[32];

RTStrPrintf(szName, sizeof(szName), "/PGM/GC/PD/Trap0e/%04X", i);

int rc = STAMR3Register(pVM, &pPGM->StatGCTrap0ePD[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, "The number of traps in page directory n.");

AssertRC(rc);

RTStrPrintf(szName, sizeof(szName), "/PGM/GC/PD/SyncPt/%04X", i);

rc = STAMR3Register(pVM, &pPGM->StatGCSyncPtPD[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, "The number of syncs per PD n.");

AssertRC(rc);

RTStrPrintf(szName, sizeof(szName), "/PGM/GC/PD/SyncPage/%04X", i);

rc = STAMR3Register(pVM, &pPGM->StatGCSyncPagePD[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, "The number of out of sync pages per page directory n.");

AssertRC(rc);

}

}

#endif /* VBOX_WITH_STATISTICS */

PGMR3DECL(int) PGMR3InitDynMap(PVM pVM)

{

/*

int rc = MMR3HyperReserve(pVM, PAGE_SIZE * (2 + ELEMENTS(pVM->pgm.s.apHCPaePDs) + 1 + 2 + 2), "Paging", &pVM->pgm.s.pGC32BitPD);

AssertRCReturn(rc, rc);

MMR3HyperReserve(pVM, PAGE_SIZE, "fence", NULL);

/*

/** @todo r=bird: Need to verify that the checks for crossing PTs are correct here. They seems to be assuming 4MB PTs.. */

rc = MMR3HyperReserve(pVM, MM_HYPER_DYNAMIC_SIZE, "Dynamic mapping", &pVM->pgm.s.pbDynPageMapBaseGC);

if ( VBOX_SUCCESS(rc)

&& (pVM->pgm.s.pbDynPageMapBaseGC >> PGDIR_SHIFT) != ((pVM->pgm.s.pbDynPageMapBaseGC + MM_HYPER_DYNAMIC_SIZE - 1) >> PGDIR_SHIFT))

rc = MMR3HyperReserve(pVM, MM_HYPER_DYNAMIC_SIZE, "Dynamic mapping not crossing", &pVM->pgm.s.pbDynPageMapBaseGC);

if (VBOX_SUCCESS(rc))

{

AssertRelease((pVM->pgm.s.pbDynPageMapBaseGC >> PGDIR_SHIFT) == ((pVM->pgm.s.pbDynPageMapBaseGC + MM_HYPER_DYNAMIC_SIZE - 1) >> PGDIR_SHIFT));

MMR3HyperReserve(pVM, PAGE_SIZE, "fence", NULL);

}

return rc;

}

PGMR3DECL(int) PGMR3InitFinalize(PVM pVM)

{

/*

RTGCPTR GCPtr = pVM->pgm.s.pGC32BitPD;

AssertReleaseReturn(GCPtr, VERR_INTERNAL_ERROR);

int rc = PGMMap(pVM, GCPtr, pVM->pgm.s.HCPhys32BitPD, PAGE_SIZE, 0);

AssertRCReturn(rc, rc);

pVM->pgm.s.pGC32BitPD = GCPtr;

GCPtr += PAGE_SIZE;

GCPtr += PAGE_SIZE; /* reserved page */

for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.apHCPaePDs); i++)

{

rc = PGMMap(pVM, GCPtr, pVM->pgm.s.aHCPhysPaePDs[i], PAGE_SIZE, 0);

AssertRCReturn(rc, rc);

pVM->pgm.s.apGCPaePDs[i] = GCPtr;

GCPtr += PAGE_SIZE;

}

/* A bit of paranoia is justified. */

AssertRelease((RTGCUINTPTR)pVM->pgm.s.apGCPaePDs[0] + PAGE_SIZE == (RTGCUINTPTR)pVM->pgm.s.apGCPaePDs[1]);

AssertRelease((RTGCUINTPTR)pVM->pgm.s.apGCPaePDs[1] + PAGE_SIZE == (RTGCUINTPTR)pVM->pgm.s.apGCPaePDs[2]);

AssertRelease((RTGCUINTPTR)pVM->pgm.s.apGCPaePDs[2] + PAGE_SIZE == (RTGCUINTPTR)pVM->pgm.s.apGCPaePDs[3]);

GCPtr += PAGE_SIZE; /* reserved page */

rc = PGMMap(pVM, GCPtr, pVM->pgm.s.HCPhysPaePDPTR, PAGE_SIZE, 0);

AssertRCReturn(rc, rc);

pVM->pgm.s.pGCPaePDPTR = GCPtr;

GCPtr += PAGE_SIZE;

GCPtr += PAGE_SIZE; /* reserved page */

rc = PGMMap(pVM, GCPtr, pVM->pgm.s.HCPhysPaePML4, PAGE_SIZE, 0);

AssertRCReturn(rc, rc);

pVM->pgm.s.pGCPaePML4 = GCPtr;

GCPtr += PAGE_SIZE;

GCPtr += PAGE_SIZE; /* reserved page */

/*

/* get the pointer to the page table entries. */

PPGMMAPPING pMapping = pgmGetMapping(pVM, pVM->pgm.s.pbDynPageMapBaseGC);

AssertRelease(pMapping);

const uintptr_t off = pVM->pgm.s.pbDynPageMapBaseGC - pMapping->GCPtr;

const unsigned iPT = off >> X86_PD_SHIFT;

const unsigned iPG = (off >> X86_PT_SHIFT) & X86_PT_MASK;

pVM->pgm.s.paDynPageMap32BitPTEsGC = pMapping->aPTs[iPT].pPTGC + iPG * sizeof(pMapping->aPTs[0].pPTR3->a[0]);

pVM->pgm.s.paDynPageMapPaePTEsGC = pMapping->aPTs[iPT].paPaePTsGC + iPG * sizeof(pMapping->aPTs[0].paPaePTsR3->a[0]);

/* init cache */

RTHCPHYS HCPhysDummy = MMR3PageDummyHCPhys(pVM);

for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.aHCPhysDynPageMapCache); i++)

pVM->pgm.s.aHCPhysDynPageMapCache[i] = HCPhysDummy;

for (unsigned i = 0; i < MM_HYPER_DYNAMIC_SIZE; i += PAGE_SIZE)

{

rc = PGMMap(pVM, pVM->pgm.s.pbDynPageMapBaseGC + i, HCPhysDummy, PAGE_SIZE, 0);

AssertRCReturn(rc, rc);

}

return rc;

}

PGMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta)

{

LogFlow(("PGMR3Relocate\n"));

/*

pVM->pgm.s.GCPtrCR3Mapping += offDelta;

/** @todo move this into shadow and guest specific relocation functions. */

AssertMsg(pVM->pgm.s.pGC32BitPD, ("Init order, no relocation before paging is initialized!\n"));

pVM->pgm.s.pGC32BitPD += offDelta;

pVM->pgm.s.pGuestPDGC += offDelta;

for (unsigned i = 0; i < ELEMENTS(pVM->pgm.s.apGCPaePDs); i++)

pVM->pgm.s.apGCPaePDs[i] += offDelta;

pVM->pgm.s.pGCPaePDPTR += offDelta;

pVM->pgm.s.pGCPaePML4 += offDelta;

pgmR3ModeDataInit(pVM, true /* resolve GC/R0 symbols */);

pgmR3ModeDataSwitch(pVM, pVM->pgm.s.enmShadowMode, pVM->pgm.s.enmGuestMode);

PGM_SHW_PFN(Relocate, pVM)(pVM, offDelta);

PGM_GST_PFN(Relocate, pVM)(pVM, offDelta);

PGM_BTH_PFN(Relocate, pVM)(pVM, offDelta);

/*

pVM->pgm.s.pTreesGC = MMHyperHC2GC(pVM, pVM->pgm.s.pTreesHC);

/*

if (pVM->pgm.s.pRamRangesHC)

{

pVM->pgm.s.pRamRangesGC = MMHyperHC2GC(pVM, pVM->pgm.s.pRamRangesHC);

for (PPGMRAMRANGE pCur = pVM->pgm.s.pRamRangesHC; pCur->pNextHC; pCur = pCur->pNextHC)

{

pCur->pNextGC = MMHyperHC2GC(pVM, pCur->pNextHC);

if (pCur->pavHCChunkGC)

pCur->pavHCChunkGC = MMHyperHC2GC(pVM, pCur->pavHCChunkHC);

}

}

/*

pVM->pgm.s.pMappingsGC = MMHyperHC2GC(pVM, pVM->pgm.s.pMappingsR3);

for (PPGMMAPPING pCur = pVM->pgm.s.pMappingsR3; pCur->pNextR3; pCur = pCur->pNextR3)

pCur->pNextGC = MMHyperHC2GC(pVM, pCur->pNextR3);

/* Relocate GC addresses of Page Tables. */

for (PPGMMAPPING pCur = pVM->pgm.s.pMappingsR3; pCur; pCur = pCur->pNextR3)

{

for (RTHCUINT i = 0; i < pCur->cPTs; i++)

{

pCur->aPTs[i].pPTGC = MMHyperHC2GC(pVM, pCur->aPTs[i].pPTR3);

pCur->aPTs[i].paPaePTsGC = MMHyperHC2GC(pVM, pCur->aPTs[i].paPaePTsR3);

}

}

/*

pVM->pgm.s.paDynPageMap32BitPTEsGC += offDelta;

pVM->pgm.s.paDynPageMapPaePTEsGC += offDelta;

pVM->pgm.s.pbDynPageMapBaseGC += offDelta;

/*

RTAvlroGCPhysDoWithAll(&pVM->pgm.s.pTreesHC->PhysHandlers, true, pgmR3RelocatePhysHandler, &offDelta);

RTAvlroGCPtrDoWithAll(&pVM->pgm.s.pTreesHC->VirtHandlers, true, pgmR3RelocateVirtHandler, &offDelta);

/*

pgmR3PoolRelocate(pVM);

}

static DECLCALLBACK(int) pgmR3RelocatePhysHandler(PAVLROGCPHYSNODECORE pNode, void *pvUser)

{

PPGMPHYSHANDLER pHandler = (PPGMPHYSHANDLER)pNode;

RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;

Assert(pHandler->pfnHandlerGC);

pHandler->pfnHandlerGC += offDelta;

if (pHandler->pvUserGC)

pHandler->pvUserGC += offDelta;

return 0;

}

static DECLCALLBACK(int) pgmR3RelocateVirtHandler(PAVLROGCPTRNODECORE pNode, void *pvUser)

{

PPGMVIRTHANDLER pHandler = (PPGMVIRTHANDLER)pNode;

RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;

Assert(pHandler->pfnHandlerGC);

pHandler->pfnHandlerGC += offDelta;

return 0;

}

PGMR3DECL(void) PGMR3Reset(PVM pVM)

{

LogFlow(("PGMR3Reset:\n"));

VM_ASSERT_EMT(pVM);

/*

pVM->pgm.s.fMappingsFixed = false;

pVM->pgm.s.GCPtrMappingFixed = 0;

pVM->pgm.s.cbMappingFixed = 0;

int rc = PGM_GST_PFN(UnmonitorCR3, pVM)(pVM);

AssertRC(rc);

#ifdef DEBUG

PGMR3DumpMappings(pVM);

#endif

/*

pgmR3PoolReset(pVM);

/*

pVM->pgm.s.fA20Enabled = true;

/*

VM_FF_CLEAR(pVM, VM_FF_PGM_SYNC_CR3);

VM_FF_CLEAR(pVM, VM_FF_PGM_SYNC_CR3_NON_GLOBAL);

/*

for (PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesHC; pRam; pRam = pRam->pNextHC)

{

unsigned iPage = pRam->cb >> PAGE_SHIFT;

while (iPage-- > 0)

{

if (pRam->aHCPhys[iPage] & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2))

{

Log4(("PGMR3Reset: not clearing phys page %RGp due to flags %RHp\n", pRam->GCPhys + (iPage << PAGE_SHIFT), pRam->aHCPhys[iPage] & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO)));

continue;

}

if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)

{

unsigned iChunk = iPage >> (PGM_DYNAMIC_CHUNK_SHIFT - PAGE_SHIFT);

if (pRam->pavHCChunkHC[iChunk])

ASMMemZero32((char *)pRam->pavHCChunkHC[iChunk] + ((iPage << PAGE_SHIFT) & PGM_DYNAMIC_CHUNK_OFFSET_MASK), PAGE_SIZE);

}

else

ASMMemZero32((char *)pRam->pvHC + (iPage << PAGE_SHIFT), PAGE_SIZE);

}

}

/*

rc = pgmR3ChangeMode(pVM, PGMMODE_REAL);

AssertReleaseRC(rc);

STAM_REL_COUNTER_RESET(&pVM->pgm.s.cGuestModeChanges);

}

PGMR3DECL(int) PGMR3Term(PVM pVM)

{

return PDMR3CritSectDelete(&pVM->pgm.s.CritSect);

}

static DECLCALLBACK(int) pgmR3Save(PVM pVM, PSSMHANDLE pSSM)

{

PPGM pPGM = &pVM->pgm.s;

/*

#if 1

SSMR3PutBool(pSSM, pPGM->fMappingsFixed);

#else

SSMR3PutUInt(pSSM, pPGM->fMappingsFixed);

#endif

SSMR3PutGCPtr(pSSM, pPGM->GCPtrMappingFixed);

SSMR3PutU32(pSSM, pPGM->cbMappingFixed);

SSMR3PutUInt(pSSM, pPGM->cbRamSize);

SSMR3PutGCPhys(pSSM, pPGM->GCPhysA20Mask);

SSMR3PutUInt(pSSM, pPGM->fA20Enabled);

SSMR3PutUInt(pSSM, pPGM->fSyncFlags);

SSMR3PutUInt(pSSM, pPGM->enmGuestMode);

SSMR3PutU32(pSSM, ~0); /* Separator. */

/*

uint32_t i = 0;

for (PPGMMAPPING pMapping = pPGM->pMappingsR3; pMapping; pMapping = pMapping->pNextR3, i++)

{

SSMR3PutU32(pSSM, i);

SSMR3PutStrZ(pSSM, pMapping->pszDesc); /* This is the best unique id we have... */

SSMR3PutGCPtr(pSSM, pMapping->GCPtr);

SSMR3PutGCUIntPtr(pSSM, pMapping->cPTs);

/* flags are done by the mapping owners! */

}

SSMR3PutU32(pSSM, ~0); /* terminator. */

/*

i = 0;

for (PPGMRAMRANGE pRam = pPGM->pRamRangesHC; pRam; pRam = pRam->pNextHC, i++)

{

/** @todo MMIO ranges may move (PCI reconfig), we currently assume they don't. */

SSMR3PutU32(pSSM, i);

SSMR3PutGCPhys(pSSM, pRam->GCPhys);

SSMR3PutGCPhys(pSSM, pRam->GCPhysLast);

SSMR3PutGCPhys(pSSM, pRam->cb);

SSMR3PutU8(pSSM, !!pRam->pvHC); /* boolean indicating memory or not. */

/* Flags. */

const unsigned cPages = pRam->cb >> PAGE_SHIFT;

for (unsigned iPage = 0; iPage < cPages; iPage++)

SSMR3PutU16(pSSM, (uint16_t)(pRam->aHCPhys[iPage] & ~X86_PTE_PAE_PG_MASK));

/* any memory associated with the range. */

if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)

{

for (unsigned iChunk = 0; iChunk < (pRam->cb >> PGM_DYNAMIC_CHUNK_SHIFT); iChunk++)

{

if (pRam->pavHCChunkHC[iChunk])

{

SSMR3PutU8(pSSM, 1); /* chunk present */

SSMR3PutMem(pSSM, pRam->pavHCChunkHC[iChunk], PGM_DYNAMIC_CHUNK_SIZE);

}

else

SSMR3PutU8(pSSM, 0); /* no chunk present */

}

}

else if (pRam->pvHC)

{

int rc = SSMR3PutMem(pSSM, pRam->pvHC, pRam->cb);

if (VBOX_FAILURE(rc))

{

Log(("pgmR3Save: SSMR3PutMem(, %p, %#x) -> %Vrc\n", pRam->pvHC, pRam->cb, rc));

return rc;

}

}

}

return SSMR3PutU32(pSSM, ~0); /* terminator. */

}

static DECLCALLBACK(int) pgmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version)

{

/*

if (u32Version != PGM_SAVED_STATE_VERSION)

{

Log(("pgmR3Load: Invalid version u32Version=%d (current %d)!\n", u32Version, PGM_SAVED_STATE_VERSION));

return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;

}

/*

PGMR3Reset(pVM);

/*

PPGM pPGM = &pVM->pgm.s;

#if 1

SSMR3GetBool(pSSM, &pPGM->fMappingsFixed);

#else

uint32_t u;

SSMR3GetU32(pSSM, &u);

pPGM->fMappingsFixed = u;

#endif

SSMR3GetGCPtr(pSSM, &pPGM->GCPtrMappingFixed);

SSMR3GetU32(pSSM, &pPGM->cbMappingFixed);

RTUINT cbRamSize;

int rc = SSMR3GetU32(pSSM, &cbRamSize);

if (VBOX_FAILURE(rc))

return rc;

if (cbRamSize != pPGM->cbRamSize)

return VERR_SSM_LOAD_MEMORY_SIZE_MISMATCH;

SSMR3GetGCPhys(pSSM, &pPGM->GCPhysA20Mask);

SSMR3GetUInt(pSSM, &pPGM->fA20Enabled);

SSMR3GetUInt(pSSM, &pPGM->fSyncFlags);

RTUINT uGuestMode;

SSMR3GetUInt(pSSM, &uGuestMode);

pPGM->enmGuestMode = (PGMMODE)uGuestMode;

/* check separator. */

uint32_t u32Sep;

SSMR3GetU32(pSSM, &u32Sep);

if (VBOX_FAILURE(rc))

return rc;

if (u32Sep != (uint32_t)~0)

{

AssertMsgFailed(("u32Sep=%#x (first)\n", u32Sep));

return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;

}

/*

uint32_t i = 0;

for (;; i++)

{

/* Check the seqence number / separator. */

rc = SSMR3GetU32(pSSM, &u32Sep);

if (VBOX_FAILURE(rc))

return rc;

if (u32Sep == ~0U)

break;

if (u32Sep != i)

{

AssertMsgFailed(("u32Sep=%#x (last)\n", u32Sep));

return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;

}

/* get the mapping details. */

char szDesc[256];

szDesc[0] = '\0';

rc = SSMR3GetStrZ(pSSM, szDesc, sizeof(szDesc));

if (VBOX_FAILURE(rc))

return rc;

RTGCPTR GCPtr;

SSMR3GetGCPtr(pSSM, &GCPtr);

RTGCUINTPTR cPTs;

rc = SSMR3GetU32(pSSM, &cPTs);

if (VBOX_FAILURE(rc))

return rc;

/* find matching range. */

PPGMMAPPING pMapping;

for (pMapping = pPGM->pMappingsR3; pMapping; pMapping = pMapping->pNextR3)

if ( pMapping->cPTs == cPTs

&& !strcmp(pMapping->pszDesc, szDesc))

break;

if (!pMapping)

{

LogRel(("Couldn't find mapping: cPTs=%#x szDesc=%s (GCPtr=%VGv)\n",

cPTs, szDesc, GCPtr));

AssertFailed();

return VERR_SSM_LOAD_CONFIG_MISMATCH;

}

/* relocate it. */

if (pMapping->GCPtr != GCPtr)

{

AssertMsg((GCPtr >> PGDIR_SHIFT << PGDIR_SHIFT) == GCPtr, ("GCPtr=%VGv\n", GCPtr));

#if HC_ARCH_BITS == 64

LogRel(("Mapping: %VGv -> %VGv %s\n", pMapping->GCPtr, GCPtr, pMapping->pszDesc));

#endif

pgmR3MapRelocate(pVM, pMapping, pMapping->GCPtr >> PGDIR_SHIFT, GCPtr >> PGDIR_SHIFT);

}

else

Log(("pgmR3Load: '%s' needed no relocation (%VGv)\n", szDesc, GCPtr));

}

/*

i = 0;

for (PPGMRAMRANGE pRam = pPGM->pRamRangesHC; pRam; pRam = pRam->pNextHC, i++)

{

/** @todo MMIO ranges may move (PCI reconfig), we currently assume they don't. */

/* Check the seqence number / separator. */

rc = SSMR3GetU32(pSSM, &u32Sep);

if (VBOX_FAILURE(rc))

return rc;

if (u32Sep == ~0U)

break;

if (u32Sep != i)

{

AssertMsgFailed(("u32Sep=%#x (last)\n", u32Sep));

return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;

}

/* Get the range details. */

RTGCPHYS GCPhys;

SSMR3GetGCPhys(pSSM, &GCPhys);

RTGCPHYS GCPhysLast;

SSMR3GetGCPhys(pSSM, &GCPhysLast);

RTGCPHYS cb;

SSMR3GetGCPhys(pSSM, &cb);

uint8_t fHaveBits;

rc = SSMR3GetU8(pSSM, &fHaveBits);

if (VBOX_FAILURE(rc))

return rc;

if (fHaveBits & ~1)

{

AssertMsgFailed(("u32Sep=%#x (last)\n", u32Sep));

return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;

}

/* Match it up with the current range. */

if ( GCPhys != pRam->GCPhys

|| GCPhysLast != pRam->GCPhysLast

|| cb != pRam->cb

|| fHaveBits != !!pRam->pvHC)

{

LogRel(("Ram range: %VGp-%VGp %VGp bytes %s\n"

"State : %VGp-%VGp %VGp bytes %s\n",

pRam->GCPhys, pRam->GCPhysLast, pRam->cb, pRam->pvHC ? "bits" : "nobits",

GCPhys, GCPhysLast, cb, fHaveBits ? "bits" : "nobits"));

AssertFailed();

return VERR_SSM_LOAD_CONFIG_MISMATCH;

}

/* Flags. */

const unsigned cPages = pRam->cb >> PAGE_SHIFT;

for (unsigned iPage = 0; iPage < cPages; iPage++)

{

uint16_t u16 = 0;

SSMR3GetU16(pSSM, &u16);

u16 &= PAGE_OFFSET_MASK & ~( MM_RAM_FLAGS_VIRTUAL_HANDLER | MM_RAM_FLAGS_VIRTUAL_WRITE | MM_RAM_FLAGS_VIRTUAL_ALL

| MM_RAM_FLAGS_PHYSICAL_HANDLER | MM_RAM_FLAGS_PHYSICAL_WRITE | MM_RAM_FLAGS_PHYSICAL_ALL

| MM_RAM_FLAGS_PHYSICAL_TEMP_OFF );

pRam->aHCPhys[iPage] = (pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK) | (RTHCPHYS)u16;

}

/* any memory associated with the range. */

if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)

{

for (unsigned iChunk = 0; iChunk < (pRam->cb >> PGM_DYNAMIC_CHUNK_SHIFT); iChunk++)

{

uint8_t fValidChunk;

rc = SSMR3GetU8(pSSM, &fValidChunk);

if (VBOX_FAILURE(rc))

return rc;

if (fValidChunk > 1)

return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;

if (fValidChunk)

{

if (!pRam->pavHCChunkHC[iChunk])

{

rc = pgmr3PhysGrowRange(pVM, pRam->GCPhys + iChunk * PGM_DYNAMIC_CHUNK_SIZE);

if (VBOX_FAILURE(rc))

return rc;

}

Assert(pRam->pavHCChunkHC[iChunk]);

SSMR3GetMem(pSSM, pRam->pavHCChunkHC[iChunk], PGM_DYNAMIC_CHUNK_SIZE);

}

/* else nothing to do */

}

}

else if (pRam->pvHC)

{

int rc = SSMR3GetMem(pSSM, pRam->pvHC, pRam->cb);

if (VBOX_FAILURE(rc))

{

Log(("pgmR3Save: SSMR3GetMem(, %p, %#x) -> %Vrc\n", pRam->pvHC, pRam->cb, rc));

return rc;

}

}

}

/*

VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3_NON_GLOBAL);

VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);

pPGM->fSyncFlags |= PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL;

pPGM->fPhysCacheFlushPending = true;

pgmR3HandlerPhysicalUpdateAll(pVM);

/*

return pgmR3ChangeMode(pVM, pPGM->enmGuestMode);

}

static DECLCALLBACK(void) pgmR3InfoMode(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)

{

/* digest argument. */

bool fGuest, fShadow, fHost;

if (pszArgs)

pszArgs = RTStrStripL(pszArgs);

if (!pszArgs || !*pszArgs || strstr(pszArgs, "all"))

fShadow = fHost = fGuest = true;

else

{

fShadow = fHost = fGuest = false;

if (strstr(pszArgs, "guest"))

fGuest = true;

if (strstr(pszArgs, "shadow"))

fShadow = true;

if (strstr(pszArgs, "host"))

fHost = true;

}

/* print info. */

if (fGuest)

pHlp->pfnPrintf(pHlp, "Guest paging mode: %s, changed %RU64 times, A20 %s\n",

PGMGetModeName(pVM->pgm.s.enmGuestMode), pVM->pgm.s.cGuestModeChanges.c,

pVM->pgm.s.fA20Enabled ? "enabled" : "disabled");

if (fShadow)

pHlp->pfnPrintf(pHlp, "Shadow paging mode: %s\n", PGMGetModeName(pVM->pgm.s.enmShadowMode));

if (fHost)

{

const char *psz;

switch (pVM->pgm.s.enmHostMode)

{

case SUPPAGINGMODE_INVALID: psz = "invalid"; break;

case SUPPAGINGMODE_32_BIT: psz = "32-bit"; break;

case SUPPAGINGMODE_32_BIT_GLOBAL: psz = "32-bit+G"; break;

case SUPPAGINGMODE_PAE: psz = "PAE"; break;

case SUPPAGINGMODE_PAE_GLOBAL: psz = "PAE+G"; break;

case SUPPAGINGMODE_PAE_NX: psz = "PAE+NX"; break;

case SUPPAGINGMODE_PAE_GLOBAL_NX: psz = "PAE+G+NX"; break;

case SUPPAGINGMODE_AMD64: psz = "AMD64"; break;

case SUPPAGINGMODE_AMD64_GLOBAL: psz = "AMD64+G"; break;

case SUPPAGINGMODE_AMD64_NX: psz = "AMD64+NX"; break;

case SUPPAGINGMODE_AMD64_GLOBAL_NX: psz = "AMD64+G+NX"; break;

default: psz = "unknown"; break;

}

pHlp->pfnPrintf(pHlp, "Host paging mode: %s\n", psz);

}

}

static DECLCALLBACK(void) pgmR3PhysInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)

{

NOREF(pszArgs);

pHlp->pfnPrintf(pHlp,

"RAM ranges (pVM=%p)\n"

"%.*s %.*s\n",

pVM,

sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",

sizeof(RTHCPTR) * 2, "pvHC ");

for (PPGMRAMRANGE pCur = pVM->pgm.s.pRamRangesHC; pCur; pCur = pCur->pNextHC)

pHlp->pfnPrintf(pHlp,

"%VGp-%VGp %VHv\n",

pCur->GCPhys,

pCur->GCPhysLast,

pCur->pvHC);

}

static DECLCALLBACK(void) pgmR3InfoCr3(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)

{

/* Big pages supported? */

const bool fPSE = !!(CPUMGetGuestCR4(pVM) & X86_CR4_PSE);

/* Global pages supported? */

const bool fPGE = !!(CPUMGetGuestCR4(pVM) & X86_CR4_PGE);

NOREF(pszArgs);

/*

PVBOXPD pPDSrc = pVM->pgm.s.pGuestPDHC;

Assert(pPDSrc);

Assert(MMPhysGCPhys2HCVirt(pVM, (RTGCPHYS)(CPUMGetGuestCR3(pVM) & X86_CR3_PAGE_MASK), sizeof(*pPDSrc)) == pPDSrc);

/*

for (unsigned iPD = 0; iPD < ELEMENTS(pPDSrc->a); iPD++)

{

VBOXPDE PdeSrc = pPDSrc->a[iPD];

if (PdeSrc.n.u1Present)

{

if (PdeSrc.b.u1Size && fPSE)

{

pHlp->pfnPrintf(pHlp,

"%04X - %VGp P=%d U=%d RW=%d G=%d - BIG\n",

iPD,

PdeSrc.u & X86_PDE_PG_MASK,

PdeSrc.b.u1Present, PdeSrc.b.u1User, PdeSrc.b.u1Write, PdeSrc.b.u1Global && fPGE);

}

else

{

pHlp->pfnPrintf(pHlp,

"%04X - %VGp P=%d U=%d RW=%d [G=%d]\n",

iPD,

PdeSrc.u & X86_PDE4M_PG_MASK,

PdeSrc.n.u1Present, PdeSrc.n.u1User, PdeSrc.n.u1Write, PdeSrc.b.u1Global && fPGE);

}

}

}

}

PDMR3DECL(int) PGMR3LockCall(PVM pVM)

{

return pgmLock(pVM);

}

DECLINLINE(unsigned) pgmModeToType(PGMMODE pgmMode)

{

switch (pgmMode)

{

case PGMMODE_REAL: return PGM_TYPE_REAL;

case PGMMODE_PROTECTED: return PGM_TYPE_PROT;

case PGMMODE_32_BIT: return PGM_TYPE_32BIT;

case PGMMODE_PAE:

case PGMMODE_PAE_NX: return PGM_TYPE_PAE;

case PGMMODE_AMD64:

case PGMMODE_AMD64_NX: return PGM_TYPE_AMD64;

default:

AssertFatalMsgFailed(("pgmMode=%d\n", pgmMode));

}

}

DECLINLINE(unsigned) pgmModeDataIndex(unsigned uShwType, unsigned uGstType)

{

Assert(uShwType >= PGM_TYPE_32BIT && uShwType <= PGM_TYPE_AMD64);

Assert(uGstType >= PGM_TYPE_REAL && uGstType <= PGM_TYPE_AMD64);

return (uShwType - PGM_TYPE_32BIT) * (PGM_TYPE_AMD64 - PGM_TYPE_32BIT + 1)

+ (uGstType - PGM_TYPE_REAL);

}

DECLINLINE(unsigned) pgmModeDataIndexByMode(PGMMODE enmShw, PGMMODE enmGst)

{

Assert(enmShw >= PGMMODE_32_BIT && enmShw <= PGMMODE_MAX);

Assert(enmGst > PGMMODE_INVALID && enmGst < PGMMODE_MAX);

return pgmModeDataIndex(pgmModeToType(enmShw), pgmModeToType(enmGst));

}

DECLINLINE(unsigned) pgmModeDataMaxIndex(void)

{

return pgmModeDataIndex(PGM_TYPE_AMD64, PGM_TYPE_AMD64) + 1;

}

static int pgmR3ModeDataInit(PVM pVM, bool fResolveGCAndR0)

{

PPGMMODEDATA pModeData;

int rc;

/*

if (!pVM->pgm.s.paModeData)

{

pVM->pgm.s.paModeData = (PPGMMODEDATA)MMR3HeapAllocZ(pVM, MM_TAG_PGM, sizeof(PGMMODEDATA) * pgmModeDataMaxIndex());

AssertReturn(pVM->pgm.s.paModeData, VERR_NO_MEMORY);

}

/*

pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_32BIT, PGM_TYPE_REAL)];

pModeData->uShwType = PGM_TYPE_32BIT;

pModeData->uGstType = PGM_TYPE_REAL;

rc = PGM_SHW_NAME_32BIT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);

rc = PGM_GST_NAME_REAL(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);

rc = PGM_BTH_NAME_32BIT_REAL(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);

pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_32BIT, PGMMODE_PROTECTED)];

pModeData->uShwType = PGM_TYPE_32BIT;

pModeData->uGstType = PGM_TYPE_PROT;

rc = PGM_SHW_NAME_32BIT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);

rc = PGM_GST_NAME_PROT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);

rc = PGM_BTH_NAME_32BIT_PROT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);

pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_32BIT, PGM_TYPE_32BIT)];

pModeData->uShwType = PGM_TYPE_32BIT;

pModeData->uGstType = PGM_TYPE_32BIT;

rc = PGM_SHW_NAME_32BIT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);

rc = PGM_GST_NAME_32BIT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);

rc = PGM_BTH_NAME_32BIT_32BIT(InitData)(pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);

pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_PAE, PGM_TYPE_REAL)];

pModeData->uShwType = PGM_TYPE_PAE;

pModeData->uGstType = PGM_TYPE_REAL;

rc = PGM_SHW_NAME_PAE(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);

rc = PGM_GST_NAME_REAL(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);