148N/A

148N/A

148N/A

148N/A#define RTSEMRW_WITHOUT_REMAPPING

148N/A#define RTASSERT_QUIET

844N/A#include <iprt/semaphore.h>

844N/A#include "internal/iprt.h"

148N/A

1273N/A#include <iprt/asm.h>

148N/A#include <iprt/assert.h>

1002N/A#include <iprt/err.h>

1002N/A#include <iprt/lockvalidator.h>

1002N/A#include <iprt/mem.h>

1002N/A#include <iprt/thread.h>

1002N/A

1002N/A#include "internal/magics.h"

148N/A#include "internal/strict.h"

148N/A

148N/A

148N/Atypedef struct RTSEMRWINTERNAL

148N/A{

148N/A /** Magic value (RTSEMRW_MAGIC). */

148N/A uint32_t volatile u32Magic;

148N/A uint32_t u32Padding; /**< alignment padding.*/

148N/A /* The state variable.

727N/A uint64_t volatile u64State;

727N/A /** The write owner. */

822N/A RTNATIVETHREAD volatile hNativeWriter;

822N/A /** The number of reads made by the current writer. */

727N/A uint32_t volatile cWriterReads;

727N/A /** The number of reads made by the current writer. */

727N/A uint32_t volatile cWriteRecursions;

727N/A

822N/A /** What the writer threads are blocking on. */

727N/A RTSEMEVENT hEvtWrite;

727N/A /** What the read threads are blocking on when waiting for the writer to

148N/A RTSEMEVENTMULTI hEvtRead;

148N/A /** Indicates whether hEvtRead needs resetting. */

148N/A bool volatile fNeedReset;

560N/A

727N/A#ifdef RTSEMRW_STRICT

148N/A /** The validator record for the writer. */

181N/A RTLOCKVALRECEXCL ValidatorWrite;

148N/A /** The validator record for the readers. */

148N/A RTLOCKVALRECSHRD ValidatorRead;

148N/A#endif

148N/A} RTSEMRWINTERNAL;

#define RTSEMRW_CNT_BITS 15

#define RTSEMRW_CNT_MASK UINT64_C(0x00007fff)

#define RTSEMRW_CNT_RD_SHIFT 0

#define RTSEMRW_CNT_RD_MASK (RTSEMRW_CNT_MASK << RTSEMRW_CNT_RD_SHIFT)

#define RTSEMRW_CNT_WR_SHIFT 16

#define RTSEMRW_CNT_WR_MASK (RTSEMRW_CNT_MASK << RTSEMRW_CNT_WR_SHIFT)

#define RTSEMRW_DIR_SHIFT 31

#define RTSEMRW_DIR_MASK RT_BIT_64(RTSEMRW_DIR_SHIFT)

#define RTSEMRW_DIR_READ UINT64_C(0)

#define RTSEMRW_DIR_WRITE UINT64_C(1)

#define RTSEMRW_WAIT_CNT_RD_SHIFT 32

#define RTSEMRW_WAIT_CNT_RD_MASK (RTSEMRW_CNT_MASK << RTSEMRW_WAIT_CNT_RD_SHIFT)

RTDECL(int) RTSemRWCreate(PRTSEMRW phRWSem)

{

return RTSemRWCreateEx(phRWSem, 0 /*fFlags*/, NIL_RTLOCKVALCLASS, RTLOCKVAL_SUB_CLASS_NONE, "RTSemRW");

}

RT_EXPORT_SYMBOL(RTSemRWCreate);

RTDECL(int) RTSemRWCreateEx(PRTSEMRW phRWSem, uint32_t fFlags,

RTLOCKVALCLASS hClass, uint32_t uSubClass, const char *pszNameFmt, ...)

{

AssertReturn(!(fFlags & ~RTSEMRW_FLAGS_NO_LOCK_VAL), VERR_INVALID_PARAMETER);

RTSEMRWINTERNAL *pThis = (RTSEMRWINTERNAL *)RTMemAlloc(sizeof(*pThis));

if (!pThis)

return VERR_NO_MEMORY;

int rc = RTSemEventMultiCreate(&pThis->hEvtRead);

if (RT_SUCCESS(rc))

{

rc = RTSemEventCreate(&pThis->hEvtWrite);

if (RT_SUCCESS(rc))

{

pThis->u32Magic = RTSEMRW_MAGIC;

pThis->u32Padding = 0;

pThis->u64State = 0;

pThis->hNativeWriter = NIL_RTNATIVETHREAD;

pThis->cWriterReads = 0;

pThis->cWriteRecursions = 0;

pThis->fNeedReset = false;

#ifdef RTSEMRW_STRICT

bool const fLVEnabled = !(fFlags & RTSEMRW_FLAGS_NO_LOCK_VAL);

if (!pszNameFmt)

{

static uint32_t volatile s_iSemRWAnon = 0;

uint32_t i = ASMAtomicIncU32(&s_iSemRWAnon) - 1;

RTLockValidatorRecExclInit(&pThis->ValidatorWrite, hClass, uSubClass, pThis,

fLVEnabled, "RTSemRW-%u", i);

RTLockValidatorRecSharedInit(&pThis->ValidatorRead, hClass, uSubClass, pThis,

false /*fSignaller*/, fLVEnabled, "RTSemRW-%u", i);

}

else

{

va_list va;

va_start(va, pszNameFmt);

RTLockValidatorRecExclInitV(&pThis->ValidatorWrite, hClass, uSubClass, pThis,

fLVEnabled, pszNameFmt, va);

va_end(va);

va_start(va, pszNameFmt);

RTLockValidatorRecSharedInitV(&pThis->ValidatorRead, hClass, uSubClass, pThis,

false /*fSignaller*/, fLVEnabled, pszNameFmt, va);

va_end(va);

}

RTLockValidatorRecMakeSiblings(&pThis->ValidatorWrite.Core, &pThis->ValidatorRead.Core);

#endif

*phRWSem = pThis;

return VINF_SUCCESS;

}

RTSemEventMultiDestroy(pThis->hEvtRead);

}

return rc;

}

RT_EXPORT_SYMBOL(RTSemRWCreateEx);

RTDECL(int) RTSemRWDestroy(RTSEMRW hRWSem)

{

/*

RTSEMRWINTERNAL *pThis = hRWSem;

if (pThis == NIL_RTSEMRW)

return VINF_SUCCESS;

AssertPtrReturn(pThis, VERR_INVALID_HANDLE);

AssertReturn(pThis->u32Magic == RTSEMRW_MAGIC, VERR_INVALID_HANDLE);

Assert(!(ASMAtomicReadU64(&pThis->u64State) & (RTSEMRW_CNT_RD_MASK | RTSEMRW_CNT_WR_MASK)));

/*

AssertReturn(ASMAtomicCmpXchgU32(&pThis->u32Magic, ~RTSEMRW_MAGIC, RTSEMRW_MAGIC), VERR_INVALID_HANDLE);

RTSEMEVENTMULTI hEvtRead;

ASMAtomicXchgHandle(&pThis->hEvtRead, NIL_RTSEMEVENTMULTI, &hEvtRead);

int rc = RTSemEventMultiDestroy(hEvtRead);

AssertRC(rc);

RTSEMEVENT hEvtWrite;

ASMAtomicXchgHandle(&pThis->hEvtWrite, NIL_RTSEMEVENT, &hEvtWrite);

rc = RTSemEventDestroy(hEvtWrite);

AssertRC(rc);

#ifdef RTSEMRW_STRICT

RTLockValidatorRecSharedDelete(&pThis->ValidatorRead);

RTLockValidatorRecExclDelete(&pThis->ValidatorWrite);

#endif

RTMemFree(pThis);

return VINF_SUCCESS;

}

RT_EXPORT_SYMBOL(RTSemRWDestroy);

RTDECL(uint32_t) RTSemRWSetSubClass(RTSEMRW hRWSem, uint32_t uSubClass)

{

#ifdef RTSEMRW_STRICT

/*

struct RTSEMRWINTERNAL *pThis = hRWSem;

AssertPtrReturn(pThis, RTLOCKVAL_SUB_CLASS_INVALID);

AssertReturn(pThis->u32Magic == RTSEMRW_MAGIC, RTLOCKVAL_SUB_CLASS_INVALID);

RTLockValidatorRecSharedSetSubClass(&pThis->ValidatorRead, uSubClass);

return RTLockValidatorRecExclSetSubClass(&pThis->ValidatorWrite, uSubClass);

#else

return RTLOCKVAL_SUB_CLASS_INVALID;

#endif

}

RT_EXPORT_SYMBOL(RTSemRWSetSubClass);

static int rtSemRWRequestRead(RTSEMRW hRWSem, RTMSINTERVAL cMillies, bool fInterruptible, PCRTLOCKVALSRCPOS pSrcPos)

{

/*

RTSEMRWINTERNAL *pThis = hRWSem;

if (pThis == NIL_RTSEMRW)

return VINF_SUCCESS;

AssertPtrReturn(pThis, VERR_INVALID_HANDLE);

AssertReturn(pThis->u32Magic == RTSEMRW_MAGIC, VERR_INVALID_HANDLE);

#ifdef RTSEMRW_STRICT

RTTHREAD hThreadSelf = RTThreadSelfAutoAdopt();

if (cMillies > 0)

{

int rc9;

RTNATIVETHREAD hNativeWriter;

ASMAtomicUoReadHandle(&pThis->hNativeWriter, &hNativeWriter);

if (hNativeWriter != NIL_RTTHREAD && hNativeWriter == RTThreadNativeSelf())

rc9 = RTLockValidatorRecExclCheckOrder(&pThis->ValidatorWrite, hThreadSelf, pSrcPos, cMillies);

else

rc9 = RTLockValidatorRecSharedCheckOrder(&pThis->ValidatorRead, hThreadSelf, pSrcPos, cMillies);

if (RT_FAILURE(rc9))

return rc9;

}

#endif

/*

uint64_t u64State = ASMAtomicReadU64(&pThis->u64State);

uint64_t u64OldState = u64State;

for (;;)

{

if ((u64State & RTSEMRW_DIR_MASK) == (RTSEMRW_DIR_READ << RTSEMRW_DIR_SHIFT))

{

/* It flows in the right direction, try follow it before it changes. */

uint64_t c = (u64State & RTSEMRW_CNT_RD_MASK) >> RTSEMRW_CNT_RD_SHIFT;

c++;

Assert(c < RTSEMRW_CNT_MASK / 2);

u64State &= ~RTSEMRW_CNT_RD_MASK;

u64State |= c << RTSEMRW_CNT_RD_SHIFT;

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

{

#ifdef RTSEMRW_STRICT

RTLockValidatorRecSharedAddOwner(&pThis->ValidatorRead, hThreadSelf, pSrcPos);

#endif

break;

}

}

else if ((u64State & (RTSEMRW_CNT_RD_MASK | RTSEMRW_CNT_WR_MASK)) == 0)

{

/* Wrong direction, but we're alone here and can simply try switch the direction. */

u64State &= ~(RTSEMRW_CNT_RD_MASK | RTSEMRW_CNT_WR_MASK | RTSEMRW_DIR_MASK);

u64State |= (UINT64_C(1) << RTSEMRW_CNT_RD_SHIFT) | (RTSEMRW_DIR_READ << RTSEMRW_DIR_SHIFT);

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

{

Assert(!pThis->fNeedReset);

#ifdef RTSEMRW_STRICT

RTLockValidatorRecSharedAddOwner(&pThis->ValidatorRead, hThreadSelf, pSrcPos);

#endif

break;

}

}

else

{

/* Is the writer perhaps doing a read recursion? */

RTNATIVETHREAD hNativeSelf = RTThreadNativeSelf();

RTNATIVETHREAD hNativeWriter;

ASMAtomicUoReadHandle(&pThis->hNativeWriter, &hNativeWriter);

if (hNativeSelf == hNativeWriter)

{

#ifdef RTSEMRW_STRICT

int rc9 = RTLockValidatorRecExclRecursionMixed(&pThis->ValidatorWrite, &pThis->ValidatorRead.Core, pSrcPos);

if (RT_FAILURE(rc9))

return rc9;

#endif

Assert(pThis->cWriterReads < UINT32_MAX / 2);

ASMAtomicIncU32(&pThis->cWriterReads);

return VINF_SUCCESS; /* don't break! */

}

/* If the timeout is 0, return already. */

if (!cMillies)

return VERR_TIMEOUT;

/* Add ourselves to the queue and wait for the direction to change. */

uint64_t c = (u64State & RTSEMRW_CNT_RD_MASK) >> RTSEMRW_CNT_RD_SHIFT;

c++;

Assert(c < RTSEMRW_CNT_MASK / 2);

uint64_t cWait = (u64State & RTSEMRW_WAIT_CNT_RD_MASK) >> RTSEMRW_WAIT_CNT_RD_SHIFT;

cWait++;

Assert(cWait <= c);

Assert(cWait < RTSEMRW_CNT_MASK / 2);

u64State &= ~(RTSEMRW_CNT_RD_MASK | RTSEMRW_WAIT_CNT_RD_MASK);

u64State |= (c << RTSEMRW_CNT_RD_SHIFT) | (cWait << RTSEMRW_WAIT_CNT_RD_SHIFT);

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

{

for (uint32_t iLoop = 0; ; iLoop++)

{

int rc;

#ifdef RTSEMRW_STRICT

rc = RTLockValidatorRecSharedCheckBlocking(&pThis->ValidatorRead, hThreadSelf, pSrcPos, true,

cMillies, RTTHREADSTATE_RW_READ, false);

if (RT_SUCCESS(rc))

#else

RTTHREAD hThreadSelf = RTThreadSelf();

RTThreadBlocking(hThreadSelf, RTTHREADSTATE_RW_READ, false);

#endif

{

if (fInterruptible)

rc = RTSemEventMultiWaitNoResume(pThis->hEvtRead, cMillies);

else

rc = RTSemEventMultiWait(pThis->hEvtRead, cMillies);

RTThreadUnblocked(hThreadSelf, RTTHREADSTATE_RW_READ);

if (pThis->u32Magic != RTSEMRW_MAGIC)

return VERR_SEM_DESTROYED;

}

if (RT_FAILURE(rc))

{

/* Decrement the counts and return the error. */

for (;;)

{

u64OldState = u64State = ASMAtomicReadU64(&pThis->u64State);

c = (u64State & RTSEMRW_CNT_RD_MASK) >> RTSEMRW_CNT_RD_SHIFT; Assert(c > 0);

c--;

cWait = (u64State & RTSEMRW_WAIT_CNT_RD_MASK) >> RTSEMRW_WAIT_CNT_RD_SHIFT; Assert(cWait > 0);

cWait--;

u64State &= ~(RTSEMRW_CNT_RD_MASK | RTSEMRW_WAIT_CNT_RD_MASK);

u64State |= (c << RTSEMRW_CNT_RD_SHIFT) | (cWait << RTSEMRW_WAIT_CNT_RD_SHIFT);

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

break;

}

return rc;

}

Assert(pThis->fNeedReset);

u64State = ASMAtomicReadU64(&pThis->u64State);

if ((u64State & RTSEMRW_DIR_MASK) == (RTSEMRW_DIR_READ << RTSEMRW_DIR_SHIFT))

break;

AssertMsg(iLoop < 1, ("%u\n", iLoop));

}

/* Decrement the wait count and maybe reset the semaphore (if we're last). */

for (;;)

{

u64OldState = u64State;

cWait = (u64State & RTSEMRW_WAIT_CNT_RD_MASK) >> RTSEMRW_WAIT_CNT_RD_SHIFT;

Assert(cWait > 0);

cWait--;

u64State &= ~RTSEMRW_WAIT_CNT_RD_MASK;

u64State |= cWait << RTSEMRW_WAIT_CNT_RD_SHIFT;

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

{

if (cWait == 0)

{

if (ASMAtomicXchgBool(&pThis->fNeedReset, false))

{

int rc = RTSemEventMultiReset(pThis->hEvtRead);

AssertRCReturn(rc, rc);

}

}

break;

}

u64State = ASMAtomicReadU64(&pThis->u64State);

}

#ifdef RTSEMRW_STRICT

RTLockValidatorRecSharedAddOwner(&pThis->ValidatorRead, hThreadSelf, pSrcPos);

#endif

break;

}

}

if (pThis->u32Magic != RTSEMRW_MAGIC)

return VERR_SEM_DESTROYED;

ASMNopPause();

u64State = ASMAtomicReadU64(&pThis->u64State);

u64OldState = u64State;

}

/* got it! */

Assert((ASMAtomicReadU64(&pThis->u64State) & RTSEMRW_DIR_MASK) == (RTSEMRW_DIR_READ << RTSEMRW_DIR_SHIFT));

return VINF_SUCCESS;

}

RTDECL(int) RTSemRWRequestRead(RTSEMRW hRWSem, RTMSINTERVAL cMillies)

{

#ifndef RTSEMRW_STRICT

return rtSemRWRequestRead(hRWSem, cMillies, false, NULL);

#else

RTLOCKVALSRCPOS SrcPos = RTLOCKVALSRCPOS_INIT_NORMAL_API();

return rtSemRWRequestRead(hRWSem, cMillies, false, &SrcPos);

#endif

}

RT_EXPORT_SYMBOL(RTSemRWRequestRead);

RTDECL(int) RTSemRWRequestReadDebug(RTSEMRW hRWSem, RTMSINTERVAL cMillies, RTHCUINTPTR uId, RT_SRC_POS_DECL)

{

RTLOCKVALSRCPOS SrcPos = RTLOCKVALSRCPOS_INIT_DEBUG_API();

return rtSemRWRequestRead(hRWSem, cMillies, false, &SrcPos);

}

RT_EXPORT_SYMBOL(RTSemRWRequestReadDebug);

RTDECL(int) RTSemRWRequestReadNoResume(RTSEMRW hRWSem, RTMSINTERVAL cMillies)

{

#ifndef RTSEMRW_STRICT

return rtSemRWRequestRead(hRWSem, cMillies, true, NULL);

#else

RTLOCKVALSRCPOS SrcPos = RTLOCKVALSRCPOS_INIT_NORMAL_API();

return rtSemRWRequestRead(hRWSem, cMillies, true, &SrcPos);

#endif

}

RT_EXPORT_SYMBOL(RTSemRWRequestReadNoResume);

RTDECL(int) RTSemRWRequestReadNoResumeDebug(RTSEMRW hRWSem, RTMSINTERVAL cMillies, RTHCUINTPTR uId, RT_SRC_POS_DECL)

{

RTLOCKVALSRCPOS SrcPos = RTLOCKVALSRCPOS_INIT_DEBUG_API();

return rtSemRWRequestRead(hRWSem, cMillies, true, &SrcPos);

}

RT_EXPORT_SYMBOL(RTSemRWRequestReadNoResumeDebug);

RTDECL(int) RTSemRWReleaseRead(RTSEMRW hRWSem)

{

/*

RTSEMRWINTERNAL *pThis = hRWSem;

AssertPtrReturn(pThis, VERR_INVALID_HANDLE);

AssertReturn(pThis->u32Magic == RTSEMRW_MAGIC, VERR_INVALID_HANDLE);

/*

uint64_t u64State = ASMAtomicReadU64(&pThis->u64State);

uint64_t u64OldState = u64State;

if ((u64State & RTSEMRW_DIR_MASK) == (RTSEMRW_DIR_READ << RTSEMRW_DIR_SHIFT))

{

#ifdef RTSEMRW_STRICT

int rc9 = RTLockValidatorRecSharedCheckAndRelease(&pThis->ValidatorRead, NIL_RTTHREAD);

if (RT_FAILURE(rc9))

return rc9;

#endif

for (;;)

{

uint64_t c = (u64State & RTSEMRW_CNT_RD_MASK) >> RTSEMRW_CNT_RD_SHIFT;

AssertReturn(c > 0, VERR_NOT_OWNER);

c--;

if ( c > 0

|| (u64State & RTSEMRW_CNT_RD_MASK) == 0)

{

/* Don't change the direction. */

u64State &= ~RTSEMRW_CNT_RD_MASK;

u64State |= c << RTSEMRW_CNT_RD_SHIFT;

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

break;

}

else

{

/* Reverse the direction and signal the reader threads. */

u64State &= ~(RTSEMRW_CNT_RD_MASK | RTSEMRW_DIR_MASK);

u64State |= RTSEMRW_DIR_WRITE << RTSEMRW_DIR_SHIFT;

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

{

int rc = RTSemEventSignal(pThis->hEvtWrite);

AssertRC(rc);

break;

}

}

ASMNopPause();

u64State = ASMAtomicReadU64(&pThis->u64State);

u64OldState = u64State;

}

}

else

{

RTNATIVETHREAD hNativeSelf = RTThreadNativeSelf();

RTNATIVETHREAD hNativeWriter;

ASMAtomicUoReadHandle(&pThis->hNativeWriter, &hNativeWriter);

AssertReturn(hNativeSelf == hNativeWriter, VERR_NOT_OWNER);

AssertReturn(pThis->cWriterReads > 0, VERR_NOT_OWNER);

#ifdef RTSEMRW_STRICT

int rc = RTLockValidatorRecExclUnwindMixed(&pThis->ValidatorWrite, &pThis->ValidatorRead.Core);

if (RT_FAILURE(rc))

return rc;

#endif

ASMAtomicDecU32(&pThis->cWriterReads);

}

return VINF_SUCCESS;

}

RT_EXPORT_SYMBOL(RTSemRWReleaseRead);

DECL_FORCE_INLINE(int) rtSemRWRequestWrite(RTSEMRW hRWSem, RTMSINTERVAL cMillies, bool fInterruptible, PCRTLOCKVALSRCPOS pSrcPos)

{

/*

RTSEMRWINTERNAL *pThis = hRWSem;

if (pThis == NIL_RTSEMRW)

return VINF_SUCCESS;

AssertPtrReturn(pThis, VERR_INVALID_HANDLE);

AssertReturn(pThis->u32Magic == RTSEMRW_MAGIC, VERR_INVALID_HANDLE);

#ifdef RTSEMRW_STRICT

RTTHREAD hThreadSelf = NIL_RTTHREAD;

if (cMillies)

{

hThreadSelf = RTThreadSelfAutoAdopt();

int rc9 = RTLockValidatorRecExclCheckOrder(&pThis->ValidatorWrite, hThreadSelf, pSrcPos, cMillies);

if (RT_FAILURE(rc9))

return rc9;

}

#endif

/*

RTNATIVETHREAD hNativeSelf = RTThreadNativeSelf();

RTNATIVETHREAD hNativeWriter;

ASMAtomicUoReadHandle(&pThis->hNativeWriter, &hNativeWriter);

if (hNativeSelf == hNativeWriter)

{

Assert((ASMAtomicReadU64(&pThis->u64State) & RTSEMRW_DIR_MASK) == (RTSEMRW_DIR_WRITE << RTSEMRW_DIR_SHIFT));

#ifdef RTSEMRW_STRICT

int rc9 = RTLockValidatorRecExclRecursion(&pThis->ValidatorWrite, pSrcPos);

if (RT_FAILURE(rc9))

return rc9;

#endif

Assert(pThis->cWriteRecursions < UINT32_MAX / 2);

ASMAtomicIncU32(&pThis->cWriteRecursions);

return VINF_SUCCESS;

}

/*

uint64_t u64State = ASMAtomicReadU64(&pThis->u64State);

uint64_t u64OldState = u64State;

for (;;)

{

if ( (u64State & RTSEMRW_DIR_MASK) == (RTSEMRW_DIR_WRITE << RTSEMRW_DIR_SHIFT)

|| (u64State & (RTSEMRW_CNT_RD_MASK | RTSEMRW_CNT_WR_MASK)) != 0)

{

/* It flows in the right direction, try follow it before it changes. */

uint64_t c = (u64State & RTSEMRW_CNT_WR_MASK) >> RTSEMRW_CNT_WR_SHIFT;

c++;

Assert(c < RTSEMRW_CNT_MASK / 2);

u64State &= ~RTSEMRW_CNT_WR_MASK;

u64State |= c << RTSEMRW_CNT_WR_SHIFT;

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

break;

}

else if ((u64State & (RTSEMRW_CNT_RD_MASK | RTSEMRW_CNT_WR_MASK)) == 0)

{

/* Wrong direction, but we're alone here and can simply try switch the direction. */

u64State &= ~(RTSEMRW_CNT_RD_MASK | RTSEMRW_CNT_WR_MASK | RTSEMRW_DIR_MASK);

u64State |= (UINT64_C(1) << RTSEMRW_CNT_WR_SHIFT) | (RTSEMRW_DIR_WRITE << RTSEMRW_DIR_SHIFT);

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

break;

}

else if (!cMillies)

/* Wrong direction and we're not supposed to wait, just return. */

return VERR_TIMEOUT;

else

{

/* Add ourselves to the write count and break out to do the wait. */

uint64_t c = (u64State & RTSEMRW_CNT_WR_MASK) >> RTSEMRW_CNT_WR_SHIFT;

c++;

Assert(c < RTSEMRW_CNT_MASK / 2);

u64State &= ~RTSEMRW_CNT_WR_MASK;

u64State |= c << RTSEMRW_CNT_WR_SHIFT;

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

break;

}

if (pThis->u32Magic != RTSEMRW_MAGIC)

return VERR_SEM_DESTROYED;

ASMNopPause();

u64State = ASMAtomicReadU64(&pThis->u64State);

u64OldState = u64State;

}

/*

bool fDone = (u64State & RTSEMRW_DIR_MASK) == (RTSEMRW_DIR_WRITE << RTSEMRW_DIR_SHIFT)

&& ( ((u64State & RTSEMRW_CNT_WR_MASK) >> RTSEMRW_CNT_WR_SHIFT) == 1

|| cMillies == 0);

if (fDone)

ASMAtomicCmpXchgHandle(&pThis->hNativeWriter, hNativeSelf, NIL_RTNATIVETHREAD, fDone);

if (!fDone)

{

/*

for (uint32_t iLoop = 0; ; iLoop++)

{

int rc;

#ifdef RTSEMRW_STRICT

if (cMillies)

{

if (hThreadSelf == NIL_RTTHREAD)

hThreadSelf = RTThreadSelfAutoAdopt();

rc = RTLockValidatorRecExclCheckBlocking(&pThis->ValidatorWrite, hThreadSelf, pSrcPos, true,

cMillies, RTTHREADSTATE_RW_WRITE, false);

}

else

rc = VINF_SUCCESS;

if (RT_SUCCESS(rc))

#else

RTTHREAD hThreadSelf = RTThreadSelf();

RTThreadBlocking(hThreadSelf, RTTHREADSTATE_RW_WRITE, false);

#endif

{

if (fInterruptible)

rc = RTSemEventWaitNoResume(pThis->hEvtWrite, cMillies);

else

rc = RTSemEventWait(pThis->hEvtWrite, cMillies);

RTThreadUnblocked(hThreadSelf, RTTHREADSTATE_RW_WRITE);

if (pThis->u32Magic != RTSEMRW_MAGIC)

return VERR_SEM_DESTROYED;

}

if (RT_FAILURE(rc))

{

/* Decrement the counts and return the error. */

for (;;)

{

u64OldState = u64State = ASMAtomicReadU64(&pThis->u64State);

uint64_t c = (u64State & RTSEMRW_CNT_WR_MASK) >> RTSEMRW_CNT_WR_SHIFT; Assert(c > 0);

c--;

u64State &= ~RTSEMRW_CNT_WR_MASK;

u64State |= c << RTSEMRW_CNT_WR_SHIFT;

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

break;

}

return rc;

}

u64State = ASMAtomicReadU64(&pThis->u64State);

if ((u64State & RTSEMRW_DIR_MASK) == (RTSEMRW_DIR_WRITE << RTSEMRW_DIR_SHIFT))

{

ASMAtomicCmpXchgHandle(&pThis->hNativeWriter, hNativeSelf, NIL_RTNATIVETHREAD, fDone);

if (fDone)

break;

}

AssertMsg(iLoop < 1000, ("%u\n", iLoop)); /* may loop a few times here... */

}

}

/*

Assert((ASMAtomicReadU64(&pThis->u64State) & RTSEMRW_DIR_MASK) == (RTSEMRW_DIR_WRITE << RTSEMRW_DIR_SHIFT));

ASMAtomicWriteU32(&pThis->cWriteRecursions, 1);

Assert(pThis->cWriterReads == 0);

#ifdef RTSEMRW_STRICT

RTLockValidatorRecExclSetOwner(&pThis->ValidatorWrite, hThreadSelf, pSrcPos, true);

#endif

return VINF_SUCCESS;

}

RTDECL(int) RTSemRWRequestWrite(RTSEMRW hRWSem, RTMSINTERVAL cMillies)

{

#ifndef RTSEMRW_STRICT

return rtSemRWRequestWrite(hRWSem, cMillies, false, NULL);

#else

RTLOCKVALSRCPOS SrcPos = RTLOCKVALSRCPOS_INIT_NORMAL_API();

return rtSemRWRequestWrite(hRWSem, cMillies, false, &SrcPos);

#endif

}

RT_EXPORT_SYMBOL(RTSemRWRequestWrite);

RTDECL(int) RTSemRWRequestWriteDebug(RTSEMRW hRWSem, RTMSINTERVAL cMillies, RTHCUINTPTR uId, RT_SRC_POS_DECL)

{

RTLOCKVALSRCPOS SrcPos = RTLOCKVALSRCPOS_INIT_DEBUG_API();

return rtSemRWRequestWrite(hRWSem, cMillies, false, &SrcPos);

}

RT_EXPORT_SYMBOL(RTSemRWRequestWriteDebug);

RTDECL(int) RTSemRWRequestWriteNoResume(RTSEMRW hRWSem, RTMSINTERVAL cMillies)

{

#ifndef RTSEMRW_STRICT

return rtSemRWRequestWrite(hRWSem, cMillies, true, NULL);

#else

RTLOCKVALSRCPOS SrcPos = RTLOCKVALSRCPOS_INIT_NORMAL_API();

return rtSemRWRequestWrite(hRWSem, cMillies, true, &SrcPos);

#endif

}

RT_EXPORT_SYMBOL(RTSemRWRequestWriteNoResume);

RTDECL(int) RTSemRWRequestWriteNoResumeDebug(RTSEMRW hRWSem, RTMSINTERVAL cMillies, RTHCUINTPTR uId, RT_SRC_POS_DECL)

{

RTLOCKVALSRCPOS SrcPos = RTLOCKVALSRCPOS_INIT_DEBUG_API();

return rtSemRWRequestWrite(hRWSem, cMillies, true, &SrcPos);

}

RT_EXPORT_SYMBOL(RTSemRWRequestWriteNoResumeDebug);

RTDECL(int) RTSemRWReleaseWrite(RTSEMRW hRWSem)

{

/*

struct RTSEMRWINTERNAL *pThis = hRWSem;

AssertPtrReturn(pThis, VERR_INVALID_HANDLE);

AssertReturn(pThis->u32Magic == RTSEMRW_MAGIC, VERR_INVALID_HANDLE);

RTNATIVETHREAD hNativeSelf = RTThreadNativeSelf();

RTNATIVETHREAD hNativeWriter;

ASMAtomicUoReadHandle(&pThis->hNativeWriter, &hNativeWriter);

AssertReturn(hNativeSelf == hNativeWriter, VERR_NOT_OWNER);

/*

if (pThis->cWriteRecursions == 1)

{

AssertReturn(pThis->cWriterReads == 0, VERR_WRONG_ORDER); /* (must release all read recursions before the final write.) */

#ifdef RTSEMRW_STRICT

int rc9 = RTLockValidatorRecExclReleaseOwner(&pThis->ValidatorWrite, true);

if (RT_FAILURE(rc9))

return rc9;

#endif

/*

ASMAtomicWriteU32(&pThis->cWriteRecursions, 0);

ASMAtomicWriteHandle(&pThis->hNativeWriter, NIL_RTNATIVETHREAD);

for (;;)

{

uint64_t u64State = ASMAtomicReadU64(&pThis->u64State);

uint64_t u64OldState = u64State;

uint64_t c = (u64State & RTSEMRW_CNT_WR_MASK) >> RTSEMRW_CNT_WR_SHIFT;

Assert(c > 0);

c--;

if ( c > 0

|| (u64State & RTSEMRW_CNT_RD_MASK) == 0)

{

/* Don't change the direction, wait up the next writer if any. */

u64State &= ~RTSEMRW_CNT_WR_MASK;

u64State |= c << RTSEMRW_CNT_WR_SHIFT;

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

{

if (c > 0)

{

int rc = RTSemEventSignal(pThis->hEvtWrite);

AssertRC(rc);

}

break;

}

}

else

{

/* Reverse the direction and signal the reader threads. */

u64State &= ~(RTSEMRW_CNT_WR_MASK | RTSEMRW_DIR_MASK);

u64State |= RTSEMRW_DIR_READ << RTSEMRW_DIR_SHIFT;

if (ASMAtomicCmpXchgU64(&pThis->u64State, u64State, u64OldState))

{

Assert(!pThis->fNeedReset);

ASMAtomicWriteBool(&pThis->fNeedReset, true);

int rc = RTSemEventMultiSignal(pThis->hEvtRead);

AssertRC(rc);

break;

}

}

ASMNopPause();

if (pThis->u32Magic != RTSEMRW_MAGIC)

return VERR_SEM_DESTROYED;

}

}

else

{

Assert(pThis->cWriteRecursions != 0);

#ifdef RTSEMRW_STRICT

int rc9 = RTLockValidatorRecExclUnwind(&pThis->ValidatorWrite);

if (RT_FAILURE(rc9))

return rc9;

#endif

ASMAtomicDecU32(&pThis->cWriteRecursions);

}

return VINF_SUCCESS;

}

RT_EXPORT_SYMBOL(RTSemRWReleaseWrite);

RTDECL(bool) RTSemRWIsWriteOwner(RTSEMRW hRWSem)

{

/*

struct RTSEMRWINTERNAL *pThis = hRWSem;

AssertPtrReturn(pThis, false);

AssertReturn(pThis->u32Magic == RTSEMRW_MAGIC, false);

/*

RTNATIVETHREAD hNativeSelf = RTThreadNativeSelf();

RTNATIVETHREAD hNativeWriter;

ASMAtomicUoReadHandle(&pThis->hNativeWriter, &hNativeWriter);

return hNativeWriter == hNativeSelf;

}

RT_EXPORT_SYMBOL(RTSemRWIsWriteOwner);

RTDECL(bool) RTSemRWIsReadOwner(RTSEMRW hRWSem, bool fWannaHear)

{

/*

struct RTSEMRWINTERNAL *pThis = hRWSem;

AssertPtrReturn(pThis, false);

AssertReturn(pThis->u32Magic == RTSEMRW_MAGIC, false);

/*

uint64_t u64State = ASMAtomicReadU64(&pThis->u64State);

if ((u64State & RTSEMRW_DIR_MASK) == (RTSEMRW_DIR_WRITE << RTSEMRW_DIR_SHIFT))

{

/*

RTNATIVETHREAD hNativeSelf = RTThreadNativeSelf();

RTNATIVETHREAD hWriter;

ASMAtomicUoReadHandle(&pThis->hWriter, &hWriter);

return hWriter == hNativeSelf;

}

/*

if (!(u64State & RTSEMRW_CNT_RD_MASK))

return false;

#ifdef RTSEMRW_STRICT

/*

return RTLockValidatorRecSharedIsOwner(&pThis->ValidatorRead, NIL_RTTHREAD);

#else

/*

return fWannaHear;

#endif

}

RT_EXPORT_SYMBOL(RTSemRWIsReadOwner);

RTDECL(uint32_t) RTSemRWGetWriteRecursion(RTSEMRW hRWSem)

{

/*

struct RTSEMRWINTERNAL *pThis = hRWSem;

AssertPtrReturn(pThis, 0);

AssertReturn(pThis->u32Magic == RTSEMRW_MAGIC, 0);

/*

return pThis->cWriteRecursions;

}

RT_EXPORT_SYMBOL(RTSemRWGetWriteRecursion);

RTDECL(uint32_t) RTSemRWGetWriterReadRecursion(RTSEMRW hRWSem)

{

/*

struct RTSEMRWINTERNAL *pThis = hRWSem;

AssertPtrReturn(pThis, 0);

AssertReturn(pThis->u32Magic == RTSEMRW_MAGIC, 0);

/*

return pThis->cWriterReads;

}

RT_EXPORT_SYMBOL(RTSemRWGetWriterReadRecursion);

RTDECL(uint32_t) RTSemRWGetReadCount(RTSEMRW hRWSem)

{

/*

struct RTSEMRWINTERNAL *pThis = hRWSem;

AssertPtrReturn(pThis, 0);

AssertMsgReturn(pThis->u32Magic == RTSEMRW_MAGIC,

("pThis=%p u32Magic=%#x\n", pThis, pThis->u32Magic),

0);

/*

uint64_t u64State = ASMAtomicReadU64(&pThis->u64State);

if ((u64State & RTSEMRW_DIR_MASK) != (RTSEMRW_DIR_READ << RTSEMRW_DIR_SHIFT))

return 0;

return (u64State & RTSEMRW_CNT_RD_MASK) >> RTSEMRW_CNT_RD_SHIFT;

}

RT_EXPORT_SYMBOL(RTSemRWGetReadCount);