DevLPC.cpp revision c58f1213e628a545081c70e26c6b67a841cff880
/* $Id$ */
/** @file
* DevLPC - LPC device emulation
*/
/*
* Copyright (C) 2006-2011 Oracle Corporation
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
* --------------------------------------------------------------------
*
* This code is based on:
*
* Low Pin Count emulation
*
* Copyright (c) 2007 Alexander Graf
*
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* *****************************************************************
*
* This driver emulates an ICH-7 LPC partially. The LPC is basically the
* same as the ISA-bridge in the existing PIIX implementation, but
* more recent and includes support for HPET and Power Management.
*
*/
/*******************************************************************************
* Header Files *
*******************************************************************************/
#define LOG_GROUP LOG_GROUP_DEV_LPC
#include "VBoxDD2.h"
#define RCBA_BASE 0xFED1C000
typedef struct
{
/** PCI device structure. */
/** Pointer to the device instance. - R3 ptr. */
/* So far, not much of a state */
} LPCState;
#ifndef VBOX_DEVICE_STRUCT_TESTCASE
{
/* This is the HPET config pointer, HPAS in DSDT */
switch (iIndex)
{
case 0x3404:
Log(("rcba_read HPET_CONFIG_POINTER\n"));
break;
case 0x3410:
/* This is the HPET config pointer */
Log(("rcba_read GCS\n"));
value = 0;
break;
default:
Log(("Unknown RCBA read\n"));
break;
}
return value;
}
{
switch (iIndex)
{
case 0x3410:
Log(("rcba_write GCS\n"));
break;
default:
Log(("Unknown RCBA write\n"));
break;
}
}
/**
* I/O handler for memory-mapped read operations.
*
* @returns VBox status code.
*
* @param pDevIns The device instance.
* @param pvUser User argument.
* @param GCPhysAddr Physical address (in GC) where the read starts.
* @param pv Where to store the result.
* @param cb Number of bytes read.
* @thread EMT
*/
PDMBOTHCBDECL(int) lpcMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
{
switch (cb)
{
case 1:
case 2:
break;
case 4:
{
break;
}
default:
return VERR_INTERNAL_ERROR;
}
return VINF_SUCCESS;
}
/**
* Memory mapped I/O Handler for write operations.
*
* @returns VBox status code.
*
* @param pDevIns The device instance.
* @param pvUser User argument.
* @param GCPhysAddr Physical address (in GC) where the read starts.
* @param pv Where to fetch the value.
* @param cb Number of bytes to write.
* @thread EMT
*/
PDMBOTHCBDECL(int) lpcMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
{
switch (cb)
{
case 1:
case 2:
break;
case 4:
{
/** @todo: locking? */
break;
}
default:
return VERR_INTERNAL_ERROR;
}
return VINF_SUCCESS;
}
#ifdef IN_RING3
/**
* Reset notification.
*
* @returns VBox status.
* @param pDevIns The device instance data.
*/
{
LogFlow(("lpcReset: \n"));
}
/**
* Info handler, device version.
*
* @param pDevIns Device instance which registered the info.
* @param pHlp Callback functions for doing output.
* @param pszArgs Argument string. Optional and specific to the handler.
*/
{
LogFlow(("lpcInfo: \n"));
else
{
if ((iMap & 0x80) != 0)
else
}
}
/**
* @interface_method_impl{PDMDEVREG,pfnConstruct}
*/
{
int rc;
/*
* Register the PCI device.
*/
PCIDevSetCommand (&pThis->dev, PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS | PCI_COMMAND_BUSMASTER);
PCIDevSetHeaderType (&pThis->dev, 0x80); /* normal, multifunction device (so that other devices can be its functions) */
/** @todo: rewrite using PCI accessors */
/* See p. 427 of ICH9 specification for register description */
/* 40h - 43h PMBASE 40-43 ACPI Base Address */
/* 44h ACPI_CNTL ACPI Control */
/* 48h–4Bh GPIOBASE GPIO Base Address */
/* 4C GC GPIO Control */
/* ???? */
/* 60h-63h PIRQ[n]_ROUT PIRQ[A-D] Routing Control */
/* 64h SIRQ_CNTL Serial IRQ Control 10h R/W, RO */
/* 68h-6Bh PIRQ[n]_ROUT PIRQ[E-H] Routing Control */
/* 6C-6Dh LPC_IBDF IOxAPIC Bus:Device:Function 00F8h R/W */
/* 82h-83h LPC_EN LPC I/F Enables 0000h R/W */
/* 84h-87h GEN1_DEC LPC I/F Generic Decode Range 1 00000000h R/W */
/* 88h-8Bh GEN2_DEC LPC I/F Generic Decode Range 2 00000000h R/W */
/* 8Ch-8Eh GEN3_DEC LPC I/F Generic Decode Range 3 00000000h R/W */
/* 90h-93h GEN4_DEC LPC I/F Generic Decode Range 4 00000000h R/W */
/* A0h-CFh Power Management */
/* D0h-D3h FWH_SEL1 Firmware Hub Select 1 */
/* D4h-D5h FWH_SEL2 Firmware Hub Select 2 */
/* D8h-D9h FWH_DEC_EN1 Firmware Hub Decode Enable 1 */
/* DCh BIOS_CNTL BIOS Control */
/* E0h-E1h FDCAP Feature Detection Capability ID */
/* E2h FDLEN Feature Detection Capability Length */
/* E3h FDVER Feature Detection Version */
/* E4h-EBh FDVCT Feature Vector Description */
/* F0h-F3h RCBA Root Complex Base Address */
if (RT_FAILURE(rc))
return rc;
/*
* Register the MMIO regions.
*/
if (RT_FAILURE(rc))
return rc;
/* No state in the LPC right now */
/*
* Initialize the device state.
*/
/**
* @todo: Register statistics.
*/
return VINF_SUCCESS;
}
/**
* The device registration structure.
*/
const PDMDEVREG g_DeviceLPC =
{
/* u32Version */
/* szName */
"lpc",
/* szRCMod */
"VBoxDD2GC.gc",
/* szR0Mod */
"VBoxDD2R0.r0",
/* pszDescription */
"Low Pin Count (LPC) Bus",
/* fFlags */
/* fClass */
/* cMaxInstances */
1,
/* cbInstance */
sizeof(LPCState),
/* pfnConstruct */
/* pfnDestruct */
NULL,
/* pfnRelocate */
NULL,
/* pfnIOCtl */
NULL,
/* pfnPowerOn */
NULL,
/* pfnReset */
/* pfnSuspend */
NULL,
/* pfnResume */
NULL,
/* pfnAttach */
NULL,
/* pfnDetach */
NULL,
/* pfnQueryInterface. */
NULL,
/* pfnInitComplete */
NULL,
/* pfnPowerOff */
NULL,
/* pfnSoftReset */
NULL,
/* u32VersionEnd */
};
#endif /* IN_RING3 */
#endif /* VBOX_DEVICE_STRUCT_TESTCASE */