4d50e1b6964344f0fe259c66eaff76fce4fe63bb 55312 |
|
16-Apr-2015 |
vboxsync |
CPUM: Must load additional extended CPU state when added to (guest) XCR0. |
70359d3f63d95bf7fadd4b3d301326512f69d9ad 55292 |
|
15-Apr-2015 |
vboxsync |
HM,CPUM,IEM: XSETBV fixes and adjustments. |
53b2cc239d6598a070c89f35be14772f71f81777 55289 |
|
15-Apr-2015 |
vboxsync |
IEM,CPUM: Implemented XSETBV and XGETBV. |
d23ef84f5789f32a04282733f27a7d802cfb535f 55229 |
|
14-Apr-2015 |
vboxsync |
CPUM,IEM: Expose GuestFeatures and HostFeatures (exploded CPUID), making IEM use it. Early XSAVE/AVX guest support preps. |
455d9b835215b524a2fec962638d4d75b81dc3cc 55062 |
|
01-Apr-2015 |
vboxsync |
Remove CPUFeatures and CPUFeaturesExt from CPUM, use HostFeatures instead. Extended HostFeatures. |
4520bd7e24f7f7e396f11e2059ede66bb3c38ef6 55000 |
|
29-Mar-2015 |
vboxsync |
CPUMCTXCORE elimination. |
e1d4cfd32955e4e0f3499b487b46aa33cdd35cea 54862 |
|
20-Mar-2015 |
vboxsync |
Corrected x86.h/mac typo. |
1727ce6444a35171d56f82f1270a758d40fa775d 54760 |
|
13-Mar-2015 |
vboxsync |
CPUMGetGuestCpuId: Fixed APIC ID assertions to read the pLeaf values instead of the return values, as the caller may be passing the same pointer for several of them (i.e. ignoring some values). |
b1ac43a82a2e4114bc44feb83007a10c99077085 54737 |
|
12-Mar-2015 |
vboxsync |
VMM,REM: CPUID revamp - almost there now. |
f5906f8fb3e7988cbedcbb78fc7170b9b57bf026 54714 |
|
11-Mar-2015 |
vboxsync |
PATM,CPUM: CPUID patch update. |
aae8a6a38fd27661046ab1d06cb2cb5c096c40ed 54674 |
|
06-Mar-2015 |
vboxsync |
CPUM: Working on refactoring the guest CPUID handling. |
8859299e45f5a73f230a5d09028d5c5627fdc8c8 53467 |
|
05-Dec-2014 |
vboxsync |
VMM: Removed VBOX_WITH_NEW_MSR_CODE and the code marked ifndef VBOX_WITH_NEW_MSR_CODE. |
d20048816419723a193f0905ac12ca4062dff51a 52770 |
|
17-Sep-2014 |
vboxsync |
VMM/CPUM: Fix EFER WRMSR to ignore EFER.LMA bit, trunk regression caused by r96058. |
d59d81150ba00a699b20dd9c32cf3c5bd8406b72 52717 |
|
12-Sep-2014 |
vboxsync |
VMM/CPUM: Raise #GP(0) while writing to disallowed EFER bits. |
76110d8ef23142ec3bcab1f50622858bdb55c76d 51729 |
|
26-Jun-2014 |
vboxsync |
Recently missed header updates. |
b5df661c6d68070ecfcdc7498caff796805912ec 51728 |
|
26-Jun-2014 |
vboxsync |
VMM: Add MWait Extensions as a CPUM feature to allow configuring it from other VMM components. |
2b6f34b3e9ff4838ee8244ae7e27b66dbca4fb25 51720 |
|
25-Jun-2014 |
vboxsync |
VMM: Doxygen bugref comment consistency. |
85e0df081123f84c3a84f7d5b9b3bf1e77806c6d 51301 |
|
20-May-2014 |
vboxsync |
VMM: Retire aGuestCpuIdHyper legacy array. |
16814dacfe63c2cc513331e106c82ac3d25b856f 50785 |
|
14-Mar-2014 |
vboxsync |
CPUMAllRegs: comment nit. |
728b52f802ac19865bd4aa8e9ade8f506a9e6c10 49972 |
|
18-Dec-2013 |
vboxsync |
CPUM: More msr hacking. |
41d680dd6eb0287afc200adc5b0d61b07a32b72d 49893 |
|
13-Dec-2013 |
vboxsync |
MSR rewrite: initial hacking - half disabled. |
873db999b6c8aa54ad92544e8a82d7cee26f87bf 49849 |
|
09-Dec-2013 |
vboxsync |
VMM: Use EFER.LMA in PAE-paging mode check rather than EFER.LME. |
4915cd7ab1f70c7024219733e5536270b2a9d9de 49549 |
|
19-Nov-2013 |
vboxsync |
VMM/CPUM/MSRs: when returning the APIC base, don't rely upon the CPUID feature bits but check if a Local APIC is present |
1bd0a212ca89621ec33d8faca313166296162805 49479 |
|
14-Nov-2013 |
vboxsync |
VMM: Warnings. |
413cd0a1ebe25f105cb4245481bc2559e6b0031e 49360 |
|
01-Nov-2013 |
vboxsync |
Stopgap MSR fixes (better MSR implementation is underways, just very tedious work), getter as well. |
ff83756c97787f6282f23f60988d73bc5d95db9a 49355 |
|
01-Nov-2013 |
vboxsync |
VMM/CPUM: MSR_P4_LASTBRANCH_* is not Intel-specific |
b3e4574794525e6fd93f0a1eee1ef6e48cc58dfb 49354 |
|
31-Oct-2013 |
vboxsync |
Stop gap MSR fixes (better MSR implementation is underways, just very tedious work). |
c3ad07071523338d76960d8da7678860aea8b03d 49019 |
|
10-Oct-2013 |
vboxsync |
VMM: FPU cleanup. |
6daec8df46a94f301e250fed6077d9a675394d52 48697 |
|
26-Sep-2013 |
vboxsync |
build fix |
0cdcd61cc60ca65ecdc71b7afe4aa5aacd0347a5 48695 |
|
26-Sep-2013 |
vboxsync |
CPUM: MSR_CORE_THREAD_COUNT and MSR_FLEX_RATIO for snow leopard. |
bd9c3dc1fbc80465b29433271a63e3e2ec3862d0 48602 |
|
20-Sep-2013 |
vboxsync |
LogRel consistency. |
4d02c6ebc68acd1bdfa5a26f9bbcfb64cb8463ae 48567 |
|
20-Sep-2013 |
vboxsync |
CPUMR0: Avoid EFER writes whenever possible. Don't know which kernels actually set the EFER.FFXSR bit. |
22646c9d8a83d8fd3f164563f0141636fcc5a71b 48544 |
|
19-Sep-2013 |
vboxsync |
VMM/CPUM: Guest and Hyper-debug state pending 32->64 switcher case helpers. |
7dd0d55326be5304e824fc742fec72ba7892140c 48368 |
|
06-Sep-2013 |
vboxsync |
Implement MSR_PKG_CST_CONFIG_CONTROL for mac os x. |
5740bc009f7d316b7ecc1d5957605b0776a51b7f 48357 |
|
06-Sep-2013 |
vboxsync |
The intel_pstate Linux driver depends on these two MSRs |
8509d9202927a9eb188bba37a88ba820ea934a56 48308 |
|
05-Sep-2013 |
vboxsync |
VMM: Log cosmetics. |
66b4de37685272defd1e272ff701854140c54e45 48203 |
|
30-Aug-2013 |
vboxsync |
Ignore IA32_PMC0/1, too. |
9278ef7955f0e1dd8c08984c0e67dda358f4c725 48202 |
|
30-Aug-2013 |
vboxsync |
Ignore MSR_IA32_PERFEVTSEL1 and MSR_IA32_PERFEVTSEL0 reads. Should probably fake the rest of the perf mon stuff, but later. |
8b01d6b03953f9f157648813127eef9302d76de1 48151 |
|
29-Aug-2013 |
vboxsync |
Netware 6 is reading MSR_P4_LASTBRANCH_0 (0x1db). |
3b87afe093f62af7e48889924cde4997cda3afcb 48144 |
|
29-Aug-2013 |
vboxsync |
Allow reading P5_MC_ADDR and P5_MC_TYPE. |
e00a2af8bd1aa48c22f43f0cfe9cd03724844acc 48142 |
|
29-Aug-2013 |
vboxsync |
intel manuals hints that there should be at least 8 variables one. |
b0e6aebc772d001ba1e35eea09afa234483bc4de 48141 |
|
29-Aug-2013 |
vboxsync |
QNX doesn't believe our MTRR_CAP report and messes with the variable MTRR ranges. Fake 6 of them for now. |
12917925557b6056a56c52520b12a6c0c5605199 48119 |
|
28-Aug-2013 |
vboxsync |
Another intel MSR. |
b4b1fdb123c8152ae66d383c143187f72a33ed2c 48077 |
|
27-Aug-2013 |
vboxsync |
ignore MSR_K8_VM_CR on AMD |
841a07bb88b29a2ecebb123e096906a7f9155070 48075 |
|
27-Aug-2013 |
vboxsync |
Another MSR people like to read. |
fb32e14e550b8cac82fd2d3a2cf6f92a65a278ea 48066 |
|
26-Aug-2013 |
vboxsync |
CPUM: Fake MSR_IA32_MCG_STATUS reads. Corrected MSR names, IA32_MCP should be IA32_MCG according to latest intel docs. |
bbdb794e7462b5b5cf8309e0c888b0280c9823c8 48026 |
|
23-Aug-2013 |
vboxsync |
Ignore MSR_IA32_DEBUGCTL access for now, should be virtualized later. |
6c0c897c288bc58fdaf492d412b8f9109a4b9a86 48024 |
|
23-Aug-2013 |
vboxsync |
Since AMD has MSR_IA32_MCP_CAP, we have to fake the other machine check MSRs on AMD. |
3e7df94dc31bd0452a97ec495517d6410af6ca65 48000 |
|
22-Aug-2013 |
vboxsync |
Windows 7 want MSR_IA32_MCP_CAP on AMD64 too. |
fb6f496937a80d0584aa0da400e70690e5225321 47996 |
|
22-Aug-2013 |
vboxsync |
More MSRs fixes on AMD64. MSR_K8_NB_CFG is for recent linux kernels (64-bit), and the MSR_IA32_BIOS_SIGN_ID is for windows 7. |
e781381f6f8481ed0f9dc78f243d01049834995f 47988 |
|
22-Aug-2013 |
vboxsync |
Solaris reads MSR_RAPL_POWER_UNIT, give it some fake values. |
d04f84d3af7882a4cadb3076173bb7fbed8d6060 47942 |
|
21-Aug-2013 |
vboxsync |
CPUM: Ignore MSR_K8_INT_PENDING access. |
4416850ddf049b3c52308d5e9b74ec9565e95c41 47939 |
|
20-Aug-2013 |
vboxsync |
Ignore MSR_K8_SYSCFG on AMD64 like we used to do. |
1331ee15729355586795b8782631fb6922b71245 47828 |
|
18-Aug-2013 |
vboxsync |
CPUMRecalcHyperDRx: Fixed raw-mode assertion. |
45b7b06f3c4ef53f499c355505010a2b050802f4 47714 |
|
14-Aug-2013 |
vboxsync |
CPUMRecalcHyperDRx: Host single stepping in HM-mode fix. |
0195476366376b7c8e96388659d23ca0d4de3032 47706 |
|
13-Aug-2013 |
vboxsync |
Must be careful in ring-3 too. |
75573e715c700dbbc011875c8daf42f5f5ac347d 47661 |
|
12-Aug-2013 |
vboxsync |
build fix |
c1980cd3f410c88b8f92f464c56ed987a15f44c1 47660 |
|
12-Aug-2013 |
vboxsync |
VMM: Debug register handling redo. (only partly tested on AMD-V so far.) |
1da551e894fb89a00f1343b0c0bca55ed5d08b27 47652 |
|
09-Aug-2013 |
vboxsync |
VMM: Removed all VBOX_WITH_OLD_[VTX|AMDV]_CODE bits. |
4c7e0dceb5826f3f292069287d4093f438bf966f 47328 |
|
23-Jul-2013 |
vboxsync |
CPUM,++: Fix DR6 and DR7 read-as-1 (RA1) and read-as-zero (RAZ) values on load since REM didn't set them right for years. Introduced constants for these values. |
92f9e3ee1f17750812a33d45bb07dafc4a0c9b40 47242 |
|
19-Jul-2013 |
vboxsync |
Another CPL update. SS.RPL may not be the same as CPL in 64-bit mode on AMD(-V?) systems. |
b11e0617a2987f9939d662df026024490261a2fd 47225 |
|
18-Jul-2013 |
vboxsync |
Exploring conforming segments in BS2 test case. |
380b8540bceb13a79763971ed08a3235b01da963 46286 |
|
27-May-2013 |
vboxsync |
VMM/HMVMXR0: Avoid saving/restoring EFER whenever possible on every VM-entry/VM-exit. |
682342827b0e80c493c820603508e79e76c42658 46165 |
|
19-May-2013 |
vboxsync |
Made dSYM-bundle loading work as well as line numbers in the stack traces (when possible). |
17b720f644743c74d5e9635d25d6fc646f1c2e21 45965 |
|
09-May-2013 |
vboxsync |
VMM: Facility for getting the highest-priority pending interrupt from the APIC device. |
bd960df9d97611663b270c6a7b91df40d64509b4 45798 |
|
29-Apr-2013 |
vboxsync |
Fixed up and enabled Netware WP0+RO+US hack. |
7847c123aebebc6d3d5c1406619cfba1ab6457c1 45485 |
|
11-Apr-2013 |
vboxsync |
- *: Where possible, drop the #ifdef VBOX_WITH_RAW_RING1 when EMIsRawRing1Enabled is used.
- SELM: Don't shadow TSS.esp1/ss1 unless ring-1 compression is enabled (also fixed a log statement there).
- SELM: selmGuestToShadowDesc should not push ring-1 selectors into ring-2 unless EMIsRawRing1Enabled() holds true.
- REM: Don't set CPU_INTERRUPT_EXTERNAL_EXIT in helper_ltr() for now. |
886d0ed1f0aa2e75c92140ca240345679d617e4c 45291 |
|
02-Apr-2013 |
vboxsync |
VMM: HM bits. |
7ce6e7e8fb0eddb176361a49f53fa1bd15eaab4e 45276 |
|
02-Apr-2013 |
vboxsync |
Ring-1 compression patches, courtesy of trivirt AG:
- main: diff to remove the hwvirt requirement for QNX
- rem: diff for dealing with raw ring 0/1 selectors and general changes to allowed guest execution states
- vmm: changes for using the guest's TSS selector index as our hypervisor TSS selector (makes str safe) (VBOX_WITH_SAFE_STR )
- vmm: changes for dealing with guest ring 1 code (VBOX_WITH_RAW_RING1)
- vmm: change to emulate smsw in RC/R0 (QNX uses this old style instruction a lot so going to qemu for emulation is very expensive)
- vmm: change (hack) to kick out patm virtual handlers in case they conflict with guest GDT/TSS write monitors; we should allow multiple handlers per page, but that change would be rather invasive |
2acb8d7493e7b423e2d68e3031babac99a71b456 45142 |
|
22-Mar-2013 |
vboxsync |
VMM: Don't LogRel on CPUMClearGuestCpuIdFeature(). |
e5da5dbb49b995e6e7d20a79a6cac76307549b15 43974 |
|
27-Nov-2012 |
vboxsync |
VMM: Fix MSR range values for X2APIC, add in the X2APIC TPR MSR. |
5d2d18f44b136574385b00bc1136bfb041514a50 43860 |
|
12-Nov-2012 |
vboxsync |
VMM/CPUMAllRegs: todo/question. |
e8f5203e447f6c0729dae4e9b2c30fae30b9d774 43667 |
|
17-Oct-2012 |
vboxsync |
VMM: APIC refactor, cache APIC base MSR during init phase. |
e7d8a97e3787122b211311253a20c1600b441f8a 43657 |
|
16-Oct-2012 |
vboxsync |
VMM: APIC refactor. Moved APIC base MSR to the VCPU (where it belongs) for lockless accesses. |
f091ce66ee934d599f16056078a9a76d7286b959 43387 |
|
21-Sep-2012 |
vboxsync |
VMM: HM cleanup. |
dde8af918246fff7588ca2fc8b4a134d5dac25c3 43151 |
|
03-Sep-2012 |
vboxsync |
VMM: typos. |
79ba091b626ecee1f0beed73a7038c5a0d2fee40 42705 |
|
09-Aug-2012 |
vboxsync |
CPUM: Set FF when needed (VBOX_WITH_IEM only). Made CPUMRawSetEFlags generally accessible. |
38bd20387802e3c3e826f3196824917acf947303 42647 |
|
07-Aug-2012 |
vboxsync |
CPUM: More intel MSRs that NT4 reads when booting on intel systems. |
19510659bcf820ca29ba8a96882b31e46867d467 42640 |
|
07-Aug-2012 |
vboxsync |
CPUM: Stubbed MSR_IA32_BIOS_SIGN_ID and MSR_IA32_BIOS_UPDT_TRIG. |
a12e1bae28ef910c0954048dadfc52182294fa81 42452 |
|
30-Jul-2012 |
vboxsync |
CPUMAllRegs.cpp: Documented some return values on a few CPUMSetGuest* methods. |
d9e8985b936caa8e72f58c48045478fc2776dc5e 42427 |
|
27-Jul-2012 |
vboxsync |
VMM: Fixed some selector arithmetic, introducing a new constand and renaming and old one to make things clearer. Also added CPUMGetGuestLdtrEx and make some (but not all) of SELM use this instead of shadow GDT. |
53799e1f1f6601cd3d6be95ff1aa8d3648712618 42420 |
|
26-Jul-2012 |
vboxsync |
Eliminating CPUM_CHANGED_HIDDEN_SEL_REGS_INVALID and CPUMAreHiddenSelRegsValid. Addressing some LDTR and TR things (saved stated, transition to REM). |
26f38400c03761b1934b05fa93a64188e88e9904 42407 |
|
26-Jul-2012 |
vboxsync |
VMM: Futher work on dealing with hidden segment register, esp. when going stale. |
ae286b2571c00a4927a3f1677e508b60cadfcc24 42193 |
|
17-Jul-2012 |
vboxsync |
IEM: Integration work... |
201339bee6d3364b123b1e73dd9869f415f8ae12 42188 |
|
17-Jul-2012 |
vboxsync |
VMM: Changed a few ifndef IN_RING0 to ifndef VBOX_WITH_RAW_MODE_NOT_R0. |
681380880d4131019871e8f22cb3349b757168ca 42186 |
|
17-Jul-2012 |
vboxsync |
SELM,DIS,CPUM,EM: Hidden selector register cleanups. |
be696096bc7aef6d689d52bf8594e1b88e691c71 42166 |
|
16-Jul-2012 |
vboxsync |
CPUMGetGuestCPL: Use hidden SS register values in raw-mode too. |
559419830ee63b8481ade36d8994f235932aae49 42165 |
|
16-Jul-2012 |
vboxsync |
CPUMIsGuestIn64BitCode/CPUMIsGuestIn64BitCodeEx changes together with some early lazily loading of hidden selectors (raw-mode). |
c9dd1ffe45f65b8ae5061a3280d8019e14a2be0a 42034 |
|
06-Jul-2012 |
vboxsync |
Doxygen. |
a128ec91bf80b573554e80eb6237a52e5223a298 42033 |
|
06-Jul-2012 |
vboxsync |
VMM: RDTSCP support bits. |
24986763e9e9e6633a4a54479be945d577fdfd34 42024 |
|
05-Jul-2012 |
vboxsync |
VMM: RDTSCP support on Intel. Segregated some common CPU features from the AMD superset into Extended features as they're now available on Intel too. |
3942acfaf590eaef4740d7b8a5311bb91e2bed0d 41976 |
|
01-Jul-2012 |
vboxsync |
VMM: Switcher and TRPM fixes wrt hypervisor traps and tstVMM. |
2cf7b059a58c41e945cd3428ec1721835e398f5c 41943 |
|
28-Jun-2012 |
vboxsync |
VMM: Avoid stale selector issues in RC so there will be no need to try fix them by recursive trapping (this was broken for GS since forever anyways). |
8cb8cf7eeafbf2ad5b23866ca19f257bd3aaf9e7 41940 |
|
28-Jun-2012 |
vboxsync |
CPUMRaw[SG]etEFlags: Drop pCtxCore. |
7a896688c49bde3fa1490e7ebb321ac51b6ad29d 41939 |
|
28-Jun-2012 |
vboxsync |
CPUMGetGuestCPL: Drop the context core pointer and use the Guest state in CPUMCPU via pVCpu. |
1524bfd2c9963f605135f70fc15ddb018a1e9178 41931 |
|
27-Jun-2012 |
vboxsync |
TRPM: Save state directly to the CPUMCPU context member instead of putting on the stack. this avoid copying the state around before returning to host context to service an IRQ, or before using IEM. |
37fb67be7d1d328213aeda3f56ab5aacd37416d1 41906 |
|
24-Jun-2012 |
vboxsync |
CPUM: Combined the visible and hidden selector register data into one structure. Preparing for lazily resolving+caching of hidden registers in raw-mode. |
c8968199d271abe749c08bcea0512f7239250cdc 41905 |
|
24-Jun-2012 |
vboxsync |
CPUMCTX++: Rearranging the CPUMCTX structure in preparation of some hidden selector register improvments. |
67b4b089c50d0ab8ad847dddd8c0e0812fdadc9e 41836 |
|
19-Jun-2012 |
vboxsync |
Doxygen. |
63a23b6d96aca4c8545d3c3e89cc454af7ba3da6 41803 |
|
17-Jun-2012 |
vboxsync |
Doxygen. |
df25990f935e7fd32acd9be9a156aff8d10facf2 41802 |
|
17-Jun-2012 |
vboxsync |
Doxygen. |
fa8716d08ff627a8e1c14bcac56e8e3867b3f795 41800 |
|
17-Jun-2012 |
vboxsync |
Doxygen. |
4bfa7b58e362a1bca0628643c352c137900bf01a 41783 |
|
16-Jun-2012 |
vboxsync |
Doxygen, comment typos. |
5981e6935987b08737b730b63a41acc1dd696377 41774 |
|
16-Jun-2012 |
vboxsync |
bugref.. |
0abaa9a1e344eed99f3caa71a496320d1b648e0d 41728 |
|
15-Jun-2012 |
vboxsync |
DIS: register macro name adjustments - part two. |
673c4af47215ff0f21f244462a3dfd63f8b522cd 40235 |
|
23-Feb-2012 |
vboxsync |
build fixes. |
abb570b1d0fa7304983df800658356c8adbff89f 40234 |
|
23-Feb-2012 |
vboxsync |
Optionally present basic hypervisor CPUID leaves. |
09d9c20d9d9127611877e693110312f2566c8853 40170 |
|
17-Feb-2012 |
vboxsync |
MSRs and MTRRs, CPUM saved state changed. (linux 2.4.31 seems to ignore the capabilites when it comes to fixed MTRRs.) |
9f45164458c8710ef9681cac7d8c52ced03b1f38 40166 |
|
17-Feb-2012 |
vboxsync |
MSR todo. |
2afbe132eb7931e0125141eabe3a48e08f1ffab5 39078 |
|
21-Oct-2011 |
vboxsync |
VMM: -Wunused-parameter |
d03c6bcd3d78cef8ac4d76186e7c0e72f63ce80f 39038 |
|
19-Oct-2011 |
vboxsync |
VMM: -W4 warnings (MSC). |
a6d516e33e97253177e7326f637746edb3678435 38816 |
|
21-Sep-2011 |
vboxsync |
HWSVMR0.cpp: Addendum to r73226 and #5666 - Since we update SS.DPL with the CPL, we must always read the CPL from SS.DPL. |
99fc25fde31ac60ee18ac48eab7027dea4272a0b 37136 |
|
18-May-2011 |
vboxsync |
CPUM: Option to set Hypervisor Present bit. |
0c4ad93d1c3f883f5faecfc95c4a221500979c18 36861 |
|
27-Apr-2011 |
vboxsync |
CPUMSetGuestTR: Awww, shut up. |
eb30b3bfcb8b0e55f5498ba7a84e55a536debcd7 36762 |
|
20-Apr-2011 |
vboxsync |
CPUM: CPUMSetGuestGDTR and CPUMSetGuestIDTR should take 64-bit base value. |
e69378448f919940b0b999796d40a23df2a7aa39 36639 |
|
11-Apr-2011 |
vboxsync |
CPUMIsGuestInRealOrV86Mode and CPUMIsGuestInRealOrV86ModeEx. |
98c301df445383ad8730a506cfda81a598c05a2d 36315 |
|
18-Mar-2011 |
vboxsync |
VMM: more correct MSR_IA32_MISC_ENABLE emulation |
43747b1f0bc8302a238fb35e55857a5e9aa1933d 35346 |
|
27-Dec-2010 |
vboxsync |
VMM reorg: Moving the public include files from include/VBox to include/VBox/vmm. |
ad27e1d5e48ca41245120c331cc88b50464813ce 33540 |
|
28-Oct-2010 |
vboxsync |
*: spelling fixes, thanks Timeless! |
fb9a31209ddef2fe35851556bba29ac759c825b5 31512 |
|
10-Aug-2010 |
vboxsync |
CPUMGetGuestCPL: Don't trust ssHid.Attr.n.u2Dpl to hold the CPL when we're in V8086 mode (REM). |
8d5210f02ffa3d8f8f21a917c1ee0d83c664e644 31489 |
|
09-Aug-2010 |
vboxsync |
CPUMGetGuestCRx,CPUMGetGuestCR8: Do the PDM TPR querying in CPUM instead of EM so we don't need to duplicate code. |
332226a763cdb56f4eb4ea38732218e78d2b0281 31079 |
|
24-Jul-2010 |
vboxsync |
spaces |
373b6f7805e8b892ab171372224cb4d1b47a977d 31060 |
|
23-Jul-2010 |
vboxsync |
spaces |
7c9a5eca233baf6ede345ace077a00bd0b7af1ef 30889 |
|
17-Jul-2010 |
vboxsync |
PGM: Cleanups related to pending MMIO/#PF optimizations. Risky. |
27056d9f117befcbefe9813f26bdd11817702d6b 30861 |
|
15-Jul-2010 |
vboxsync |
VMM,REM: Replumbled the MSR updating and reading so that PGM can easily be notified when EFER.NXE changes. |
d3adf5695782fe54c34d3436cb453a5620ee86fc 30263 |
|
16-Jun-2010 |
vboxsync |
VMM,REM: Only invalidate hidden registers when using raw-mode. Fixes save restore during mode switching code like the windows boot menu. (#5057) |
ccd08a3ae2b154ad27cd2bb21a9360bc33aeb552 30164 |
|
11-Jun-2010 |
vboxsync |
CPUM: Added /CPUM/PortableCpuIdLevel={0..3} for automatically stripping CPUID features that can cause trouble with teleportation and cold migration. |
a0b1cef8d9b4f05e3ae266775a3b71d7b9147284 30145 |
|
10-Jun-2010 |
vboxsync |
Preparations for fixing the NXE assumption in the 32/64 switcher. |
2f0d866e126dd288169fed591c259c1c6b4016e5 29250 |
|
09-May-2010 |
vboxsync |
iprt/asm*.h: split out asm-math.h, don't include asm-*.h from asm.h, don't include asm.h from sup.h. Fixed a couple file headers. |
e64031e20c39650a7bc902a3e1aba613b9415dee 28800 |
|
27-Apr-2010 |
vboxsync |
Automated rebranding to Oracle copyright/license strings via filemuncher |
2e93cde17aa5b21646f9fe68bd97d0712bc12d47 28030 |
|
07-Apr-2010 |
vboxsync |
VMM: SpeedStep and relatives MSRs |
8bf5db94103bdf6d0a57e950aae3f3365c2a41d7 27331 |
|
12-Mar-2010 |
vboxsync |
MSR_IA32_MISC_ENABLE test code |
40340c8435d6fbd71b028f66684bf970123293ad 26993 |
|
03-Mar-2010 |
vboxsync |
VMM: implement some Nehalem MSRs |
cce1178f91ef492458ec8763b94234d58571ea60 26673 |
|
22-Feb-2010 |
vboxsync |
faster |
8277f8ef39226d4feb5acf0bbc8d8b869040f868 26649 |
|
19-Feb-2010 |
vboxsync |
CPUM: better cache sharing descriptor - L2 cache is shared amongst all cores |
e0850c8dc31c0036b4f2998fba404c96a791203a 26648 |
|
19-Feb-2010 |
vboxsync |
CPUM: wrong sharing info on level 2 cache |
740c481388d9b3c9ced757bedba9786acd8c24d6 26635 |
|
18-Feb-2010 |
vboxsync |
PAE and AMD64 paging modes support large pages regardless of CR4.PSE. |
31a7b01680722211f1df0693c1e141871cb55b0b 26026 |
|
25-Jan-2010 |
vboxsync |
shut up gcc. |
296e1aa2f7e2f5e33708a502923ecb74a2e75f91 25866 |
|
15-Jan-2010 |
vboxsync |
VMM: More micro optimizations. |
437cb30cecc67158e35c5cc5d453cfe4eddb7dd2 25835 |
|
14-Jan-2010 |
vboxsync |
CPUM,VMM: Avoid calling CPUMGetGuestEFER until it's needed (see defect 4597). Also pushed the inlined CPUM predicates that was calling into CPUMGetSomething anyway into CPUMAllRegs.cpp since that's faster and smaller. |
921888c0598e94083253c7c63bb44cc4ea2772d3 25815 |
|
13-Jan-2010 |
vboxsync |
space |
796f2ae62049d8c92c3d3f484be473343e6d2797 25803 |
|
13-Jan-2010 |
vboxsync |
VMM: provide reasonable cache info for Intel CPUs in leaf 4 of CPUID |
dd07e98e69d79ce428e6d9d63e57e5639cd9f2e8 24953 |
|
25-Nov-2009 |
vboxsync |
VMM: functional MSR_IA32_PERF_STATUS implementation |
daca8b50ab5d9af5ebe58fe941d96c0e9b2289c9 24753 |
|
18-Nov-2009 |
vboxsync |
VMM: simple MSR_IA32_PERF_STATUS implementation, watch for regression (yet unlikely, as was completely broken before) |
93ceb3d4f95962c365d3317f4f0a0d4aaddf8d01 24728 |
|
17-Nov-2009 |
vboxsync |
CPUM: report L1 cache as data, and provide reasonable linesize |
db36ad422e2702475407b4adb86cd1b55f7ffbab 23794 |
|
15-Oct-2009 |
vboxsync |
More synthetic cpu work |
e17f587595bd5d3a7be56a892e3fd3a0ef83d268 22890 |
|
10-Sep-2009 |
vboxsync |
VM::cCPUs -> VM::cCpus so it matches all the other cCpus and aCpus members. |
8661bd36da139bee27b619c71930b13b64b9dd19 22070 |
|
07-Aug-2009 |
vboxsync |
VMM,ConsoleImpl2: Moved NT4LeafLimit down into /CPUM and documented it. Cleanup. |
018c5ae4cdef77456fd222370bd591e234df6b3f 22037 |
|
06-Aug-2009 |
vboxsync |
VMM: correct report cores count, also expose more CPUID leaves by default |
ee2fd56219746dc8429910581c52b6709383d59a 21252 |
|
06-Jul-2009 |
vboxsync |
First attempt to enable hypervisor breakpoints with vt-x/amd-v guests |
41a1ba9b82912b936903a2054bd0d3ffbc8b5dd1 19076 |
|
21-Apr-2009 |
vboxsync |
CPUMGetGuestCpuId needs a pVCpu parameter. |
d3a43c48af386589ac0ee94d047962b26942097f 19075 |
|
21-Apr-2009 |
vboxsync |
CPUMGetGuestCpuIdStdRCPtr -> R3 |
0520068cfb8f9f2ce7e9bb6fe98399da2aecfab5 19032 |
|
20-Apr-2009 |
vboxsync |
Split TM for SMP guests. |
42c1972c22e09797b4b24afbd0ec114ed076c37c 18927 |
|
16-Apr-2009 |
vboxsync |
Big step to separate VMM data structures for guest SMP. (pgm, em) |
769536e36e95f30b915537a34d8bc863d4e00d74 18082 |
|
19-Mar-2009 |
vboxsync |
recompiler adaption of r44723 |
949e540380e375caee37199f0a6f5ff1eb97636b 17106 |
|
25-Feb-2009 |
vboxsync |
VMM,REM: Removed the single page limitation on the TSS monitoring and going over the interrupt redirection bitmap monitoring. |
1bcf30a9c87d65c7b3dada805449c0e13648abfd 17035 |
|
23-Feb-2009 |
vboxsync |
VMM,REM: Brushed up the TR/TSS shadowing. We're now relying on the hidden TR registers in SELM and CPUM/REM will make sure these are always in sync. Joined CPUMGetGuestTRHid and CPUMGetGuestTR. Kicked out sync_tr (unused now) and SELMGCGetRing1Stack. |
4a296be15f381ac7f3506e4eb2861627d062fee3 16859 |
|
17-Feb-2009 |
vboxsync |
Load hypervisor CR3 from CPUM (instead of hardcoded fixups in the switchers). Dangerous change. Watch for regressions. |
a41a001e5a4dd3f39faab90b412243ced6d59394 15416 |
|
13-Dec-2008 |
vboxsync |
CPUM: hybrid 32-bit kernel FPU mess. |
195c976a8dc213bd70767735dfeea6a249583713 15390 |
|
12-Dec-2008 |
vboxsync |
X86_CPUID_AMD_FEATURE_EDX_SEP not set it seems in 32 bits mode. (Intel) |
8dad36dd0ab1c764d35de8af61306fd56ca73646 14870 |
|
01-Dec-2008 |
vboxsync |
Cleaning up. |
164f92fdbca397ccd3daeda3707a00e6343cba8c 14859 |
|
01-Dec-2008 |
vboxsync |
More updates for 32/64. |
2e8a4688863e75ea0362f5bcc48d6539cf7ac21d 14704 |
|
27-Nov-2008 |
vboxsync |
Some more switcher work |
0a4832ac6fcbe8741edb4141437eb8be5e8a153c 14411 |
|
20-Nov-2008 |
vboxsync |
RDTSCP support added. Enabled only for AMD-V guests. |
ffc18baa76bc13f8096407e7d3dd8c38e72ff290 13975 |
|
07-Nov-2008 |
vboxsync |
Even more debugger fixes. |
8b0f6d2d53953de1ce264626b185fb4f2298295e 13960 |
|
07-Nov-2008 |
vboxsync |
Moved guest and host CPU contexts into per-VCPU array. |
7e960d3a0a8a3a84d7aba2cca45d72b1c31cc97b 13832 |
|
05-Nov-2008 |
vboxsync |
IN_GC -> IN_RC. |
8e309081c4be44adb8de44d34fd7d9b0433e451c 13830 |
|
05-Nov-2008 |
vboxsync |
VMM: Disabled VM:pVMGC, removed VM_GUEST_ADDR. |
0e338499b90a021706361593466d6d6ee534ee90 13532 |
|
23-Oct-2008 |
vboxsync |
CPUMQueryGuestCtxPtr doesn't need to return a status. It can never fail. |
9ad5e3912962c3dbccc1afc4e7d62890fe906814 12989 |
|
06-Oct-2008 |
vboxsync |
VMM + VBox/cdefs.h: consolidated all the XYZ*DECLS of the VMM into VMM*DECL. Removed dead DECL and IN_XYZ* macros. |
b0d29fd0a868929a608ff72658aac997cc95319a 12972 |
|
03-Oct-2008 |
vboxsync |
APIC versioning in features interface |
5290bdd24ca75b9f0524051d90220d056d62d7f0 12971 |
|
03-Oct-2008 |
vboxsync |
x2APIC bits definitions |
3988f834075f54081d6b27d3a522b02d967c2cdc 12735 |
|
25-Sep-2008 |
vboxsync |
CPUMGetGuestCPL fix for real mode in VT-x. |
6406e7a354eb585e5503a926d765cdf98ff41f03 12657 |
|
22-Sep-2008 |
vboxsync |
#1865: CPUM. Also added missing aliasing for DR4&5 to the guest DRx setter and getter. |
bba5b0889e561826d405efd16eaa8c38694ac291 12600 |
|
19-Sep-2008 |
vboxsync |
Turned dr0..dr7 into an array. |
8f4f8858c17ae02a6f9aee94f027f35b464e7f18 12578 |
|
18-Sep-2008 |
vboxsync |
Enable hardware breakpoint support for VT-x and AMD-V. |
90fd1966125bda5c9f2476ef8ea558dd0d0ab691 11704 |
|
27-Aug-2008 |
vboxsync |
Allow enabling and disabling of the PAT cpuid feature. |
e4ea543752422f1139923e3e506c625b0a1827c5 11311 |
|
09-Aug-2008 |
vboxsync |
VMM: ELEMENTS -> RT_ELEMENTS. |
8e8844a522f5d335f177a0313b03067d79cce201 11299 |
|
09-Aug-2008 |
vboxsync |
mm: MMHyperXXToGC -> MMHyperXXToRC. |
c0cff5ec64c81b45b47f4359483ff9b56b339588 10523 |
|
11-Jul-2008 |
vboxsync |
Backed out CPL change; fixes ACP2 installation regression for VT-x. |
bd1710ea020b202d1e04713e84a8fddfe707a689 10154 |
|
03-Jul-2008 |
vboxsync |
Documented the issue wrt to CS RPL and conforming segment in CPUMGetGuestCPL. |
561d44734d629cbf2b0e6e042b16af2f4fc39962 10122 |
|
02-Jul-2008 |
vboxsync |
Use the SS RPL instead of the CS RPL in CPUMGetGuestCPL for the raw mode case because of conforming code selectors. |
92b46ab766fa65ca5cc28c031cb715a1422db969 10097 |
|
02-Jul-2008 |
vboxsync |
Derive CPL from cs, not ss. |
aa9c1381743c6022507a480a1848f6cb597f1c98 9852 |
|
20-Jun-2008 |
vboxsync |
Added CPUMGetGuestMsr |
5f0d978d53ca844df4498bae03099994be0d727c 9847 |
|
20-Jun-2008 |
vboxsync |
Updates for dumping 64 bits descriptors |
cef335756f471dfb8640fd41326e20b745977acd 9841 |
|
20-Jun-2008 |
vboxsync |
Added CPUMGetGuest/HyperRIP. |
325a037b1de1cfa61c4762179c693dfca2058bdb 9825 |
|
19-Jun-2008 |
vboxsync |
Log update |
569bf9e23168813f75757145e5e6e1ebd527fc8b 9817 |
|
19-Jun-2008 |
vboxsync |
fs & gs base cleanup |
ab00a1ced6adde2929a57318c5c1f2ab06961a1a 9675 |
|
13-Jun-2008 |
vboxsync |
General cleanup of SELMToFlat. |
39b2495bb0df4e0f268710febfba767ef942201f 9661 |
|
12-Jun-2008 |
vboxsync |
Implement and use CPUMIsGuestIn64BitCode where appropriate. |
5ac17b7cd61be9a5d715de7b131e3b78863b22de 9649 |
|
12-Jun-2008 |
vboxsync |
Added CPUMIsGuestInLongMode. |
b640c932228865ed15444cfe8cdd171b6740bfde 9647 |
|
12-Jun-2008 |
vboxsync |
DRx access functions must use uint64_t now. |
6ce491af7bd03fd66c5b8250feaddaef86e1e27f 9574 |
|
10-Jun-2008 |
vboxsync |
Mask away invalid parts of the cpu context in CPUMSetGuestCtxCore. |
f6b7d6004b0c4e66eb408e4511e9f7582373776f 9543 |
|
09-Jun-2008 |
vboxsync |
Long mode CPU state dumping. |
44f8264e5d413a1859ae503e5bb24fb138474124 9430 |
|
05-Jun-2008 |
vboxsync |
Made the base of GDTR and IDTR 64 bits. |
8f2f405df1b698a8666690db648a7e0cd009f193 9354 |
|
03-Jun-2008 |
vboxsync |
Added CPUMGetCPUVendor.
Added CPUMCPUIDFEATURE_NXE, CPUMCPUIDFEATURE_LONG_MODE, CPUMCPUIDFEATURE_LAHF & CPUMCPUIDFEATURE_SYSCALL cpuid feature bits.
Enable the required cpuid feature bits in 64 bits mode. |
78a205e3fc6719d59e8c561b3d287d3a4f879852 9212 |
|
29-May-2008 |
vboxsync |
Major changes for sizeof(RTGCPTR) == uint64_t.
Introduced RCPTRTYPE for pointers valid in raw mode only (RTGCPTR32).
Disabled by default. Enable by adding VBOX_WITH_64_BITS_GUESTS to your LocalConfig.kmk. |
dc5d074dc40b72849fa9ed14e44d51482ca128dc 8160 |
|
18-Apr-2008 |
vboxsync |
All CRx registers are now 64 bits. |
1c94c0a63ba68be1a7b2c640e70d7a06464e4fca 8155 |
|
18-Apr-2008 |
vboxsync |
The Big Sun Rebranding Header Change |
108ee5b16581c94360a27144b28dd708ac2da59a 8129 |
|
18-Apr-2008 |
vboxsync |
Removed inactive PGM_WITH_BROKEN_32PAE_SWITCHER code |
ffd28903ee0fceb9bca5a9889ccf6a240adc5dbd 8113 |
|
17-Apr-2008 |
vboxsync |
The recompiler must refresh its cpuid cache when we change a cpuid feature. |
1929efcba68133ffe29f4b500d7ccbdf6f15c263 8112 |
|
17-Apr-2008 |
vboxsync |
Another attempt at a proper check. (init order messed up the previous one) |
acf852489b6d38cce53d3f41d9813d8717738c0c 8111 |
|
17-Apr-2008 |
vboxsync |
The previous check for PAE was too strict. |
5874cdbf2bcf52c9a6f89a7e2c5b47d5629b00a2 8110 |
|
17-Apr-2008 |
vboxsync |
Allow clearing of CPUMCPUIDFEATURE_PAE |
56122c34f3c9f4f498b32815e6c82ba3592e75f3 8108 |
|
17-Apr-2008 |
vboxsync |
Updated check.
Added PGMGetHostMode. |
022ee81b6424b0851c71d12512fe62bbaaaa871a 8106 |
|
17-Apr-2008 |
vboxsync |
Refuse to activate PAE mode when the host is using 32 bits paging. |
9464ac33f05059390b99ceebf88e2e55f97dcda8 7730 |
|
03-Apr-2008 |
vboxsync |
Added CPUMSet/GetGuestEFER.
Corrected NX bit handling. |
9be8087d409a9822225e85be40c815316a578cb1 7650 |
|
31-Mar-2008 |
vboxsync |
Missed one |
6a0b07769eda54d23301f8b192ec02094a3667b1 7648 |
|
31-Mar-2008 |
vboxsync |
Use ASMCpuId_EDX. |
7a193047fb6f77ceb433f61baa86b78137daa2c7 7647 |
|
31-Mar-2008 |
vboxsync |
Use ASMCpuId_EDX. |
19b0ddfa2712e2c3b80450a5d03e15a618484448 7646 |
|
31-Mar-2008 |
vboxsync |
Extra check for valid cpuid |
954eb9275cba5ef2591d0ae6b4dac78800fa3be0 7645 |
|
31-Mar-2008 |
vboxsync |
CPUMCPUIDFEATURE_LONG_MODE added |
1e406ca2640a9a5b63a6aa53ea9c61f685acb154 7644 |
|
31-Mar-2008 |
vboxsync |
Added CPUMCPUIDFEATURE_PAE |
a16eb14ad7a4b5ef91ddc22d3e8e92d930f736fc 5999 |
|
07-Dec-2007 |
vboxsync |
The Giant CDDL Dual-License Header Change. |
a62d1237bb480cc3cebb2d851fbe8fc7a385d389 5695 |
|
11-Nov-2007 |
vboxsync |
Don't drag in CPUMAllA.asm in ring-3 because leopard doesn't like the jump table. It's not needed. |
c0ebdb6ec79ffc1b2be7f04b6173ebc1612fc274 5389 |
|
19-Oct-2007 |
vboxsync |
Fully deal with CR0.EM/TS/MP changes in GC. |
728d963b04066f536cc1d46c3d82c0fdfb470d0d 5285 |
|
14-Oct-2007 |
vboxsync |
deal with the centaur cpuid stuff. |
2cc5c0b8760cd2bc5cd60ef8651ba0885ae34727 4958 |
|
21-Sep-2007 |
vboxsync |
Added hSelf and removed pVMHC from the VM structure. |
36cbcdbf624d9692773f9139934967224910f31f 4208 |
|
18-Aug-2007 |
vboxsync |
CPUMGetGuestMode |
5a6cf5eaa5d27fbef3d46d476d9cca830b307e9a 4207 |
|
17-Aug-2007 |
vboxsync |
CPUMGetGuestMode |
c98fb3e16fcd571a790eab772c0c66173d225205 4071 |
|
07-Aug-2007 |
vboxsync |
Biggest check-in ever. New source code headers for all (C) innotek files. |
c97989161fbe75bc14cea477a5443bbf474dd3ad 2981 |
|
01-Jun-2007 |
vboxsync |
InnoTek -> innotek: all the headers and comments. |
22f74229aec1e6815351ea5e92f6744dffba2de4 2633 |
|
14-May-2007 |
vboxsync |
added PDMDevHlpQueryCPUId() |
0440d29ebaf82ff9c0437a986f2be8be3dc55d08 2545 |
|
08-May-2007 |
vboxsync |
typo |
b6a4e36187d6c508f015823ae7237c87200f8cde 2541 |
|
08-May-2007 |
vboxsync |
Don't enable the Local APIC on non-{Intel,AMD} cpus. The Linux code gets confused otherwise. This is a bug in the Linux code but Windows is also known for such assumptions. This makes, for instance, DSL boot in VIA CPUs boot again. |
aaf675e81fa2b2b7fd4b04aea52aebbe93f2b4ff 2299 |
|
21-Apr-2007 |
vboxsync |
style. |
cef1acbd68faeeed1249dfd38851c8007257778c 2151 |
|
18-Apr-2007 |
vboxsync |
CPUMGetGuestCPL: get cpl from hidden ss selector register if valid. |
312f6360f7adaaf516aee3ec25efe9948da65be0 1970 |
|
06-Apr-2007 |
vboxsync |
RT_LIKELY additions. |
13a85e2212b4c0e0788a7fdaa64d89d093bd419c 1969 |
|
06-Apr-2007 |
vboxsync |
Check for protected mode in CPUMGetGuestCPL. |
baaa8f2deb495b8136c512d3efe6321817cacd1b 1828 |
|
30-Mar-2007 |
vboxsync |
Cleaned up cpl checking. |
b3059c631542aaf3c8c060c72ae79477806d6e3d 1157 |
|
02-Mar-2007 |
vboxsync |
Incorrect masking away of ring 1 RPL in V86 mode. |
ad3c1f0d63e8e53da0b9d747ce4d2f6557e65380 1090 |
|
28-Feb-2007 |
vboxsync |
Corrected assertions for v86 mode |
d1311acc6c393ebe66be5c3569741f61b93696f7 772 |
|
08-Feb-2007 |
vboxsync |
Compile fix |
f55f3bf746afdb41f3c08dbeb734122ef63e9803 771 |
|
08-Feb-2007 |
vboxsync |
AMD-V was stil left disabled. Now enabled.
Enabled sysenter/sysexit in hwaccm mode. |
f0057d2d2a9b7b17c5c42b593915f3c5a85226f2 338 |
|
26-Jan-2007 |
vboxsync |
CPUMSetGuestDR*() takes a RTGCUINTREG not a RTUINTREG. |
fb5e37303b228a79c05cabfce2fe0fedfe32ed8a 23 |
|
15-Jan-2007 |
vboxsync |
string.h & stdio.h + header cleanups. |
677833bc953b6cb418c701facbdcf4aa18d6c44e 1 |
|
01-Jan-1970 |
vboxsync |
import |