VMMSwitcher.cpp revision a0b1cef8d9b4f05e3ae266775a3b71d7b9147284
/* $Id$ */
/** @file
* VMM - The Virtual Machine Monitor, World Switcher(s).
*/
/*
* Copyright (C) 2006-2007 Oracle Corporation
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*/
/*******************************************************************************
* Header Files *
*******************************************************************************/
#define LOG_GROUP LOG_GROUP_VMM
#include "VMMInternal.h"
#include "VMMSwitcher/VMMSwitcher.h"
/*******************************************************************************
* Global Variables *
*******************************************************************************/
/** Array of switcher defininitions.
* The type and index shall match!
*/
{
NULL, /* invalid entry */
#ifdef VBOX_WITH_RAW_MODE
# ifndef RT_ARCH_AMD64
NULL, //&vmmR3SwitcherPAETo32Bit_Def,
# ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
# else
NULL, //&vmmR3SwitcherAMD64ToPAE_Def,
# endif
NULL //&vmmR3SwitcherAMD64ToAMD64_Def,
# else /* RT_ARCH_AMD64 */
NULL, //&vmmR3Switcher32BitTo32Bit_Def,
NULL, //&vmmR3Switcher32BitToPAE_Def,
NULL, //&vmmR3Switcher32BitToAMD64_Def,
NULL, //&vmmR3SwitcherPAETo32Bit_Def,
NULL, //&vmmR3SwitcherPAEToPAE_Def,
NULL, //&vmmR3SwitcherPAEToAMD64_Def,
NULL //&vmmR3SwitcherAMD64ToAMD64_Def,
# endif /* RT_ARCH_AMD64 */
#else /* !VBOX_WITH_RAW_MODE */
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
#endif /* !VBOX_WITH_RAW_MODE */
};
/**
* VMMR3Init worker that initiates the switcher code (aka core code).
*
* put on linear contiguous backing.
*
* @returns VBox status code.
* @param pVM Pointer to the shared VM structure.
*/
{
#ifndef VBOX_WITH_RAW_MODE
return VINF_SUCCESS;
#else
/*
* Calc the size.
*/
unsigned cbCoreCode = 0;
{
if (pSwitcher)
{
}
}
/*
* Allocate continguous pages for switchers and deal with
* conflicts in the intermediate mapping of the code.
*/
pVM->vmm.s.pvCoreCodeR3 = SUPR3ContAlloc(pVM->vmm.s.cbCoreCode >> PAGE_SHIFT, &pVM->vmm.s.pvCoreCodeR0, &pVM->vmm.s.HCPhysCoreCode);
int rc = VERR_NO_MEMORY;
{
{
/* try more allocations - Solaris, Linux. */
const unsigned cTries = 8234;
struct VMMInitBadTry
{
void *pvR3;
unsigned i = 0;
do
{
i++;
pVM->vmm.s.pvCoreCodeR3 = SUPR3ContAlloc(pVM->vmm.s.cbCoreCode >> PAGE_SHIFT, &pVM->vmm.s.pvCoreCodeR0, &pVM->vmm.s.HCPhysCoreCode);
break;
} while ( rc == VERR_PGM_INTERMEDIATE_PAGING_CONFLICT
&& i < cTries - 1);
/* cleanup */
if (RT_FAILURE(rc))
{
i++;
}
while (i-- > 0)
{
LogRel(("Core code alloc attempt #%d: pvR3=%p pvR0=%p HCPhys=%RHp\n",
}
}
}
if (RT_SUCCESS(rc))
{
/*
* copy the code.
*/
{
if (pSwitcher)
}
/*
* Map the code into the GC address space.
*/
rc = MMR3HyperMapHCPhys(pVM, pVM->vmm.s.pvCoreCodeR3, pVM->vmm.s.pvCoreCodeR0, pVM->vmm.s.HCPhysCoreCode,
if (RT_SUCCESS(rc))
{
LogRel(("CoreCode: R3=%RHv R0=%RHv RC=%RRv Phys=%RHp cb=%#x\n",
pVM->vmm.s.pvCoreCodeR3, pVM->vmm.s.pvCoreCodeR0, pVM->vmm.s.pvCoreCodeRC, pVM->vmm.s.HCPhysCoreCode, pVM->vmm.s.cbCoreCode));
/*
* Finally, PGM probably has selected a switcher already but we need
* to get the routine addresses, so we'll reselect it.
* This may legally fail so, we're ignoring the rc.
*/
return rc;
}
/* shit */
AssertMsgFailed(("PGMR3Map(,%RRv, %RHp, %#x, 0) failed with rc=%Rrc\n", pVM->vmm.s.pvCoreCodeRC, pVM->vmm.s.HCPhysCoreCode, cbCoreCode, rc));
}
else
N_("Failed to allocate %d bytes of contiguous memory for the world switcher code"),
return rc;
#endif
}
/**
* Relocate the switchers, called by VMMR#Relocate.
*
* @param pVM Pointer to the shared VM structure.
* @param offDelta The relocation delta.
*/
{
#ifdef VBOX_WITH_RAW_MODE
/*
* Relocate all the switchers.
*/
{
{
}
}
/*
* Recalc the RC address for the current switcher.
*/
// AssertFailed();
#endif
}
/**
* Generic switcher code relocator.
*
* @param pVM The VM handle.
* @param pSwitcher The switcher definition.
* @param pu8CodeR3 Pointer to the core code block for the switcher, ring-3 mapping.
* @param R0PtrCode Pointer to the core code block for the switcher, ring-0 mapping.
* @param GCPtrCode The guest context address corresponding to pu8Code.
* @param u32IDCode The identity mapped (ID) address corresponding to pu8Code.
* @param SelCS The hypervisor CS selector.
* @param SelDS The hypervisor DS selector.
* @param SelTSS The hypervisor TSS selector.
* @param GCPtrGDT The GC address of the hypervisor GDT.
* @param SelCS64 The 64-bit mode hypervisor CS selector.
*/
static void vmmR3SwitcherGenericRelocate(PVM pVM, PVMMSWITCHERDEF pSwitcher, RTR0PTR R0PtrCode, uint8_t *pu8CodeR3, RTGCPTR GCPtrCode, uint32_t u32IDCode,
{
union
{
const void *pv;
uintptr_t u;
} u;
/*
* Process fixups.
*/
{
/*
* Get the source (where to write the fixup).
*/
union
{
uintptr_t u;
} uSrc;
/* The fixup target and method depends on the type. */
switch (u8)
{
/*
* 32-bit relative, source in HC and target in GC.
*/
case FIX_HC_2_GC_NEAR_REL:
{
Assert(offSrc - pSwitcher->offHCCode0 < pSwitcher->cbHCCode0 || offSrc - pSwitcher->offHCCode1 < pSwitcher->cbHCCode1);
break;
}
/*
* 32-bit relative, source in HC and target in ID.
*/
case FIX_HC_2_ID_NEAR_REL:
{
Assert(offSrc - pSwitcher->offHCCode0 < pSwitcher->cbHCCode0 || offSrc - pSwitcher->offHCCode1 < pSwitcher->cbHCCode1);
Assert(offTrg - pSwitcher->offIDCode0 < pSwitcher->cbIDCode0 || offTrg - pSwitcher->offIDCode1 < pSwitcher->cbIDCode1);
break;
}
/*
* 32-bit relative, source in GC and target in HC.
*/
case FIX_GC_2_HC_NEAR_REL:
{
Assert(offTrg - pSwitcher->offHCCode0 < pSwitcher->cbHCCode0 || offTrg - pSwitcher->offHCCode1 < pSwitcher->cbHCCode1);
break;
}
/*
* 32-bit relative, source in GC and target in ID.
*/
case FIX_GC_2_ID_NEAR_REL:
{
AssertMsg(offSrc - pSwitcher->offGCCode < pSwitcher->cbGCCode, ("%x - %x < %x\n", offSrc, pSwitcher->offGCCode, pSwitcher->cbGCCode));
Assert(offTrg - pSwitcher->offIDCode0 < pSwitcher->cbIDCode0 || offTrg - pSwitcher->offIDCode1 < pSwitcher->cbIDCode1);
break;
}
/*
* 32-bit relative, source in ID and target in HC.
*/
case FIX_ID_2_HC_NEAR_REL:
{
Assert(offSrc - pSwitcher->offIDCode0 < pSwitcher->cbIDCode0 || offSrc - pSwitcher->offIDCode1 < pSwitcher->cbIDCode1);
Assert(offTrg - pSwitcher->offHCCode0 < pSwitcher->cbHCCode0 || offTrg - pSwitcher->offHCCode1 < pSwitcher->cbHCCode1);
break;
}
/*
* 32-bit relative, source in ID and target in HC.
*/
case FIX_ID_2_GC_NEAR_REL:
{
Assert(offSrc - pSwitcher->offIDCode0 < pSwitcher->cbIDCode0 || offSrc - pSwitcher->offIDCode1 < pSwitcher->cbIDCode1);
break;
}
/*
* 16:32 far jump, target in GC.
*/
case FIX_GC_FAR32:
{
break;
}
/*
* Make 32-bit GC pointer given CPUM offset.
*/
case FIX_GC_CPUM_OFF:
{
break;
}
/*
* Make 32-bit GC pointer given CPUMCPU offset.
*/
case FIX_GC_CPUMCPU_OFF:
{
break;
}
/*
* Make 32-bit GC pointer given VM offset.
*/
case FIX_GC_VM_OFF:
{
break;
}
/*
* Make 32-bit HC pointer given CPUM offset.
*/
case FIX_HC_CPUM_OFF:
{
break;
}
/*
* Make 32-bit R0 pointer given VM offset.
*/
case FIX_HC_VM_OFF:
{
break;
}
/*
* Store the 32-Bit CR3 (32-bit) for the intermediate memory context.
*/
case FIX_INTER_32BIT_CR3:
{
break;
}
/*
* Store the PAE CR3 (32-bit) for the intermediate memory context.
*/
case FIX_INTER_PAE_CR3:
{
break;
}
/*
* Store the AMD64 CR3 (32-bit) for the intermediate memory context.
*/
case FIX_INTER_AMD64_CR3:
{
break;
}
/*
* Store Hypervisor CS (16-bit).
*/
case FIX_HYPER_CS:
{
break;
}
/*
* Store Hypervisor DS (16-bit).
*/
case FIX_HYPER_DS:
{
break;
}
/*
* Store Hypervisor TSS (16-bit).
*/
case FIX_HYPER_TSS:
{
break;
}
/*
* Store the 32-bit GC address of the 2nd dword of the TSS descriptor (in the GDT).
*/
case FIX_GC_TSS_GDTE_DW2:
{
break;
}
/*
* Store the EFER or mask for the 32->64 bit switcher.
*/
case FIX_EFER_OR_MASK:
{
break;
}
/*
*/
case FIX_NO_FXSAVE_JMP:
{
if (!CPUMSupportsFXSR(pVM))
{
}
else
{
}
break;
}
/*
* Insert relative jump to specified target it SYSENTER isn't used by the host.
*/
case FIX_NO_SYSENTER_JMP:
{
if (!CPUMIsHostUsingSysEnter(pVM))
{
}
else
{
}
break;
}
/*
* Insert relative jump to specified target it SYSCALL isn't used by the host.
*/
case FIX_NO_SYSCALL_JMP:
{
if (!CPUMIsHostUsingSysCall(pVM))
{
}
else
{
}
break;
}
/*
* 32-bit HC pointer fixup to (HC) target within the code (32-bit offset).
*/
case FIX_HC_32BIT:
{
Assert(offTrg - pSwitcher->offHCCode0 < pSwitcher->cbHCCode0 || offTrg - pSwitcher->offHCCode1 < pSwitcher->cbHCCode1);
break;
}
#if defined(RT_ARCH_AMD64) || defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
/*
* 64-bit HC Code Selector (no argument).
*/
case FIX_HC_64BIT_CS:
{
# if defined(RT_OS_DARWIN) && defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
# else
AssertFatalMsgFailed(("FIX_HC_64BIT_CS not implemented for this host\n"));
# endif
break;
}
/*
* 64-bit HC pointer to the CPUM instance data (no argument).
*/
case FIX_HC_64BIT_CPUM:
{
break;
}
#endif
/*
* 64-bit HC pointer fixup to (HC) target within the code (32-bit offset).
*/
case FIX_HC_64BIT:
{
Assert(offTrg - pSwitcher->offHCCode0 < pSwitcher->cbHCCode0 || offTrg - pSwitcher->offHCCode1 < pSwitcher->cbHCCode1);
break;
}
#ifdef RT_ARCH_X86
case FIX_GC_64_BIT_CPUM_OFF:
{
break;
}
#endif
/*
* 32-bit ID pointer to (ID) target within the code (32-bit offset).
*/
case FIX_ID_32BIT:
{
Assert(offTrg - pSwitcher->offIDCode0 < pSwitcher->cbIDCode0 || offTrg - pSwitcher->offIDCode1 < pSwitcher->cbIDCode1);
break;
}
/*
* 64-bit ID pointer to (ID) target within the code (32-bit offset).
*/
case FIX_ID_64BIT:
case FIX_HC_64BIT_NOCHECK:
{
Assert(u8 == FIX_HC_64BIT_NOCHECK || offTrg - pSwitcher->offIDCode0 < pSwitcher->cbIDCode0 || offTrg - pSwitcher->offIDCode1 < pSwitcher->cbIDCode1);
break;
}
/*
* Far 16:32 ID pointer to 64-bit mode (ID) target within the code (32-bit offset).
*/
{
Assert(offTrg - pSwitcher->offIDCode0 < pSwitcher->cbIDCode0 || offTrg - pSwitcher->offIDCode1 < pSwitcher->cbIDCode1);
break;
}
#ifdef VBOX_WITH_NMI
/*
* 32-bit address to the APIC base.
*/
case FIX_GC_APIC_BASE_32BIT:
{
break;
}
#endif
default:
break;
}
}
#ifdef LOG_ENABLED
/*
* If Log2 is enabled disassemble the switcher code.
*
* The switcher code have 1-2 HC parts, 1 GC part and 0-2 ID parts.
*/
if (LogIs2Enabled())
{
RTLogPrintf("*** Disassembly of switcher %d '%s' %#x bytes ***\n"
" R0PtrCode = %p\n"
" pu8CodeR3 = %p\n"
" GCPtrCode = %RGv\n"
" u32IDCode = %08x\n"
" pVMRC = %RRv\n"
" pCPUMRC = %RRv\n"
" pVMR3 = %p\n"
" pCPUMR3 = %p\n"
" GCPtrGDT = %RGv\n"
" InterCR3s = %08RHp, %08RHp, %08RHp (32-Bit, PAE, AMD64)\n"
" HyperCR3s = %08RHp (32-Bit, PAE & AMD64)\n"
" SelCS = %04x\n"
" SelDS = %04x\n"
" SelCS64 = %04x\n"
" SelTSS = %04x\n",
pVM,
{
/*
* Figure out where this is.
*/
{
pszDesc = "HCCode0";
}
{
pszDesc = "HCCode1";
}
{
pszDesc = "GCCode";
}
{
pszDesc = "IDCode0";
}
{
pszDesc = "IDCode1";
}
else
{
RTLogPrintf(" %04x: %02x '%c' (nowhere)\n",
offCode++;
continue;
}
/*
* Disassemble it.
*/
while (cbCode > 0)
{
/* try label it */
RTLogPrintf(" *R0HostToGuest:\n");
RTLogPrintf(" *GCGuestToHost:\n");
RTLogPrintf(" *GCCallTrampoline:\n");
RTLogPrintf(" *GCGuestToHostAsm:\n");
RTLogPrintf(" *GCGuestToHostAsmHyperCtx:\n");
RTLogPrintf(" *GCGuestToHostAsmGuestCtx:\n");
/* disas */
char szDisas[256];
if (RT_SUCCESS(DISInstr(&Cpu, (uintptr_t)pu8CodeR3 + offCode, uBase - (uintptr_t)pu8CodeR3, &cbInstr, szDisas)))
else
{
RTLogPrintf(" %04x: %02x '%c'\n",
cbInstr = 1;
}
}
}
}
#endif
}
/**
* Relocator for the 32-Bit to 32-Bit world switcher.
*/
DECLCALLBACK(void) vmmR3Switcher32BitTo32Bit_Relocate(PVM pVM, PVMMSWITCHERDEF pSwitcher, RTR0PTR R0PtrCode, uint8_t *pu8CodeR3, RTGCPTR GCPtrCode, uint32_t u32IDCode)
{
}
/**
* Relocator for the 32-Bit to PAE world switcher.
*/
DECLCALLBACK(void) vmmR3Switcher32BitToPAE_Relocate(PVM pVM, PVMMSWITCHERDEF pSwitcher, RTR0PTR R0PtrCode, uint8_t *pu8CodeR3, RTGCPTR GCPtrCode, uint32_t u32IDCode)
{
}
/**
* Relocator for the 32-Bit to AMD64 world switcher.
*/
DECLCALLBACK(void) vmmR3Switcher32BitToAMD64_Relocate(PVM pVM, PVMMSWITCHERDEF pSwitcher, RTR0PTR R0PtrCode, uint8_t *pu8CodeR3, RTGCPTR GCPtrCode, uint32_t u32IDCode)
{
SELMGetHyperCS(pVM), SELMGetHyperDS(pVM), SELMGetHyperTSS(pVM), SELMGetHyperGDT(pVM), SELMGetHyperCS64(pVM));
}
/**
* Relocator for the PAE to 32-Bit world switcher.
*/
DECLCALLBACK(void) vmmR3SwitcherPAETo32Bit_Relocate(PVM pVM, PVMMSWITCHERDEF pSwitcher, RTR0PTR R0PtrCode, uint8_t *pu8CodeR3, RTGCPTR GCPtrCode, uint32_t u32IDCode)
{
}
/**
* Relocator for the PAE to PAE world switcher.
*/
DECLCALLBACK(void) vmmR3SwitcherPAEToPAE_Relocate(PVM pVM, PVMMSWITCHERDEF pSwitcher, RTR0PTR R0PtrCode, uint8_t *pu8CodeR3, RTGCPTR GCPtrCode, uint32_t u32IDCode)
{
}
/**
* Relocator for the PAE to AMD64 world switcher.
*/
DECLCALLBACK(void) vmmR3SwitcherPAEToAMD64_Relocate(PVM pVM, PVMMSWITCHERDEF pSwitcher, RTR0PTR R0PtrCode, uint8_t *pu8CodeR3, RTGCPTR GCPtrCode, uint32_t u32IDCode)
{
SELMGetHyperCS(pVM), SELMGetHyperDS(pVM), SELMGetHyperTSS(pVM), SELMGetHyperGDT(pVM), SELMGetHyperCS64(pVM));
}
/**
* Relocator for the AMD64 to 32-bit world switcher.
*/
DECLCALLBACK(void) vmmR3SwitcherAMD64To32Bit_Relocate(PVM pVM, PVMMSWITCHERDEF pSwitcher, RTR0PTR R0PtrCode, uint8_t *pu8CodeR3, RTGCPTR GCPtrCode, uint32_t u32IDCode)
{
SELMGetHyperCS(pVM), SELMGetHyperDS(pVM), SELMGetHyperTSS(pVM), SELMGetHyperGDT(pVM), SELMGetHyperCS64(pVM));
}
/**
* Relocator for the AMD64 to PAE world switcher.
*/
DECLCALLBACK(void) vmmR3SwitcherAMD64ToPAE_Relocate(PVM pVM, PVMMSWITCHERDEF pSwitcher, RTR0PTR R0PtrCode, uint8_t *pu8CodeR3, RTGCPTR GCPtrCode, uint32_t u32IDCode)
{
SELMGetHyperCS(pVM), SELMGetHyperDS(pVM), SELMGetHyperTSS(pVM), SELMGetHyperGDT(pVM), SELMGetHyperCS64(pVM));
}
/**
* Selects the switcher to be used for switching to GC.
*
* @returns VBox status code.
* @param pVM VM handle.
* @param enmSwitcher The new switcher.
* @remark This function may be called before the VMM is initialized.
*/
{
/*
* Validate input.
*/
if ( enmSwitcher < VMMSWITCHER_INVALID
|| enmSwitcher >= VMMSWITCHER_MAX)
{
return VERR_INVALID_PARAMETER;
}
/* Do nothing if the switcher is disabled. */
return VINF_SUCCESS;
/*
* Select the new switcher.
*/
if (pSwitcher)
{
Log(("VMMR3SelectSwitcher: enmSwitcher %d -> %d %s\n", pVM->vmm.s.enmSwitcher, enmSwitcher, pSwitcher->pszDesc));
RTR0PTR pbCodeR0 = (RTR0PTR)pVM->vmm.s.pvCoreCodeR0 + pVM->vmm.s.aoffSwitchers[enmSwitcher]; /** @todo fix the pvCoreCodeR0 type */
return VINF_SUCCESS;
}
return VERR_NOT_IMPLEMENTED;
}
/**
* Disable the switcher logic permanently.
*
* @returns VBox status code.
* @param pVM VM handle.
*/
{
/** @todo r=bird: I would suggest that we create a dummy switcher which just does something like:
* @code
* mov eax, VERR_INTERNAL_ERROR
* ret
* @endcode
* And then check for fSwitcherDisabled in VMMR3SelectSwitcher() in order to prevent it from being removed.
*/
return VINF_SUCCESS;
}
/**
* Gets the switcher to be used for switching to GC.
*
* @returns host to guest ring 0 switcher entrypoint
* @param pVM VM handle.
* @param enmSwitcher The new switcher.
*/
{
/*
* Validate input.
*/
if ( enmSwitcher < VMMSWITCHER_INVALID
|| enmSwitcher >= VMMSWITCHER_MAX)
{
return NIL_RTR0PTR;
}
/*
* Select the new switcher.
*/
if (pSwitcher)
{
RTR0PTR pbCodeR0 = (RTR0PTR)pVM->vmm.s.pvCoreCodeR0 + pVM->vmm.s.aoffSwitchers[enmSwitcher]; /** @todo fix the pvCoreCodeR0 type */
}
return NIL_RTR0PTR;
}