CPUMAllRegs.cpp revision 8b0f6d2d53953de1ce264626b185fb4f2298295e
0b87790df72dd730ef361a1ce1a8d40ed4d15e10vboxsync * CPUM - CPU Monitor(/Manager) - Getters and Setters.
0b87790df72dd730ef361a1ce1a8d40ed4d15e10vboxsync * Copyright (C) 2006-2007 Sun Microsystems, Inc.
0b87790df72dd730ef361a1ce1a8d40ed4d15e10vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
0b87790df72dd730ef361a1ce1a8d40ed4d15e10vboxsync * available from http://www.virtualbox.org. This file is free software;
0b87790df72dd730ef361a1ce1a8d40ed4d15e10vboxsync * you can redistribute it and/or modify it under the terms of the GNU
0b87790df72dd730ef361a1ce1a8d40ed4d15e10vboxsync * General Public License (GPL) as published by the Free Software
0b87790df72dd730ef361a1ce1a8d40ed4d15e10vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
0b87790df72dd730ef361a1ce1a8d40ed4d15e10vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
0b87790df72dd730ef361a1ce1a8d40ed4d15e10vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
d1a00c93378091ef28db9d959b2d692cc8143a07vboxsync * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
d1a00c93378091ef28db9d959b2d692cc8143a07vboxsync * Clara, CA 95054 USA or visit http://www.sun.com if you need
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync * additional information or have any questions.
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync/*******************************************************************************
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync* Header Files *
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync*******************************************************************************/
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync/** Disable stack frame pointer generation here. */
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync * Sets or resets an alternative hypervisor context core.
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync * This is called when we get a hypervisor trap set switch the context
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync * core with the trap frame on the stack. It is called again to reset
d1a00c93378091ef28db9d959b2d692cc8143a07vboxsync * back to the default context core when resuming hypervisor execution.
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync * @param pVM The VM handle.
d1a00c93378091ef28db9d959b2d692cc8143a07vboxsync * @param pCtxCore Pointer to the alternative context core or NULL
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync * to go back to the default context core.
d1a00c93378091ef28db9d959b2d692cc8143a07vboxsyncVMMDECL(void) CPUMHyperSetCtxCore(PVM pVM, PCPUMCTXCORE pCtxCore)
d1a00c93378091ef28db9d959b2d692cc8143a07vboxsync LogFlow(("CPUMHyperSetCtxCore: %p/%p/%p -> %p\n", pVM->cpum.s.CTX_SUFF(pHyperCore), pCtxCore));
d1a00c93378091ef28db9d959b2d692cc8143a07vboxsync pVM->cpum.s.pHyperCoreR3 = (R3PTRTYPE(PCPUMCTXCORE))VM_R3_ADDR(pVM, pCtxCore);
d1a00c93378091ef28db9d959b2d692cc8143a07vboxsync pVM->cpum.s.pHyperCoreR0 = (R0PTRTYPE(PCPUMCTXCORE))VM_R0_ADDR(pVM, pCtxCore);
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync pVM->cpum.s.pHyperCoreRC = (RCPTRTYPE(PCPUMCTXCORE))VM_RC_ADDR(pVM, pCtxCore);
6d73c66200a04223ae56a22ff221ec32193717a5vboxsync pVM->cpum.s.pHyperCoreR3 = (R3PTRTYPE(PCPUMCTXCORE))MMHyperCCToR3(pVM, pCtxCore);
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync pVM->cpum.s.pHyperCoreR0 = (R0PTRTYPE(PCPUMCTXCORE))MMHyperCCToR0(pVM, pCtxCore);
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync pVM->cpum.s.pHyperCoreRC = (RCPTRTYPE(PCPUMCTXCORE))MMHyperCCToRC(pVM, pCtxCore);
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync * Gets the pointer to the internal CPUMCTXCORE structure for the hypervisor.
6418539e7e63a36f6c1f2e6170e4e881a3693947vboxsync * This is only for reading in order to save a few calls.
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync * @param pVM Handle to the virtual machine.
2622c26c6b4105d944a29c5e2c77b6ef26e10101vboxsync * Queries the pointer to the internal CPUMCTX structure for the hypervisor.
6d73c66200a04223ae56a22ff221ec32193717a5vboxsync * @returns VBox status code.
6d73c66200a04223ae56a22ff221ec32193717a5vboxsync * @param pVM Handle to the virtual machine.
6d73c66200a04223ae56a22ff221ec32193717a5vboxsync * @param ppCtx Receives the hyper CPUMCTX pointer when successful.
6d73c66200a04223ae56a22ff221ec32193717a5vboxsync * @deprecated This will *not* (and has never) given the right picture of the
6d73c66200a04223ae56a22ff221ec32193717a5vboxsync * hypervisor register state. With CPUMHyperSetCtxCore() this is
a50808e8a35d9593432271572fb44ab9f1455395vboxsync * getting much worse. So, use the individual functions for getting
6d73c66200a04223ae56a22ff221ec32193717a5vboxsync * and esp. setting the hypervisor registers.
return VINF_SUCCESS;
return VINF_SUCCESS;
if (pcbLimit)
if (pcbLimit)
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
#ifdef IN_RC
AssertMsg((HyperCR0 & (X86_CR0_TS | X86_CR0_MP)) == (X86_CR0_TS | X86_CR0_MP), ("%#x\n", HyperCR0));
# ifdef VBOX_STRICT
AssertMsg((HyperCR0 & (X86_CR0_TS | X86_CR0_MP)) == (X86_CR0_TS | X86_CR0_MP), ("%#x\n", HyperCR0));
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
return VINF_SUCCESS;
switch (idMsr)
case MSR_IA32_CR_PAT:
case MSR_IA32_SYSENTER_CS:
case MSR_IA32_SYSENTER_EIP:
case MSR_IA32_SYSENTER_ESP:
case MSR_K6_EFER:
case MSR_K8_SF_MASK:
case MSR_K6_STAR:
case MSR_K8_LSTAR:
case MSR_K8_CSTAR:
case MSR_K8_KERNEL_GS_BASE:
AssertFailed();
return u64;
if (pcbLimit)
switch (iReg)
case USE_REG_CR0:
case USE_REG_CR2:
case USE_REG_CR3:
case USE_REG_CR4:
return VERR_INVALID_PARAMETER;
return VINF_SUCCESS;
return VINF_SUCCESS;
VMMDECL(void) CPUMGetGuestCpuId(PVM pVM, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
Log2(("CPUMGetGuestCpuId: iLeaf=%#010x %RX32 %RX32 %RX32 %RX32\n", iLeaf, *pEax, *pEbx, *pEcx, *pEdx));
switch (enmFeature)
case CPUMCPUIDFEATURE_APIC:
case CPUMCPUIDFEATURE_X2APIC:
case CPUMCPUIDFEATURE_SEP:
case CPUMCPUIDFEATURE_SYSCALL:
case CPUMCPUIDFEATURE_PAE:
case CPUMCPUIDFEATURE_NXE:
case CPUMCPUIDFEATURE_LAHF:
case CPUMCPUIDFEATURE_PAT:
switch (enmFeature)
case CPUMCPUIDFEATURE_PAE:
switch (enmFeature)
case CPUMCPUIDFEATURE_APIC:
case CPUMCPUIDFEATURE_X2APIC:
case CPUMCPUIDFEATURE_PAE:
case CPUMCPUIDFEATURE_PAT:
#ifdef CPUM_VIRTUALIZE_DRX
#ifdef IN_RC
#ifdef IN_RC
return VINF_SUCCESS;
if (!pCtxCore)
Assert((pCpumCpu->Guest.cr0 & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE)) == (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP));
return VINF_SUCCESS;
return rc;
if (!pCtxCore)
AssertMsg(pCtxCore->eflags.Bits.u1VM || pCtxCore->eflags.Bits.u2IOPL < (unsigned)(pCtxCore->ss & X86_SEL_RPL),
return rc;
#ifdef IN_RING0
return fFlags;
#ifndef IN_RING3
#ifndef IN_RING0
cpl = 0;
return cpl;
return enmMode;