CPUMR0A.asm revision 4d02c6ebc68acd1bdfa5a26f9bbcfb64cb8463ae
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync; CPUM - Guest Context Assembly Routines.
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync; Copyright (C) 2006-2013 Oracle Corporation
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync; This file is part of VirtualBox Open Source Edition (OSE), as
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync; available from http://www.virtualbox.org. This file is free software;
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync; you can redistribute it and/or modify it under the terms of the GNU
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync; General Public License (GPL) as published by the Free Software
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync; Foundation, in version 2 as it comes in the "COPYING" file of the
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync;*******************************************************************************
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync;* Header Files *
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync;*******************************************************************************
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync%ifdef IN_RING3
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync %error "The jump table doesn't link on leopard."
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync;*******************************************************************************
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync;* Defined Constants And Macros *
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync;*******************************************************************************
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync;; The offset of the XMM registers in X86FXSTATE.
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync; Use define because I'm too lazy to convert the struct.
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync%define XMM_OFF_IN_X86FXSTATE 160
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync;*******************************************************************************
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync;* External Symbols *
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync;*******************************************************************************
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsync%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsyncextern NAME(SUPR0AbsIs64bit)
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsyncextern NAME(SUPR0Abs64bitKernelCS)
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsyncextern NAME(SUPR0Abs64bitKernelSS)
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsyncextern NAME(SUPR0Abs64bitKernelDS)
20024c6bd4100e9925d1ff0516af5753814fc43dvboxsyncextern NAME(SUPR0AbsKernelCS)
; Store the SUPR0AbsIs64bit absolute value here so we can cmp/test without
; Saves the host FPU/XMM state and restores the guest state.
cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
or dword [xDX + CPUMCPU.fUseFlags], (CPUM_USED_FPU | CPUM_USED_FPU_SINCE_REM)
o64 fxsave [xDX + CPUMCPU.Host.fpu] ; ASSUMES that all VT-x/AMD-V boxes sports fxsave/fxrstor (safe assumption)
o64 fxrstor [xDX + CPUMCPU.Guest.fpu]
fxsave [xDX + CPUMCPU.Host.fpu] ; ASSUMES that all VT-x/AMD-V boxes sports fxsave/fxrstor (safe assumption)
fxrstor [xDX + CPUMCPU.Guest.fpu]
lea r11, [xDX + CPUMCPU.Host.fpu + XMM_OFF_IN_X86FXSTATE]
o64 fxsave [rdx + CPUMCPU.Host.fpu]
o64 fxrstor [rdx + CPUMCPU.Guest.fpu]
; Saves the host FPU/XMM state
cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
or dword [xDX + CPUMCPU.fUseFlags], (CPUM_USED_FPU | CPUM_USED_FPU_SINCE_REM)
fxsave [xDX + CPUMCPU.Host.fpu] ; ASSUMES that all VT-x/AMD-V boxes support fxsave/fxrstor (safe assumption)
; Saves the guest FPU/XMM state and restores the host state.
test dword [xDX + CPUMCPU.fUseFlags], CPUM_USED_FPU
cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
o64 fxsave [xDX + CPUMCPU.Guest.fpu] ; ASSUMES that all VT-x/AMD-V boxes support fxsave/fxrstor (safe assumption)
o64 fxrstor [xDX + CPUMCPU.Host.fpu]
fxsave [xDX + CPUMCPU.Guest.fpu] ; ASSUMES that all VT-x/AMD-V boxes support fxsave/fxrstor (safe assumption)
fxrstor [xDX + CPUMCPU.Host.fpu]
and dword [xDX + CPUMCPU.fUseFlags], ~CPUM_USED_FPU
o64 fxsave [rdx + CPUMCPU.Guest.fpu]
o64 fxrstor [rdx + CPUMCPU.Host.fpu]
; Sets the host's FPU/XMM state
test dword [xDX + CPUMCPU.fUseFlags], CPUM_USED_FPU
cli ; interrupt occurs while we're doing fxsave/fxrstor/cr0.
o64 fxrstor [xDX + CPUMCPU.Host.fpu]
fxrstor [xDX + CPUMCPU.Host.fpu]
and dword [xDX + CPUMCPU.fUseFlags], ~CPUM_USED_FPU
o64 fxrstor [rdx + CPUMCPU.Host.fpu]