CPUM,IEM,HM: Enabled XSAVE and AVX for AMD-V too.

HM,CPUM,IEM: XSETBV fixes and adjustments.

IEM,CPUM: Implemented XSETBV and XGETBV.

HMR0VMX,EM,IEM: Moved the CRx related interpretation methods from EM to IEM (VT-x only) to avoid tinkering with the EMAll.cpp stuff any more.

CPUM,IEM: Expose GuestFeatures and HostFeatures (exploded CPUID), making IEM use it. Early XSAVE/AVX guest support preps.

Removed iemFRegIsFxSaveFormat.

VMM,REM: Allocate the FPU/SSE/AVX/FUTURE state stuff. We need to use pointers to substates anyway and this will make CPUMCPU much smaller.

CPUMCTXCORE elimination.

CPUMCTX,CPUMHOST: Replaced the fpu (X86FXSAVE) member with an XState (X86XSAVEAREA) member.

typo

Corrected x86.h/mac typo.

VMM,REM: CPUID revamp - almost there now.

VMM/MSRs: Added status codes for returning to ring-3 to service the MSR access.

IEM: into is invalid in 64-bit mode; added int1/icebp.

IEMAll: Added IEM_MC_FETCH_MEM_I64 and tweaked the VT-x verification code a little.

VMM/IEM: minor nit.

IEM: Implemented expand-down limit checks (2 out of 3).

VMM/IEM: added todo.

IEM: Clear TRPM when exception was raised, too.

VMM/IEM: Reset TRPM only when IEM successfully injects the trap. Regression exposed by r95968.

added todo

iemInitDecoderAndPrefetchOpcodes: Outside 64-bit mode, effective address calculation shall be done using 32-bit precision according to 4.5.3, AMD64 Vol. 2. See xTracker #7408.

iemInitDecoderAndPrefetchOpcodes: Outside 64-bit mode, effective address calculation shall be done using 32-bit precision according to 4.5.3, AMD64 Vol. 2. See xTracker #7408.

VMM: Use IEM task switches since old code does not work at all.

VMM/IEM: Block further NMIs while injecting an NMI.

VMM: Doxygen bugref comment consistency.

VMM/IEM: nit.

IEM: Fall back if IEMInjectTrpmEvent() did not do its job.

VMM/IEM: Implemented hardware task-switches, code path disabled.

IEM: Use ASPECT_NOT_IMPLEMENTED on interrupt task gates instead of triggering a guru.

PGM,IEM: Changed PGMPhysIemGCPhys2Ptr to not require A20 to be masked (copy & paste bug).

VMM: Warning.

iprt/x86.h: Added X86_IS_CANONICAL.

VMM: Whitespace cleanups by scm.

IEM: Read unpatched bytes. Useless (disabled for ages) CSAM hooks.

IEM: Clear RF flag on jump.

IEM: read-modified-write should have the r/w err bit set even when it happens on a not present page.

Ignore RF when checking against REM too.

IEM: Some RF adjustments. Verification logging fixes.

PUSH SREG intel update.

IEM: Implemented RF. Working on verfication against VT-x.

fixes

IEM: Set dirty and accessed bits on pages. Initialize output vars before I/O port reads. Clear DR7.GD on #DB.

VMM: More debugging related stuff.

IEM: LAR,LSL,ARPL, and some tracing (RTTraceBuf*).

IEM: Bunch of fixes, mostly DOS related.

IEM: Implemented expand down limit checks.

IEM,HM,PGM: Started on string I/O optimizations using IEM (disabled). Cleaned up confusing status code handling in hmR0VmxCheckForceFlags (involving PGM) as well as some use of incorrect doxygen groups (@name).

IEM: Implemented I/O permission bitmap checks.

PATM,IEM: Added interface for safely and quickly reading patch code.

IEM: Started introducing some disassembler details in the decoder that can later be used for instruction statistics and building heuristics.

IEM: pmovmskb.

IEM: Added pcmpeqb/w/d and corrected alignment exception handling a little.

IEM: Packed Shuffle Stuff.

IEM: movd/movq overhaul and both directions.

IEM: More SSE and MMX.

IEM: More SSE/MMX stuff.

IEMAll.cpp: Build fix.

IEM: MOVD XM,GREG (sse2,mmx); REX prefix decoding fixes (must be last prefix). VEX preps, correcting LDS and LES to not be available in 64-bit mode.

IEM: SS=0 fixes, the right way this time.

CPUM,++: Fix DR6 and DR7 read-as-1 (RA1) and read-as-zero (RAZ) values on load since REM didn't set them right for years. Introduced constants for these values.

IEM: Implemented swapgs

IEM: Implemented the mwait & monitor instructions. (Still work to be done on mwait in EM, but that's a different topic.)

IEM: More 64-bit fixes.

IEM: Implemented mfence, lfence, sfence.

IEM: More 64-bit fixes.

64-bit segmentation fixes to string instr.

Initial longmode iret.

IEM: TPR access.

IEM: int3 CS.LIMIT check should raise GP(0) not GP(CS).

IEM: Long mode hacking.

More interrupt dispatching in long mode (untested).

IEM: Got further in the long mode interrupt dispatching code.

IEM: started on iemRaiseXcptOrIntInLongMode but isn't there quite yet.

IEM: idiv and div missing bits and fixes.

64-bit mode addressing fix.

rip addressing fix for instructions with immediates.

Fixed first bunch of bugs found by the testcase.

IEM: Interrupt fix for --execute-all-in-iem.

IEM: movsxd

VMM, recompiler: Purge deprecated macros.

IEM: More 64-bit guest debugging.

IEM: Long mode debugging.

IEM/EM: Made DSL boot to command line (X doesn't start yet).

Made dSYM-bundle loading work as well as line numbers in the stack traces (when possible).

VMM: SELM and VMM early HM init changes.

VMMR0/HMVMXR0: Redo of VT-x event injection. Some STAM cleanup. VMM: TRPM enhancements to include instruction-length information for software interrupts and exceptions (#BP, #OF).

header (C) fixes

DBGF,DBGC,++: PVM -> PUVM. Some refactoring and cleanup as well.

IEM: CR4 and CR3 fixes. Debugging hacks.

IEM and EM: debugging/hacking.

IEM: Two NT4SP1 verification/rem kludges and a related @todo.

IEM: Eflags fixes, added API variants that bypasses access handlers, ...

IEM: IRET to V8086 (had to try). Set CPUM_CHANGED_FPU_REM. Added missing RIP advancing to fincstp and fdecstp.

Fixed fnstcw. Implemented fnsave and frstor.

IEM: Fixed verification mode interrupt injection bug.

IEM: Implemented CMPXCHG.

IEM: Implemented WRMSR. Fixed mixed up src/dst in XADD.

IEM: Implemented CMPXCHG8B. Fixed PGMPhysIemGCPhys2Ptr so that it doesn't return informational status returns, only VINF_SUCCESS and errors.

IEM: Implemented SIDT, SGDT, SLDT and STR. Fixed LLDT and LTR mode checks. Fixed hidden selector handling bugs in selector loading and mode switching code. Fixed clobbering of high EBP bits in ENTER (16-bit stack). Changed MOVS to not use memcpy and flag the verifier if the src/dst areas are in overlapping in any important way.

IEM: Implemented SGDT and SIDT.

IEM: imul fixes.

IEM: ring-3 mapping fixes.

IEM: Working on new BIOS / NT...

IEM: Status code handling. PGM interface for R0 and RC.

IEM: Stats and more gentle stubs for unimplemented instructions.

VMM: Fixed some selector arithmetic, introducing a new constand and renaming and old one to make things clearer. Also added CPUMGetGuestLdtrEx and make some (but not all) of SELM use this instead of shadow GDT.

VMM: Futher work on dealing with hidden segment register, esp. when going stale.

IEM: Integration work...

CPUMIsGuestIn64BitCode/CPUMIsGuestIn64BitCodeEx changes together with some early lazily loading of hidden selectors (raw-mode).

CPUMGetGuestCPL: Drop the context core pointer and use the Guest state in CPUMCPU via pVCpu.

IEM,EM: We can safely assume that all CPUMCTXCORE and CPUMCTX arguments are pointing to the one in the VMCPU/CPUMCPU structure and no more stuff on the stack.

Reverted r78802, committed too much.

build fix

CPUM: Combined the visible and hidden selector register data into one structure. Preparing for lazily resolving+caching of hidden registers in raw-mode.

IEM: Windows build fix

IEM: Windows build fix

IEM hacking.

IEM: Implemented IEMExecOneWithPrefetchedByPC and IEMExecOneEx.

Doxygen.

Typo.

EM/IEM/PATM: some refactoring.

IEM_MC_STORE_MEM_NEG_QNAN_R80_BY_REF bugfix spotted by Frank.

Introduced VBOX_WITH_REM in Config.kmk and the VMM.

Added stubs for most instructions.

IEM: fnstsw m16, ffree and ffreep, reimplemented fincstp and fdecstp.

Implemented fpu instruction stubs starting with 0xdd (fiadd m32i ++).

build fix

IEM: fstp/fld m80r.

IEM: fst[p], fist[p] and fisttp implementations and fixes.

IEM: Completed FPU instruction starting with 0xdb. Fixed build break from previous commit.

IEM: Conditional FPU move instructions (FCMOV*).

f2xm1, fyl2x, fptan. fpu stack push bugfix.

IEM: Implemented 0xd9 0xe0 thru 0xd9 0xee (fpu stuff).

IEM: Implemented fxch.

IEM: fnop, fld stN and a bunch of FPU related fixes.

IEM: Implemented fldcw, fldenv fnstcw and fnstenv.

IEM: Implemented missing FPU instructions starting with 0xd8 and adjusted fld m32r and fld m64r.

fstp st0

callf fixes. fxsave bounce buffering fix. Don't try fxsave output as REM is incomplete.

IEM: Logging adjustments.

protected mode far call and far return.

checked out some todos.

IEM: fnclex.

Implemented fistp (needs testcase).

IEM: A bunch of r80 by r80 instructions, needed fsubrp stN,st0.

fmul st0,m64r

IEM: Debugged fdiv, hacked my way around shortcuts in the recompiler FPU implementation.

IEM: fdiv implemented but untested.

fdiv - almost there...

fdiv implementation in progress (-> laptop).

IEM: fld m64i

Implemented fld, currently sans #D exceptions.

hacking in progress...

a bit more...

IEM: fxsave & fxrstor.

IEM: Filled in some NOPs and PREFETCHes.

IEM: VERR_NOT_IMPLEMENTED -> VERR_IEM_INSTR_NOT_IMPLEMENTED or VERR_IEM_ASPECT_NOT_IMPLEMENTED.

IEM: Implemented bswap. Fixed verification of INS.

IEM/VerficationMode: Work around MOV drX,greg bug in REM.

IEM: String fixes; invlpg.

gcc 4.2 on mac in debug mode maybe [insert fitting explitives].

two int xxh bugfixes (32-bit prot mode).

iret to different privilege level (32-bit prot mode). Hacked int 80h from user mode into working (seemingly).

VMM: don't use generic IPE status codes, use specific ones. Part 1.

nits from a few days back.

iprt/types.h,IEM: Moved the pointer union types to iprt/types.h, adding volatile versions of it.

IEM: Adding GET_NEXT_U16_ZX_U32/64 and GET_NEXT_U32_ZX_U64.

IEM: Fixed some details in the AAM, SAHF and LAHF instruction emulation.

VMM: -Wunused-parameter

VMM,IPRT: -Wunused-function.

IEM: Implemented LAHF/SAHF.

IEM: Implemented CMC.

IEM: Implemented CBW and friends.

IEM: Made it link on 32-bit windows.

Moved VBox/x86.h/mac to iprt/x86.h/mac.

IEM: Implemented AAD (used by the bios build by watcomc) and fixed a LES decoding bug.

IEM: exception hacking...

IEM: xadd

IEM: Implemented the bare minimum of protected mode interrupt handling (dispatching + iret).

burn fix?

-> office

IEM: Hacking in progress...

IEM: Hacking in progress...

IEM: Some exception/interrupt dispatching preparations.

IEM: Reduce the code / exception table size a wee bit for GCC.

IEM: check more, try fix build.

IEM: More cleanup and checks.

IEM: More cleanup and checks.

IEM: Cleaning up and 'microcode' testcase - work in progress...

IEM: rdtsc, mov DRx, ltr, lldt. cmovnle fix.

IEM: bsf, bsr, bt, btc, bts, btr and leave. Some cleaning up.

IEM: SHLD, SHRD.

IEM: Some more bits.

IEM: CMOVcc, JMPF Ep.

IEM: cpuid, clts, fixes.

IEM: SMSW and LMSW.

IEM: pop Ev; fixed the setting of accessed bit.

IEM: Moved the iemCImpl functions out of IEMAll.cpp and into IEMAllCImpl.cpp.h.

IEM: Fixed missing RIP advancing when rCX was 0. 'LSS GReg, r/m' should not inhibit interrupt delivery like pop SS and mov SS, GReg.

build fix

IEM: Some more instructions and tweaks.

IEM: implemented XLAT, extended the output when hitting a stub.

IEM: fixed interrupt delivery in verification mode.

IEM: imul, fixes & optimization hack.

IEM: XCHG mem,reg and CALLN r/m

mac build fix.

IEM: hlt

build fix

IEM: Verify memory writes, fixed bugs found doing so.

IEM: Verify I/O port read and writes as well as MMIO accesses. Implemented some more instructions, getting thru the BIOS now.

IEM: Some more bits.

win.x86 build fix.

build fixes.

build fixes.

build fixes.

build fixes.

IEM: Initial commit, work in progress.