IEMInternal.h revision 686bcae3ce04d74894f07a72707dff5302d6800d
/* $Id$ */
/** @file
* IEM - Internal header file.
*/
/*
* Copyright (C) 2011-2012 Oracle Corporation
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*/
#ifndef ___IEMInternal_h
#define ___IEMInternal_h
/** @defgroup grp_iem_int Internals
* @ingroup grp_iem
* @internal
* @{
*/
/** Finish and move to types.h */
typedef union
{
} RTFLOAT32U;
typedef RTFLOAT32U *PRTFLOAT32U;
typedef RTFLOAT32U const *PCRTFLOAT32U;
/**
* Operand or addressing mode.
*/
typedef enum IEMMODE
{
IEMMODE_16BIT = 0,
} IEMMODE;
/**
* Extended operand mode that includes a representation of 8-bit.
*
* This is used for packing down modes when invoking some C instruction
* implementations.
*/
typedef enum IEMMODEX
{
} IEMMODEX;
/**
* Branch types.
*/
typedef enum IEMBRANCH
{
IEMBRANCH_JUMP = 1,
} IEMBRANCH;
/**
* A FPU result.
*/
typedef struct IEMFPURESULT
{
/** The output value. */
/** The output status. */
} IEMFPURESULT;
/** Pointer to a FPU result. */
typedef IEMFPURESULT *PIEMFPURESULT;
/** Pointer to a const FPU result. */
typedef IEMFPURESULT const *PCIEMFPURESULT;
/**
* A FPU result consisting of two output values and FSW.
*/
typedef struct IEMFPURESULTTWO
{
/** The first output value. */
/** The output status. */
/** The second output value. */
/** Pointer to a FPU result consisting of two output values and FSW. */
typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
/** Pointer to a const FPU result consisting of two output values and FSW. */
typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
#ifdef IEM_VERIFICATION_MODE
/**
* Verification event type.
*/
typedef enum IEMVERIFYEVENT
{
/** Checks if the event type is a RAM read or write. */
# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE || (a_enmType) == IEMVERIFYEVENT_RAM_READ)
/**
* Verification event record.
*/
typedef struct IEMVERIFYEVTREC
{
/** Pointer to the next record in the list. */
struct IEMVERIFYEVTREC *pNext;
/** The event type. */
/** The event data. */
union
{
/** IEMVERIFYEVENT_IOPORT_READ */
struct
{
} IOPortRead;
/** IEMVERIFYEVENT_IOPORT_WRITE */
struct
{
} IOPortWrite;
/** IEMVERIFYEVENT_RAM_READ */
struct
{
} RamRead;
/** IEMVERIFYEVENT_RAM_WRITE */
struct
{
} RamWrite;
} u;
/** Pointer to an IEM event verification records. */
typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
#endif /* IEM_VERIFICATION_MODE */
/**
* The per-CPU IEM state.
*/
typedef struct IEMCPU
{
/** Pointer to the CPU context - ring-3 contex. */
/** Pointer to the CPU context - ring-0 contex. */
/** Pointer to the CPU context - raw-mode contex. */
/** Offset of the VMCPU structure relative to this structure (negative). */
/** Offset of the VM structure relative to this structure (negative). */
/** Whether to bypass access handlers or not. */
bool fByPassHandlers;
/** Explicit alignment padding. */
bool afAlignment0[3];
/** The flags of the current exception / interrupt. */
/** The current exception / interrupt. */
/** Exception / interrupt recursion depth. */
/** Explicit alignment padding. */
bool afAlignment1[1];
/** The CPL. */
/** The current CPU execution mode (CS). */
/** Info status code that needs to be propagated to the IEM caller.
* This cannot be passed internally, as it would complicate all success
* checks within the interpreter making the code larger and almost impossible
* to get right. Instead, we'll store status codes to pass on here. Each
* source of these codes will perform appropriate sanity checks. */
/** @name Statistics
* @{ */
/** The number of instructions we've executed. */
/** The number of potential exits. */
/** The number of bytes data or stack written (mostly for IEMExecOneEx).
* This may contain uncommitted writes. */
/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
/** Counts informational statuses returned (other than VINF_SUCCESS). */
/** Counts other error statuses returned. */
/** Number of times rcPassUp has been used. */
#ifdef IEM_VERIFICATION_MODE
/** The Number of I/O port reads that has been performed. */
/** The Number of I/O port writes that has been performed. */
/** Set if no comparison to REM is currently performed.
* This is used to skip past really slow bits. */
bool fNoRem;
/** Indicates that RAX and RDX differences should be ignored since RDTSC
* and RDTSCP are timing sensitive. */
bool fIgnoreRaxRdx;
/** Indicates that a MOVS instruction with overlapping source and destination
* was executed, causing the memory write records to be incorrrect. */
bool fOverlappingMovs;
/** This is used to communicate a CPL changed caused by IEMInjectTrap that
* CPUM doesn't yet reflect. */
bool afAlignment2[4];
/** Mask of undefined eflags.
* The verifier will any difference in these flags. */
/** The CS of the instruction being interpreted. */
/** The RIP of the instruction being interpreted. */
/** The physical address corresponding to abOpcodes[0]. */
#endif
/** @} */
/** @name Decoder state.
* @{ */
/** The default addressing mode . */
/** The effective addressing mode . */
/** The default operand mode . */
/** The effective operand mode . */
/** The prefix mask (IEM_OP_PRF_XXX). */
/** The extra REX ModR/M register field bit (REX.R << 3). */
/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
* (REX.B << 3). */
/** The extra REX SIB index field bit (REX.X << 3). */
/** The effective segment register (X86_SREG_XXX). */
/** The current offset into abOpcodes. */
/** The size of what has currently been fetched into abOpcodes. */
/** The opcode bytes. */
/** Offset into abOpcodes where the FPU instruction starts.
* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
* instruction result is committed. */
/** @}*/
/** Alignment padding for aMemMappings. */
/** The number of active guest memory mappings. */
/** The next unused mapping index. */
/** Records for tracking guest memory mappings. */
struct
{
/** The address of the mapped bytes. */
void *pv;
#endif
/** The access flags (IEM_ACCESS_XXX).
* IEM_ACCESS_INVALID if the entry is unused. */
#if HC_ARCH_BITS == 64
#endif
} aMemMappings[3];
/** Locking records for the mapped memory. */
union
{
} aMemMappingLocks[3];
/** Bounce buffer info.
* This runs in parallel to aMemMappings. */
struct
{
/** The physical address of the first byte. */
/** The physical address of the second page. */
/** The number of bytes in the first page. */
/** The number of bytes in the second page. */
/** Whether it's unassigned memory. */
bool fUnassigned;
/** Explicit alignment padding. */
bool afAlignment5[3];
} aMemBbMappings[3];
/** Bounce buffer storage.
* This runs in parallel to aMemMappings and aMemBbMappings. */
struct
{
} aBounceBuffers[3];
#ifdef IEM_VERIFICATION_MODE
/** The event verification records for what IEM did (LIFO). */
/** Insertion point for pIemEvtRecHead. */
/** The event verification records for what the other party did (FIFO). */
/** Insertion point for pOtherEvtRecHead. */
/** List of free event records. */
#endif
} IEMCPU;
/** Pointer to the per-CPU IEM state. */
/** Converts a IEMCPU pointer to a VMCPU pointer.
* @returns VMCPU pointer.
* @param a_pIemCpu The IEM per CPU instance data.
*/
/** Converts a IEMCPU pointer to a VM pointer.
* @returns VM pointer.
* @param a_pIemCpu The IEM per CPU instance data.
*/
/** @name IEM_ACCESS_XXX - Access details.
* @{ */
/** The writes are partial, so if initialize the bounce buffer with the
* orignal RAM content. */
/** Used in aMemMappings to indicate that the entry is bounce buffered. */
/** Read+write data alias. */
/** Write data alias. */
/** Read data alias. */
/** Instruction fetch alias. */
/** Stack write alias. */
/** Stack read alias. */
/** Stack read+write alias. */
/** Read system table alias. */
/** Read+write system table alias. */
/** @} */
/** @name Prefix constants (IEMCPU::fPrefixes)
* @{ */
#define IEM_OP_PRF_REX_R RT_BIT_32(25) /**< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). */
#define IEM_OP_PRF_REX_B RT_BIT_32(26) /**< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). */
#define IEM_OP_PRF_REX_X RT_BIT_32(27) /**< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). */
/** @} */
/**
* Tests if verification mode is enabled.
*
* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
* should therefore cause the compiler to eliminate the verification branch
* of an if statement. */
#ifdef IEM_VERIFICATION_MODE
#else
# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
#endif
/**
* Indicates to the verifier that the given flag set is undefined.
*
* Can be invoked again to add more flags.
*
* This is a NOOP if the verifier isn't compiled in.
*/
#ifdef IEM_VERIFICATION_MODE
# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags |= (a_fEfl); } while (0)
#else
# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
#endif
/** @def IEM_DECL_IMPL_TYPE
* For typedef'ing an instruction implementation function.
*
* @param a_RetType The return type.
* @param a_Name The name of the type.
* @param a_ArgList The argument list enclosed in parentheses.
*/
/** @def IEM_DECL_IMPL_DEF
* For defining an instruction implementation function.
*
* @param a_RetType The return type.
* @param a_Name The name of the type.
* @param a_ArgList The argument list enclosed in parentheses.
*/
#if defined(__GNUC__) && defined(RT_ARCH_X86)
#else
#endif
/** @name Arithmetic assignment operations on bytes (binary).
* @{ */
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t *pu8Dst, uint8_t u8Src, uint32_t *pEFlags));
typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
/** @} */
/** @name Arithmetic assignment operations on words (binary).
* @{ */
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t *pu16Dst, uint16_t u16Src, uint32_t *pEFlags));
typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
/** @} */
/** @name Arithmetic assignment operations on double words (binary).
* @{ */
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t *pu32Dst, uint32_t u32Src, uint32_t *pEFlags));
typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
/** @} */
/** @name Arithmetic assignment operations on quad words (binary).
* @{ */
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t *pu64Dst, uint64_t u64Src, uint32_t *pEFlags));
typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
/** @} */
/** @name Compare operations (thrown in with the binary ops).
* @{ */
/** @} */
/** @name Test operations (thrown in with the binary ops).
* @{ */
/** @} */
/** @name Bit operations operations (thrown in with the binary ops).
* @{ */
/** @} */
/** @name Exchange memory with register operations.
* @{ */
/** @} */
/** @name Exchange and add operations.
* @{ */
IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t *pu16Dst, uint16_t *pu16Reg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t *pu32Dst, uint32_t *pu32Reg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t *pu64Dst, uint64_t *pu64Reg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t *pu8Dst, uint8_t *pu8Reg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t *pu16Dst, uint16_t *pu16Reg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t *pu32Dst, uint32_t *pu32Reg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t *pu64Dst, uint64_t *pu64Reg, uint32_t *pEFlags));
/** @} */
/** @name Compare and exchange.
* @{ */
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t *pu8Dst, uint8_t *puAl, uint8_t uSrcReg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t *pu8Dst, uint8_t *puAl, uint8_t uSrcReg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t *pu16Dst, uint16_t *puAx, uint16_t uSrcReg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t *pu16Dst, uint16_t *puAx, uint16_t uSrcReg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t *pu32Dst, uint32_t *puEax, uint32_t uSrcReg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t *pu32Dst, uint32_t *puEax, uint32_t uSrcReg, uint32_t *pEFlags));
#ifdef RT_ARCH_X86
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t *pu64Dst, uint64_t *puRax, uint64_t *puSrcReg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t *pu64Dst, uint64_t *puRax, uint64_t *puSrcReg, uint32_t *pEFlags));
#else
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t *pu64Dst, uint64_t *puRax, uint64_t uSrcReg, uint32_t *pEFlags));
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t *pu64Dst, uint64_t *puRax, uint64_t uSrcReg, uint32_t *pEFlags));
#endif
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
/** @} */
/** @name Double precision shifts
* @{ */
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t *pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t *pEFlags));
typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t *pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t *pEFlags));
typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t *pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t *pEFlags));
typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
/** @} */
/** @name Bit search operations (thrown in with the binary ops).
* @{ */
/** @} */
/** @name Signed multiplication operations (thrown in with the binary ops).
* @{ */
/** @} */
/** @name Arithmetic assignment operations on bytes (unary).
* @{ */
typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
/** @} */
/** @name Arithmetic assignment operations on words (unary).
* @{ */
typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
/** @} */
/** @name Arithmetic assignment operations on double words (unary).
* @{ */
typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
/** @} */
/** @name Arithmetic assignment operations on quad words (unary).
* @{ */
typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
/** @} */
/** @name Shift operations on bytes (Group 2).
* @{ */
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t *pu8Dst, uint8_t cShift, uint32_t *pEFlags));
typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
/** @} */
/** @name Shift operations on words (Group 2).
* @{ */
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t *pu16Dst, uint8_t cShift, uint32_t *pEFlags));
typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
/** @} */
/** @name Shift operations on double words (Group 2).
* @{ */
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t *pu32Dst, uint8_t cShift, uint32_t *pEFlags));
typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
/** @} */
/** @name Shift operations on words (Group 2).
* @{ */
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t *pu64Dst, uint8_t cShift, uint32_t *pEFlags));
typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
/** @} */
/** @name Multiplication and division operations.
* @{ */
typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t *pu16AX, uint8_t u8FactorDivisor, uint32_t *pEFlags));
typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t *pu16AX, uint16_t *pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t *pu32EAX, uint32_t *pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t *pu64RAX, uint64_t *pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
/** @} */
/** @name Byte Swap.
* @{ */
IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t *pu32Dst)); /* Yes, 32-bit register access. */
/** @} */
/** @name FPU operations taking a 32-bit float argument
* @{ */
typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
/** @} */
/** @name FPU operations taking a 64-bit float argument
* @{ */
typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
/** @} */
/** @name FPU operations taking a 80-bit float argument
* @{ */
typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
/** @} */
/** @name FPU operations taking a 16-bit signed integer argument
* @{ */
typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
/** @} */
/** @name FPU operations taking a 32-bit signed integer argument
* @{ */
typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
/** @} */
/** @name FPU operations taking a 64-bit signed integer argument
* @{ */
typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
/** @} */
/** @name Function tables.
* @{
*/
/**
* Function table for a binary operator providing implementation based on
* operand size.
*/
typedef struct IEMOPBINSIZES
{
/** Pointer to a binary operator function table. */
typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
/**
* Function table for a unary operator providing implementation based on
* operand size.
*/
typedef struct IEMOPUNARYSIZES
{
/** Pointer to a unary operator function table. */
typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
/**
* Function table for a shift operator providing implementation based on
* operand size.
*/
typedef struct IEMOPSHIFTSIZES
{
/** Pointer to a shift operator function table. */
typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
/**
* Function table for a multiplication or division operation.
*/
typedef struct IEMOPMULDIVSIZES
{
/** Pointer to a multiplication or division operation function table. */
typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
/**
* Function table for a double precision shift operator providing implementation
* based on operand size.
*/
typedef struct IEMOPSHIFTDBLSIZES
{
/** Pointer to a double precision shift function table. */
typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
/** @} */
/** @name C instruction implementations for anything slightly complicated.
* @{ */
/**
* For typedef'ing or declaring a C instruction implementation function taking
* no extra arguments.
*
* @param a_Name The name of the type.
*/
# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
/**
* For defining a C instruction implementation function taking no extra
* arguments.
*
* @param a_Name The name of the function
*/
# define IEM_CIMPL_DEF_0(a_Name) \
/**
* For calling a C instruction implementation function taking no extra
* arguments.
*
* This special call macro adds default arguments to the call and allow us to
* change these later.
*
* @param a_fn The name of the function.
*/
/**
* For typedef'ing or declaring a C instruction implementation function taking
* one extra argument.
*
* @param a_Name The name of the type.
* @param a_Type0 The argument type.
* @param a_Arg0 The argument name.
*/
/**
* For defining a C instruction implementation function taking one extra
* argument.
*
* @param a_Name The name of the function
* @param a_Type0 The argument type.
* @param a_Arg0 The argument name.
*/
/**
* For calling a C instruction implementation function taking one extra
* argument.
*
* This special call macro adds default arguments to the call and allow us to
* change these later.
*
* @param a_fn The name of the function.
* @param a0 The name of the 1st argument.
*/
/**
* For typedef'ing or declaring a C instruction implementation function taking
* two extra arguments.
*
* @param a_Name The name of the type.
* @param a_Type0 The type of the 1st argument
* @param a_Arg0 The name of the 1st argument.
* @param a_Type1 The type of the 2nd argument.
* @param a_Arg1 The name of the 2nd argument.
*/
IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
/**
* For defining a C instruction implementation function taking two extra
* arguments.
*
* @param a_Name The name of the function.
* @param a_Type0 The type of the 1st argument
* @param a_Arg0 The name of the 1st argument.
* @param a_Type1 The type of the 2nd argument.
* @param a_Arg1 The name of the 2nd argument.
*/
IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
/**
* For calling a C instruction implementation function taking two extra
* arguments.
*
* This special call macro adds default arguments to the call and allow us to
* change these later.
*
* @param a_fn The name of the function.
* @param a0 The name of the 1st argument.
* @param a1 The name of the 2nd argument.
*/
/**
* For typedef'ing or declaring a C instruction implementation function taking
* three extra arguments.
*
* @param a_Name The name of the type.
* @param a_Type0 The type of the 1st argument
* @param a_Arg0 The name of the 1st argument.
* @param a_Type1 The type of the 2nd argument.
* @param a_Arg1 The name of the 2nd argument.
* @param a_Type2 The type of the 3rd argument.
* @param a_Arg2 The name of the 3rd argument.
*/
IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
/**
* For defining a C instruction implementation function taking three extra
* arguments.
*
* @param a_Name The name of the function.
* @param a_Type0 The type of the 1st argument
* @param a_Arg0 The name of the 1st argument.
* @param a_Type1 The type of the 2nd argument.
* @param a_Arg1 The name of the 2nd argument.
* @param a_Type2 The type of the 3rd argument.
* @param a_Arg2 The name of the 3rd argument.
*/
IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
/**
* For calling a C instruction implementation function taking three extra
* arguments.
*
* This special call macro adds default arguments to the call and allow us to
* change these later.
*
* @param a_fn The name of the function.
* @param a0 The name of the 1st argument.
* @param a1 The name of the 2nd argument.
* @param a2 The name of the 3rd argument.
*/
/**
* For typedef'ing or declaring a C instruction implementation function taking
* four extra arguments.
*
* @param a_Name The name of the type.
* @param a_Type0 The type of the 1st argument
* @param a_Arg0 The name of the 1st argument.
* @param a_Type1 The type of the 2nd argument.
* @param a_Arg1 The name of the 2nd argument.
* @param a_Type2 The type of the 3rd argument.
* @param a_Arg2 The name of the 3rd argument.
* @param a_Type3 The type of the 4th argument.
* @param a_Arg3 The name of the 4th argument.
*/
# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
/**
* For defining a C instruction implementation function taking four extra
* arguments.
*
* @param a_Name The name of the function.
* @param a_Type0 The type of the 1st argument
* @param a_Arg0 The name of the 1st argument.
* @param a_Type1 The type of the 2nd argument.
* @param a_Arg1 The name of the 2nd argument.
* @param a_Type2 The type of the 3rd argument.
* @param a_Arg2 The name of the 3rd argument.
* @param a_Type3 The type of the 4th argument.
* @param a_Arg3 The name of the 4th argument.
*/
# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
/**
* For calling a C instruction implementation function taking four extra
* arguments.
*
* This special call macro adds default arguments to the call and allow us to
* change these later.
*
* @param a_fn The name of the function.
* @param a0 The name of the 1st argument.
* @param a1 The name of the 2nd argument.
* @param a2 The name of the 3rd argument.
* @param a3 The name of the 4th argument.
*/
/**
* For typedef'ing or declaring a C instruction implementation function taking
* five extra arguments.
*
* @param a_Name The name of the type.
* @param a_Type0 The type of the 1st argument
* @param a_Arg0 The name of the 1st argument.
* @param a_Type1 The type of the 2nd argument.
* @param a_Arg1 The name of the 2nd argument.
* @param a_Type2 The type of the 3rd argument.
* @param a_Arg2 The name of the 3rd argument.
* @param a_Type3 The type of the 4th argument.
* @param a_Arg3 The name of the 4th argument.
* @param a_Type4 The type of the 5th argument.
* @param a_Arg4 The name of the 5th argument.
*/
# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
/**
* For defining a C instruction implementation function taking five extra
* arguments.
*
* @param a_Name The name of the function.
* @param a_Type0 The type of the 1st argument
* @param a_Arg0 The name of the 1st argument.
* @param a_Type1 The type of the 2nd argument.
* @param a_Arg1 The name of the 2nd argument.
* @param a_Type2 The type of the 3rd argument.
* @param a_Arg2 The name of the 3rd argument.
* @param a_Type3 The type of the 4th argument.
* @param a_Arg3 The name of the 4th argument.
* @param a_Type4 The type of the 5th argument.
* @param a_Arg4 The name of the 5th argument.
*/
# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
/**
* For calling a C instruction implementation function taking five extra
* arguments.
*
* This special call macro adds default arguments to the call and allow us to
* change these later.
*
* @param a_fn The name of the function.
* @param a0 The name of the 1st argument.
* @param a1 The name of the 2nd argument.
* @param a2 The name of the 3rd argument.
* @param a3 The name of the 4th argument.
* @param a4 The name of the 5th argument.
*/
# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
/** @} */
/** @} */
#endif