REM: Undid error introduced by following Intel documentation.
REM: Fixed non-64-bit ENTER emulation.
VBOX_WITH_RAW_MODE changes.
REM: Initial changes to make it work (seemingly) with MinGW-w64.
Do not try to run unreal mode code as V86 in VT-x.
REM: Fixed incorrect CR2 value for word or dword instruction fields crossing page boundraries. (Our bug, really ancient.)
REM: Try fix the broken sysexit (and partially sysenter).
recompiler: Merged in changes from 0.13.0.
rem: Synced with v0.12.5.
REM: Do not block writes to port 80h.
rem: Synced up to v0.11.1 (35bfc7324e2e6946c4113ada5db30553a1a7c40b) from git://git.savannah.nongnu.org/qemu.git.
rem: Merged in changes from the branches/stable_0_10 (r7249).
rem: synced up to svn://svn.savannah.nongnu.org/qemu/trunk@6686 (repo UUID c046a42c-6fe2-441c-8c8c-71466251a162).
rem: Re-synced to svn://svn.savannah.nongnu.org/qemu/trunk@5495 (repo UUID c046a42c-6fe2-441c-8c8c-71466251a162).
recompiler: Removing traces of attempts at making the recompiler compile with the microsoft compiler. (untested)
.remstep hacking.
*: rebrand Sun (L)GPL disclaimers
*: spelling fixes, thanks Timeless!
REM: incorporated git b16f827b from upstream: target-i386: fix SIB decoding with index = 4
REM: incorporated git c2254920 and git 2e21e749 from upstream: target-i386: fix lddqu SSE instruction
REM: incorporated git 99596385 from upstream: target-i386: Fix "call im" on x86_64 when executing 32-bit code (fixes xtracker 5076)
Backed out 61853; causes more invalid state exits
Make sure the right descriptor attributes (0xf3) are loaded in V86 mode (VT-x is picky)
REM: fixed interrupt latency issue
recompiler: Fixed mov to/from CRx/DRx decoding to match reality (mod bits must be ignored).
Renamed src/recompiler_new to src/recompiler.
src/recompiler: renaming in progress.
REM: put VME bit update in place
RDTSCP support added. Enabled only for AMD-V guests.
And yet more %V* -> %R* changes...
Fixed 64 bits displacements. (see #3096)
All: license header changes for 2.0 (OSE headers, add Sun GPL/LGPL disclaimer)
Synced 64 bits lahf/sahf from QEmu.
removed #if 1, the code seems working fine.
load the modrm value before parsing it (CMPXCHG8B/16B). Updated s->pc comment.
exception 6 is a trap => don't change the PC
lock mov wherever, whereever is an invalid lock sequence, so raise #UD. Wrote the proper checks for invalid lock sequence, but didn't dare enable this yet.
2 fixes from qemu: fix cmpxchg8b detection and fix DR6 single step exception status bit
Fixed nasty bug in ARPL emulation (uninitialized variable).
Experiment with call recording for CSAM
Incorporated aam division by zero security fix.
Removed the old recompiler code.
Update eip for each instruction. (makes it easier to generate exceptions) Re-enabled null selector check during memory accesses.
Support VME in guests. (v86 extensions)
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