exec-all.h revision 3d40f685fa5cdd9cb665ae3cbf5f76113dafcb99
/*
* internal execution defines for qemu
*
* Copyright (c) 2003 Fabrice Bellard
*
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
/*
* Oracle LGPL Disclaimer: For the avoidance of doubt, except that if any license choice
* other than GPL or LGPL is available it will apply instead, Oracle elects to use only
* the Lesser General Public License version 2.1 (LGPLv2) at this time for any software where
* a choice of LGPL license versions is made available with the language indicating
* that LGPLv2 or any later version may be used, or where a choice of which version
* of the LGPL is applied is otherwise unspecified.
*/
#ifndef _EXEC_ALL_H_
#define _EXEC_ALL_H_
#include "qemu-common.h"
#ifdef VBOX
# ifndef LOG_GROUP
# define LOG_GROUP LOG_GROUP_REM
# endif
# include "REMInternal.h"
#endif /* VBOX */
/* allow to see translation results - the slowdown should be negligible, so we leave it */
#ifndef VBOX
#define DEBUG_DISAS
#endif /* !VBOX */
/* Page tracking code uses ram addresses in system mode, and virtual
addresses in userspace mode. Define tb_page_addr_t to be an appropriate
type. */
#if defined(CONFIG_USER_ONLY)
typedef abi_ulong tb_page_addr_t;
#else
typedef ram_addr_t tb_page_addr_t;
#endif
/* is_jmp field values */
#define DISAS_NEXT 0 /* next instruction can be analyzed */
typedef struct TranslationBlock TranslationBlock;
/* XXX: make safe guess about sizes */
#define MAX_OP_PER_INSTR 96
#if HOST_LONG_BITS == 32
#define MAX_OPC_PARAM_PER_ARG 2
#else
#define MAX_OPC_PARAM_PER_ARG 1
#endif
#define MAX_OPC_PARAM_IARGS 4
#define MAX_OPC_PARAM_OARGS 1
/* A Call op needs up to 4 + 2N parameters on 32-bit archs,
* and up to 4 + N parameters on 64-bit archs
* (N = number of input arguments + output arguments). */
#define OPC_BUF_SIZE 640
/* Maximum size a TCG op can expand to. This is complicated because a
single op may require several host instructions and register reloads.
For now take a wild guess at 192 bytes, which should allow at least
a couple of fixup instructions per argument. */
#define TCG_MAX_OP_SIZE 192
#include "qemu-log.h"
void cpu_gen_init(void);
int *gen_code_size_ptr);
void *puc);
int cflags);
void QEMU_NORETURN cpu_loop_exit(void);
int is_cpu_write_access);
#if !defined(CONFIG_USER_ONLY)
#endif
#define CODE_GEN_PHYS_HASH_BITS 15
/* estimated block size for TB allocation */
/* XXX: use a per code average code fragment size and modulate it
according to the host CPU */
#if defined(CONFIG_SOFTMMU)
#define CODE_GEN_AVG_BLOCK_SIZE 128
#else
#define CODE_GEN_AVG_BLOCK_SIZE 64
#endif
#define USE_DIRECT_JUMP
#endif
#ifdef VBOX /* bird: not safe in next step because of threading & cpu_interrupt. */
#endif /* VBOX */
struct TranslationBlock {
size <= TARGET_PAGE_SIZE) */
#define CF_COUNT_MASK 0x7fff
#ifdef VBOX
#endif
/* next matching tb for physical address. */
struct TranslationBlock *phys_hash_next;
/* first and second physical page containing code. The lower bit
of the pointer tells the index in page_next[] */
/* the following data are used to directly call another TB from
the code of this one. */
#ifdef USE_DIRECT_JUMP
#else
#endif
/* list of TBs jumping to this one. This is a circular list using
the two least significant bits of the pointers to tell what is
the next pointer: 0 = jmp_next[0], 1 = jmp_next[1], 2 =
jmp_first */
struct TranslationBlock *jmp_first;
};
{
}
{
| (tmp & TB_JMP_ADDR_MASK));
}
{
}
#if defined(USE_DIRECT_JUMP)
#if defined(_ARCH_PPC)
{
/* patch the branch destination */
/* no need to flush icache explicitly */
}
{
#else
#endif
/* we could use a ldr pc, [pc, #-4] kind of branch and avoid the flush */
#else
/* flush icache */
_flg = 0;
#endif
}
#endif
{
}
#else
/* set the jump target */
{
}
#endif
{
/* NOTE: this test is only needed for thread safety */
/* patch the native jump address */
/* add in TB jmp circular list */
}
}
#include "qemu-lock.h"
extern spinlock_t tb_lock;
extern int tb_invalidated_flag;
#if !defined(CONFIG_USER_ONLY)
extern void *io_mem_opaque[IO_MEM_NB_ENTRIES];
void *retaddr);
#include "softmmu_defs.h"
#define env cpu_single_env
#define DATA_SIZE 1
#include "softmmu_header.h"
#define DATA_SIZE 2
#include "softmmu_header.h"
#define DATA_SIZE 4
#include "softmmu_header.h"
#define DATA_SIZE 8
#include "softmmu_header.h"
#endif
#if defined(CONFIG_USER_ONLY)
{
return addr;
}
#else
# ifdef VBOX
target_ulong remR3PhysGetPhysicalAddressCode(CPUState *env, target_ulong addr, CPUTLBEntry *pTLBEntry, target_phys_addr_t ioTLBEntry);
# endif
/* NOTE: this function can trigger an exception */
/* NOTE2: the returned address is not exactly the physical address: it
is the offset relative to phys_ram_base */
{
# ifndef VBOX
void *p;
# endif
(addr & TARGET_PAGE_MASK))) {
}
# ifdef VBOX
/* deal with non-MMIO access handlers. */
#else
#endif
}
# if defined(VBOX) && defined(REM_PHYS_ADDR_IN_TLB)
# else
return qemu_ram_addr_from_host(p);
# endif
}
#endif
#ifndef VBOX
/* vl.c */
extern int singlestep;
/* cpu-exec.c */
extern volatile sig_atomic_t exit_request;
#endif /*!VBOX*/
#endif