TODO revision cec22f4b94382f5ebee9d2f6b6df672689681e07
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn ForteCorrectness issues:
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- some eflags manipulation incorrectly reset the bit 0x2.
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- SVM: test, cpu save/restore, SMM save/restore.
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- x86_64: lcall/ljmp intel/amd differences ?
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- better code fetch (different exception handling + CS.limit support)
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- user/kernel PUSHL/POPL in helper.c
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- add missing cpuid tests
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- return UD exception if LOCK prefix incorrectly used
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- test ldt limit < 7 ?
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret)
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- full support of segment limit/rights
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- full x87 exception support
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- improve x87 bit exactness (use bochs code ?)
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- DRx register support
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- CR0.AC emulation
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- SSE alignment checks
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- fix SSE min/max with nans
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn ForteOptimizations/Features:
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte
3f1da666124ac25caadfacd3f2a361d4a41268a8wl- add SVM nested paging support
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- add VMX support
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- add AVX support
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- add SSE5 support
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- fxsave/fxrstor AMD extensions
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- improve monitor/mwait support
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- faster EFLAGS update: consider SZAP, C, O can be updated separately
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte with a bit field in CC_OP and more state variables.
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- evaluate x87 stack pointer statically
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte- find a way to avoid translating several time the same TB if CR0.TS
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte is set or not.
fcf3ce441efd61da9bb2884968af01cb7c1452ccJohn Forte