CPUM,IEM: Expose GuestFeatures and HostFeatures (exploded CPUID), making IEM use it. Early XSAVE/AVX guest support preps.
CPUM: Use XSAVE/XRSTOR for host state.
VMM: host+guest xsave/xrstor state handling - not enabled.
Remove CPUFeatures and CPUFeaturesExt from CPUM, use HostFeatures instead. Extended HostFeatures.
build fix
VMM,REM: Allocate the FPU/SSE/AVX/FUTURE state stuff. We need to use pointers to substates anyway and this will make CPUMCPU much smaller.
backed out r99268 as it causes serious regressions on Windows hosts
Moved the XState to the end of the CPUMCTX structure, reducing the size of the three VMM modules by ~8KB in a win.amd6/debug build.
CPUMCTX,CPUMHOST: Replaced the fpu (X86FXSAVE) member with an XState (X86XSAVEAREA) member.
Moving CPUMCPU about...
PATM,CPUM: Redid the CPUID stuff by calling a patch helper function implemented by CPUM. This eliminates needing to expose CPUM guts to in patches that gets saved. Also reimplemented the lookup as a binary search (for the leaf, not sub-leaf).
VMM,REM: CPUID revamp - almost there now.
CPUM: Working on refactoring the guest CPUID handling.
VMM: Fix restoring 32-bit guest FPU state on 64-bit capable VMs.
VMM: Retire aGuestCpuIdHyper legacy array.
CPUM,VMM: More work related to bus, cpu and tsc frequency info. Should cover older core and p6 as well as p4 now.
MSR rewrite: initial hacking - half disabled.
VMM: FPU cleanup.
VMM: Adding a debugging aid for 64-on-32 that tries to catch exceptions on the otherwordly context. Set VBOX_WITH_64ON32_IDT in LocalConfig.kmk to enable.
CPUM: build fix
VMM: X2APIC + NMI. Only tested on AMD64.
VMM: Debug register handling redo. (only partly tested on AMD-V so far.)
header (C) fixes
VMM: APIC refactor. Moved APIC base MSR to the VCPU (where it belongs) for lockless accesses.
TRPM: Save state directly to the CPUMCPU context member instead of putting on the stack. this avoid copying the state around before returning to host context to service an IRQ, or before using IEM.
CPUM: Combined the visible and hidden selector register data into one structure. Preparing for lazily resolving+caching of hidden registers in raw-mode.
CPUMCTX++: Rearranging the CPUMCTX structure in preparation of some hidden selector register improvments.
Optionally present basic hypervisor CPUID leaves.
MSRs and MTRRs, CPUM saved state changed. (linux 2.4.31 seems to ignore the capabilites when it comes to fixed MTRRs.)
VMM source reorg.