vm.h revision d04c23fbd5db5617cabe39a68b7c5079cace9c73
20593760b116c90f3e439552763eef632a3bbb17vboxsync * VM - The Virtual Machine, data.
20593760b116c90f3e439552763eef632a3bbb17vboxsync * Copyright (C) 2006-2014 Oracle Corporation
20593760b116c90f3e439552763eef632a3bbb17vboxsync * This file is part of VirtualBox Open Source Edition (OSE), as
20593760b116c90f3e439552763eef632a3bbb17vboxsync * available from http://www.virtualbox.org. This file is free software;
20593760b116c90f3e439552763eef632a3bbb17vboxsync * you can redistribute it and/or modify it under the terms of the GNU
20593760b116c90f3e439552763eef632a3bbb17vboxsync * General Public License (GPL) as published by the Free Software
20593760b116c90f3e439552763eef632a3bbb17vboxsync * Foundation, in version 2 as it comes in the "COPYING" file of the
20593760b116c90f3e439552763eef632a3bbb17vboxsync * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
20593760b116c90f3e439552763eef632a3bbb17vboxsync * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
20593760b116c90f3e439552763eef632a3bbb17vboxsync * The contents of this file may alternatively be used under the terms
20593760b116c90f3e439552763eef632a3bbb17vboxsync * of the Common Development and Distribution License Version 1.0
20593760b116c90f3e439552763eef632a3bbb17vboxsync * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20593760b116c90f3e439552763eef632a3bbb17vboxsync * VirtualBox OSE distribution, in which case the provisions of the
20593760b116c90f3e439552763eef632a3bbb17vboxsync * CDDL are applicable instead of those of the GPL.
20593760b116c90f3e439552763eef632a3bbb17vboxsync * You may elect to license modified versions of this file under the
20593760b116c90f3e439552763eef632a3bbb17vboxsync * terms and conditions of either the GPL or the CDDL or both.
20593760b116c90f3e439552763eef632a3bbb17vboxsync/** @defgroup grp_vm The Virtual Machine
20593760b116c90f3e439552763eef632a3bbb17vboxsync * The state of a Virtual CPU.
20593760b116c90f3e439552763eef632a3bbb17vboxsync * The basic state indicated here is whether the CPU has been started or not. In
20593760b116c90f3e439552763eef632a3bbb17vboxsync * addition, there are sub-states when started for assisting scheduling (GVMM
20593760b116c90f3e439552763eef632a3bbb17vboxsync * The transition out of the STOPPED state is done by a vmR3PowerOn.
20593760b116c90f3e439552763eef632a3bbb17vboxsync * The transition back to the STOPPED state is done by vmR3PowerOff.
20593760b116c90f3e439552763eef632a3bbb17vboxsync * (Alternatively we could let vmR3PowerOn start CPU 0 only and let the SPIP
20593760b116c90f3e439552763eef632a3bbb17vboxsync * handling switch on the other CPUs. Then vmR3Reset would stop all but CPU 0.)
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** The customary invalid zero. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Virtual CPU has not yet been started. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** CPU started. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** CPU started in HM context. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Executing guest code and can be poked (RC or STI bits of HM). */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Executing guest code in the recompiler. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Halted. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** The end of valid virtual CPU states. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Ensure 32-bit type. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync * The cross context virtual CPU structure.
20593760b116c90f3e439552763eef632a3bbb17vboxsync * Run 'kmk run-struct-tests' (from src/VBox/VMM if you like) after updating!
20593760b116c90f3e439552763eef632a3bbb17vboxsynctypedef struct VMCPU
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Per CPU forced action.
20593760b116c90f3e439552763eef632a3bbb17vboxsync * See the VMCPU_FF_* \#defines. Updated atomically. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** The CPU state. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Pointer to the ring-3 UVMCPU structure. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Ring-3 Host Context VM Pointer. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Ring-0 Host Context VM Pointer. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Raw-mode Context VM Pointer. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** The CPU ID.
20593760b116c90f3e439552763eef632a3bbb17vboxsync * This is the index into the VM::aCpu array. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** The native thread handle. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** The native R0 thread handle. (different from the R3 handle!) */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Which host CPU ID is this EMT running on.
20593760b116c90f3e439552763eef632a3bbb17vboxsync * Only valid when in RC or HMR0 with scheduling disabled. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
20593760b116c90f3e439552763eef632a3bbb17vboxsync * @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Trace groups enable flags. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Align the structures below bit on a 64-byte boundary and make sure it starts
20593760b116c90f3e439552763eef632a3bbb17vboxsync * at the same offset in both 64-bit and 32-bit builds.
20593760b116c90f3e439552763eef632a3bbb17vboxsync * @remarks The alignments of the members that are larger than 48 bytes should be
20593760b116c90f3e439552763eef632a3bbb17vboxsync * 64-byte for cache line reasons. structs containing small amounts of
20593760b116c90f3e439552763eef632a3bbb17vboxsync * data could be lumped together at the end with a < 64 byte padding
20593760b116c90f3e439552763eef632a3bbb17vboxsync * following it (to grow into and align the struct size).
20593760b116c90f3e439552763eef632a3bbb17vboxsync uint8_t abAlignment1[HC_ARCH_BITS == 64 ? 56 : 12+64];
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** State data for use by ad hoc profiling. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** Profiling samples for use by ad hoc profiling. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync STAMPROFILEADV aStatAdHoc[8]; /* size: 40*8 = 320 */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** HM part. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** EM part. */
20593760b116c90f3e439552763eef632a3bbb17vboxsync /** IEM part. */
#ifdef ___IEMInternal_h
struct IEMCPU s;
} iem;
#ifdef ___TRPMInternal_h
struct TRPMCPU s;
} trpm;
#ifdef ___TMInternal_h
struct TMCPU s;
} tm;
#ifdef ___VMMInternal_h
struct VMMCPU s;
} vmm;
#ifdef ___PDMInternal_h
struct PDMCPU s;
} pdm;
#ifdef ___IOMInternal_h
struct IOMCPU s;
} iom;
#ifdef ___DBGFInternal_h
struct DBGFCPU s;
} dbgf;
#ifdef ___GIMInternal_h
struct GIMCPU s;
} gim;
#ifdef ___CPUMInternal_h
struct CPUMCPU s;
} cpum;
#ifdef ___PGMInternal_h
struct PGMCPU s;
} pgm;
} VMCPU;
#ifndef VBOX_FOR_DTRACE_LIB
#ifdef VBOX_STRICT
#ifdef VBOX_WITH_RAW_MODE
#ifdef VBOX_WITH_RAW_MODE
#ifdef VBOX_WITH_RAW_MODE
#define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_REQUEST | VM_FF_EMT_RENDEZVOUS)
#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_REQUEST \
#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT | VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_REM_HANDLER_NOTIFY \
#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
#define VM_FF_HP_R0_PRE_HM_MASK (VM_FF_HM_TO_R3_MASK | VM_FF_REQUEST | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_PDM_DMA)
#define VM_FF_HP_R0_PRE_HM_STEP_MASK (VM_FF_HP_R0_PRE_HM_MASK & ~( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PDM_QUEUES \
| VM_FF_PDM_DMA) )
#define VMCPU_FF_HP_R0_PRE_HM_STEP_MASK (VMCPU_FF_HP_R0_PRE_HM_MASK & ~( VMCPU_FF_TO_R3 | VMCPU_FF_TIMER \
#define VM_FF_ALL_MASK (~0U)
#define VMCPU_FF_ALL_MASK (~0U)
RTLogPrintf("VM_FF_SET : %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
RTLogPrintf("VM_FF_CLEAR: %08x %s - %s(%d) %s\n", (pVM)->fGlobalForcedActions, #fFlag, __FILE__, __LINE__, __FUNCTION__); \
#define VM_FF_TEST_AND_CLEAR(pVM, iBit) (ASMAtomicBitTestAndClear(&(pVM)->fGlobalForcedActions, iBit##_BIT))
#define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
#define VMCPU_FF_IS_PENDING_EXCEPT(pVCpu, fFlags, fExcpt) ( ((pVCpu)->fLocalForcedActions & (fFlags)) && !((pVCpu)->fLocalForcedActions & (fExcpt)) )
#ifdef IN_RC
#ifdef IN_RC
#ifdef IN_RC
("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)))
#ifdef IN_RC
#ifdef IN_RC
("Not emulation thread! Thread=%RTnthrd ThreadEMT=%RTnthrd\n", RTThreadNativeSelf(), VMR3GetVMCPUNativeThread(pVM)), \
(rc))
#ifdef IN_RC
(rc))
(rc))
(rc))
("pVCpu=%p pVM=%p state %s\n", (pVCpu), RT_VALID_ALIGNED_PTR(pVCpu, 64) ? (pVCpu)->CTX_SUFF(pVM) : NULL, \
(rc))
typedef struct VM
bool fRecompileUser;
bool fRecompileSupervisor;
bool fRawRing1Enabled;
bool fPATMEnabled;
bool fCSAMEnabled;
bool fHMEnabled;
bool fHMEnabledFixed;
bool fHMNeedRawModeCtx;
bool fFaultTolerantMaster;
bool fUseLargePages;
#ifdef ___CPUMInternal_h
struct CPUM s;
} cpum;
#ifdef ___VMMInternal_h
struct VMM s;
} vmm;
#ifdef ___PGMInternal_h
struct PGM s;
} pgm;
#ifdef ___HMInternal_h
struct HM s;
} hm;
#ifdef ___TRPMInternal_h
struct TRPM s;
} trpm;
#ifdef ___SELMInternal_h
struct SELM s;
} selm;
#ifdef ___MMInternal_h
struct MM s;
} mm;
#ifdef ___PDMInternal_h
struct PDM s;
} pdm;
#ifdef ___IOMInternal_h
struct IOM s;
} iom;
#ifdef ___PATMInternal_h
struct PATM s;
} patm;
#ifdef ___CSAMInternal_h
struct CSAM s;
} csam;
#ifdef ___EMInternal_h
struct EM s;
} em;
#ifdef ___TMInternal_h
struct TM s;
} tm;
#ifdef ___DBGFInternal_h
struct DBGF s;
} dbgf;
#ifdef ___SSMInternal_h
struct SSM s;
} ssm;
#ifdef ___FTMInternal_h
struct FTM s;
} ftm;
#ifdef ___REMInternal_h
struct REM s;
} rem;
#ifdef ___GIMInternal_h
struct GIM s;
} gim;
#ifdef ___VMInternal_h
struct VMINT s;
} vm;
#ifdef ___CFGMInternal_h
struct CFGM s;
} cfgm;
} VM;
#ifdef IN_RC