Searched defs:reg (Results 51 - 75 of 75) sorted by relevance

123

/openjdk7/hotspot/src/cpu/x86/vm/
H A Dc1_LIRGenerator_x86.cpp55 LIR_Opr reg = _gen->rlock_byte(T_BYTE); local
56 __ move(res, reg);
58 _result = reg;
106 LIR_Opr reg = new_register(T_INT); local
107 set_vreg_flag(reg, LIRGenerator::byte_reg);
108 return reg;
226 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { argument
227 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
231 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { argument
232 __ cmp_reg_mem(condition, reg, ne
386 LIR_Opr reg = rlock(x); local
433 LIR_Opr reg = rlock(x); local
519 LIR_Opr reg = FrameMap::long0_opr; local
672 LIR_Opr reg = rlock_result(x); local
691 LIR_Opr reg = rlock_result(x); local
708 LIR_Opr reg = rlock_result(x); local
1019 LIR_Opr reg = result_register_for(x->type()); local
1038 LIR_Opr reg = result_register_for(x->type()); local
1068 const LIR_Opr reg = result_register_for(x->type()); local
1121 LIR_Opr reg = result_register_for(x->type()); local
1134 reg, args, info); local
1167 LIR_Opr reg = rlock_result(x); local
1183 LIR_Opr reg = rlock_result(x); local
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H A Dc1_Runtime1_x86.cpp205 void load_argument(int offset_in_words, Register reg);
221 void StubFrame::load_argument(int offset_in_words, Register reg) { argument
228 __ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord));
H A Dinterp_masm_x86_32.cpp55 void InterpreterMacroAssembler::get_method(Register reg) { argument
56 movptr(reg, Address(rbp, -(sizeof(BytecodeInterpreter) + 2 * wordSize)));
57 movptr(reg, Address(reg, byte_offset_of(BytecodeInterpreter, _method)));
208 void InterpreterMacroAssembler::get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset) { argument
210 movl(reg, Address(rsi, bcp_offset));
211 bswapl(reg);
212 shrl(reg, 16);
216 void InterpreterMacroAssembler::get_cache_index_at_bcp(Register reg, int bcp_offset, size_t index_size) { argument
219 load_unsigned_short(reg, Addres
916 increment_mdp_data_at(Register mdp_in, Register reg, int constant, bool decrement) argument
961 update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp) argument
1331 verify_oop(Register reg, TosState state) argument
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H A Dinterp_masm_x86_64.cpp56 void InterpreterMacroAssembler::get_method(Register reg) { argument
57 movptr(reg, Address(rbp, -((int)sizeof(BytecodeInterpreter) + 2 * wordSize)));
58 movptr(reg, Address(reg, byte_offset_of(BytecodeInterpreter, _method)));
203 Register reg,
206 movl(reg, Address(r13, bcp_offset));
207 bswapl(reg);
208 shrl(reg, 16);
931 Register reg,
934 Address data(mdp_in, reg, Addres
202 get_unsigned_2_byte_index_at_bcp( Register reg, int bcp_offset) argument
930 increment_mdp_data_at(Register mdp_in, Register reg, int constant, bool decrement) argument
976 update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp) argument
1397 verify_oop(Register reg, TosState state) argument
[all...]
H A Dc1_LIRAssembler_x86.cpp362 void LIR_Assembler::jobject2reg_with_patching(Register reg, CodeEmitInfo* info) { argument
365 __ movoop(reg, o);
366 patching_epilog(patch, lir_patch_normal, reg, info);
2465 Register reg = left->as_register(); local
2469 case lir_logic_and: __ andl (reg, val); break;
2470 case lir_logic_or: __ orl (reg, val); break;
2471 case lir_logic_xor: __ xorl (reg, val); break;
2478 case lir_logic_and: __ andl (reg, raddr); break;
2479 case lir_logic_or: __ orl (reg, raddr); break;
2480 case lir_logic_xor: __ xorl (reg, radd
3649 Register reg; local
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H A DsharedRuntime_x86_32.cpp852 // st_off is LSW (i.e. reg.first())
1033 // stack to reg
1037 // reg to stack
1102 // A float arg may have to do float reg int reg conversion
1115 // reg to stack
1159 // reg to stack
1261 const Register reg = in_regs[i].first()->as_Register(); local
1265 __ movptr(Address(rsp, offset), reg); local
1267 __ movptr(reg, Addres
1276 __ movl(Address(rsp, offset), reg); local
1354 const Register reg = in_regs[i].first()->as_Register(); local
1378 unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) argument
1651 const Register reg = in_regs[i].first()->as_Register(); local
[all...]
H A DsharedRuntime_x86_64.cpp792 // st_off is LSW (i.e. reg.first())
1019 // stack to reg
1023 // reg to stack
1043 // stack to reg
1047 // reg to stack
1123 // If arg is on the stack then place it otherwise it is already in correct reg.
1129 // A float arg may have to do float reg int reg conversion
1142 // stack to reg
1147 // reg t
1314 const Register reg = in_regs[i].first()->as_Register(); local
1322 __ movl(Address(rsp, offset), reg); local
1406 const Register reg = in_regs[i].first()->as_Register(); local
1430 unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) argument
1884 const Register reg = in_regs[i].first()->as_Register(); local
[all...]
H A DtemplateTable_x86_32.cpp500 void TemplateTable::locals_index(Register reg, int offset) { argument
501 __ load_unsigned_byte(reg, at_bcp(offset));
502 __ negptr(reg);
590 void TemplateTable::locals_index_wide(Register reg) { argument
591 __ movl(reg, at_bcp(2));
592 __ bswapl(reg);
593 __ shrl(reg, 16);
594 __ negptr(reg);
3109 // outputs: method, scan temp. reg
3322 __ xorl(rcx, rcx); // use zero reg t
[all...]
H A DtemplateTable_x86_64.cpp517 void TemplateTable::locals_index(Register reg, int offset) { argument
518 __ load_unsigned_byte(reg, at_bcp(offset));
519 __ negptr(reg);
602 void TemplateTable::locals_index_wide(Register reg) { argument
603 __ movl(reg, at_bcp(2));
604 __ bswapl(reg);
605 __ shrl(reg, 16);
606 __ negptr(reg);
1574 // XXX get rid of pop here, use ... reg, mem32
1578 // XXX get rid of pop here, use ... reg, mem6
[all...]
H A DstubGenerator_x86_64.cpp222 Address xmm_save(int reg) { argument
223 assert(reg >= xmm_save_first && reg <= xmm_save_last, "XMM register number out of range");
224 return Address(rbp, (xmm_save_base - (reg - xmm_save_first) * 2) * wordSize);
H A Dassembler_x86.cpp292 void Assembler::emit_operand(Register reg, Register base, Register index, argument
300 int regenc = encode(reg) << 3;
311 // [00 reg 100][ss index base]
317 // [01 reg 100][ss index base] imm8
324 // [10 reg 100][ss index base] disp32
334 // [00 reg 100][00 100 100]
339 // [01 reg 100][00 100 100] disp8
345 // [10 reg 100][00 100 100] disp32
356 // [00 reg base]
360 // [01 reg bas
410 emit_operand(XMMRegister reg, Register base, Register index, Address::ScaleFactor scale, int disp, RelocationHolder const& rspec) argument
860 emit_operand32(Register reg, Address adr) argument
867 emit_operand(Register reg, Address adr, int rip_relative_correction) argument
874 emit_operand(XMMRegister reg, Address adr) argument
880 emit_operand(MMXRegister reg, Address adr) argument
886 emit_operand(Address adr, MMXRegister reg) argument
1121 bswapl(Register reg) argument
1243 cmpxchgl(Register reg, Address adr) argument
4540 prefix(Register reg) argument
4577 prefix(Address adr, Register reg, bool byteinst) argument
4641 prefix(Address adr, XMMRegister reg) argument
4790 bswapq(Register reg) argument
4855 cmpxchgq(Register reg, Address adr) argument
6336 corrected_idivq(Register reg) argument
6373 decrementq(Register reg, int value) argument
6389 incrementq(Register reg, int value) argument
7302 locked_cmpxchgptr(Register reg, AddressLiteral adr) argument
7315 cmpxchgptr(Register reg, Address adr) argument
7346 corrected_idivl(Register reg) argument
7384 decrementl(Register reg, int value) argument
7400 division_with_shift(Register reg, int shift_value) argument
7879 incrementl(Register reg, int value) argument
8208 null_check(Register reg, int offset) argument
8293 round_to(Register reg, int modulus) argument
8363 sign_extend_byte(Register reg) argument
8372 sign_extend_short(Register reg) argument
9650 verify_oop(Register reg, const char* s) argument
[all...]
/openjdk7/hotspot/src/share/vm/c1/
H A Dc1_LIR.cpp1173 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { argument
1174 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1326 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { argument
1330 reg,
H A Dc1_LinearScan.hpp436 int register_blocked(int reg) { assert(reg >= 0 && reg < LinearScan::nof_regs, "out of bounds"); return _register_blocked[reg]; } argument
437 void set_register_blocked(int reg, int direction) { assert(reg >= 0 && reg < LinearScan::nof_regs, "out of bounds"); assert(direction == 1 || direction == -1, "out of bounds"); _register_blocked[reg] += direction; } argument
503 // all times assigned_reg contains the reg. number of the physical
509 // phys. reg
570 assign_reg(int reg) argument
571 assign_reg(int reg,int regHi) argument
609 set_cached_vm_reg(VMReg reg) argument
[all...]
H A Dc1_LIRGenerator.cpp221 LIR_Opr reg = _gen->new_register(value()->type()); local
222 __ move(result(), reg); local
224 _result = reg;
226 set_result(reg);
245 void LIRItem::load_item_force(LIR_Opr reg) { argument
247 if (r != reg) {
249 if (r->type() != reg->type()) {
251 r = _gen->force_to_spill(r, reg->type());
254 __ move(r, reg);
255 _result = reg;
1071 LIR_Opr reg = rlock(x); local
1079 LIR_Opr reg; local
1148 LIR_Opr reg = rlock_result(x); local
1164 LIR_Opr reg = rlock_result(x); local
1204 LIR_Opr reg = result_register_for(x->type(), /*callee=*/true); local
1297 LIR_Opr reg = rlock_result(x); local
1801 LIR_Opr reg = rlock_result(x, field_type); local
1865 LIR_Opr reg = rlock_result(x); local
2037 LIR_Opr reg = rlock_result(x, x->basic_type()); local
2840 LIR_Opr reg = rlock_result(x); local
2873 LIR_Opr reg = rlock_result(x); local
2876 __ cmove(lir_cond(x->cond()), t_val.result(), f_val.result(), reg, as_BasicType(x->x()->type())); local
2881 LIR_Opr reg = result_register_for(x->type()); local
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H A Dc1_LinearScan.cpp560 int reg = opr->vreg_number(); local
561 if (!live_kill.at(reg)) {
562 live_gen.set_bit(reg);
563 TRACE_LINEAR_SCAN(4, tty->print_cr(" Setting live_gen for value %c%d, LIR op_id %d, register number %d", value->type()->tchar(), value->id(), op->id(), reg));
616 int k, n, reg; local
624 reg = opr->vreg_number();
625 if (!live_kill.at(reg)) {
626 live_gen.set_bit(reg);
627 TRACE_LINEAR_SCAN(4, tty->print_cr(" Setting live_gen for register %d at instruction %d", reg, op->id()));
630 local_interval_in_loop.set_bit(reg, bloc
902 int reg = reg_num(opr); local
922 int reg = reg_num(opr); local
942 int reg = reg_num(opr); local
1828 int reg = interval->assigned_reg(); local
2020 VMReg reg = interval->cached_vm_reg(); local
3554 state_put(IntervalList* input_state, int reg, Interval* interval) argument
3566 check_state(IntervalList* input_state, int reg, Interval* interval) argument
3767 int reg = it->assigned_reg(); local
3781 int reg = it->assigned_reg(); local
3802 int reg = to->assigned_reg(); local
[all...]
H A Dc1_LIR.hpp562 static LIR_Opr single_cpu(int reg) { argument
563 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
568 static LIR_Opr single_cpu_oop(int reg) { argument
569 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
574 static LIR_Opr single_cpu_address(int reg) { argument
575 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
589 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | argument
595 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDes argument
606 double_fpu(int reg) argument
612 single_xmm(int reg) argument
617 double_xmm(int reg) argument
625 double_fpu(int reg) argument
630 single_softfp(int reg) argument
1500 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) argument
1977 roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) argument
2000 oop2reg(jobject o, LIR_Opr reg) argument
2032 pop(LIR_Opr reg) argument
[all...]
/openjdk7/hotspot/src/share/vm/runtime/
H A Dframe.cpp1022 VMReg reg = _regs[_offset].first(); local
1023 oop *loc = _fr.oopmapreg_to_location(reg, _reg_map);
1070 VMReg reg = SharedRuntime::name_for_receiver(); local
1071 oop r = *caller.oopmapreg_to_location(reg, reg_map);
1077 oop* frame::oopmapreg_to_location(VMReg reg, const RegisterMap* reg_map) const { argument
1078 if(reg->is_reg()) {
1080 return (oop *)reg_map->location(reg);
1082 int sp_offset_in_bytes = reg->reg2stack() * VMRegImpl::stack_slot_size;
/openjdk7/langtools/src/share/classes/com/sun/tools/javac/jvm/
H A DCode.java1827 final char reg; field in class:Code.LocalVar
1832 this.reg = (char)v.adr;
1838 return "" + sym + " in register " + ((int)reg) + " starts at pc=" + ((int)start_pc) + " length=" + ((int)length);
1949 int reg = nextreg;
1951 nextreg = reg + w;
1953 return reg;
1961 int reg = v.adr = newLocal(v.erasure(types));
1963 return reg;
/openjdk7/hotspot/src/share/vm/opto/
H A Doutput.cpp149 OptoReg::Name reg = _regalloc->get_reg_first(n); local
150 tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
938 OptoReg::Name box_reg = BoxLockNode::reg(box_node);
1089 // doesn't work if the fp reg to spill contains a single-precision denorm.
H A DgraphKit.cpp128 static bool is_hidden_merge(Node* reg) { argument
129 if (reg == NULL) return false;
130 if (reg->is_Phi()) {
131 reg = reg->in(0);
132 if (reg == NULL) return false;
134 return reg->is_Region() && reg->in(0) != NULL && reg->in(0)->is_Root();
/openjdk7/hotspot/src/cpu/sparc/vm/
H A Dc1_LIRAssembler_sparc.cpp351 Register reg = mon_addr.base(); local
355 __ add(reg, offset, lock_reg);
359 __ add(reg, lock_reg, lock_reg);
500 void LIR_Assembler::jobject2reg(jobject o, Register reg) { argument
502 __ set(NULL_WORD, reg);
506 __ set(NULL_WORD, reg, rspec); // Will be set when the nmethod is created
511 void LIR_Assembler::jobject2reg_with_patching(Register reg, CodeEmitInfo *info) { argument
521 __ patchable_set(addrlit, reg);
523 patching_epilog(patch, lir_patch_normal, reg, info);
848 FloatRegister reg local
967 FloatRegister reg = to_reg->as_double_reg(); local
1286 Register reg = addr->base()->as_register(); local
2905 Register reg = mon_addr.base(); local
[all...]
H A Dinterp_masm_sparc.cpp1194 // set mark reg to be (markOop of object | UNLOCK_VALUE)
1445 // Increment the value at some non-fixed (reg + constant) offset from
1448 void InterpreterMacroAssembler::increment_mdp_data_at(Register reg, argument
1453 // Add the constant to reg to get the offset.
1454 add(ImethodDataPtr, reg, scratch2);
1501 // offset (reg + offset_of_disp).
1503 void InterpreterMacroAssembler::update_mdp_by_offset(Register reg, argument
1507 add(reg, offset_of_disp, scratch);
1992 // untested("reg area corruption");
2214 void InterpreterMacroAssembler::interp_verify_oop(Register reg, TosStat argument
2236 verify_oop_or_return_address(Register reg, Register Rtmp) argument
[all...]
H A DsharedRuntime_sparc.cpp1283 // stack to reg
1287 // reg to stack
1305 // stack to reg
1309 // reg to stack
1324 // stack to reg
1328 // reg to stack
1395 // A float arg may have to do float reg int reg conversion
1405 // stack to reg
1413 // reg t
1672 const Register reg = in_regs[i].first()->as_Register(); local
1760 const Register reg = in_regs[i].first()->as_Register(); local
1777 unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) argument
2110 const Register reg = in_regs[i].first()->as_Register(); local
[all...]
H A Dassembler_sparc.cpp577 void MacroAssembler::null_check(Register reg, int offset) { argument
579 // provoke OS NULL exception if reg = NULL by
580 // accessing M[reg] w/o changing any registers
581 ld_ptr(reg, 0, G0);
584 // nothing to do, (later) access of M[reg + offset]
585 // will provoke OS NULL exception if reg = NULL
1276 assert(tmp != obj, "need separate temp reg");
1749 void MacroAssembler::_verify_oop(Register reg, const char* msg, const char * file, int line) { argument
1753 if (reg == G0) return; // always NULL, which is always an oop
1783 mov(reg,O
[all...]
/openjdk7/jdk/src/share/native/common/
H A Dcheck_code.c1885 fullinfo_type reg; local
1891 reg = registers[operand];
1893 if (WITH_ZERO_EXTRA_INFO(reg) == (unsigned)MAKE_FULLINFO(type, 0, 0)) {
1896 } else if (GET_INDIRECTION(reg) > 0 && type == ITEM_Object) {
1899 } else if (GET_ITEM_TYPE(reg) == ITEM_ReturnAddress) {
1903 (GET_ITEM_TYPE(reg) == ITEM_ReturnAddress)
1908 } else if (reg == ITEM_InitObject && type == ITEM_Object) {
1910 } else if (WITH_ZERO_EXTRA_INFO(reg) ==

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