869N/A * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. 869N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 869N/A * This code is free software; you can redistribute it and/or modify it 869N/A * under the terms of the GNU General Public License version 2 only, as 869N/A * published by the Free Software Foundation. 869N/A * This code is distributed in the hope that it will be useful, but WITHOUT 869N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 869N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 869N/A * version 2 for more details (a copy is included in the LICENSE file that 869N/A * accompanied this code). 869N/A * You should have received a copy of the GNU General Public License version 869N/A * 2 along with this work; if not, write to the Free Software Foundation, 869N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 869N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 1954N/A // Used for saving volatile registers. This is Gregs, Fregs, I/L/O. 1954N/A // The Oregs are problematic. In the 32bit build the compiler can 1954N/A // have O registers live with 64 bit quantities. A window save will 1954N/A // cut the heads off of the registers. We have to do a very extensive 1954N/A // stack dance to save and restore these properly. 1954N/A // Note that the Oregs problem only exists if we block at either a polling 2350N/A // page exception a compiled code safepoint that was not originally a call 1954N/A // or deoptimize following one of these kinds of safepoints. 1954N/A // Lots of registers to save. For all builds, a window save will preserve 1954N/A // the %i and %l registers. For the 32-bit longs-in-two entries and 64-bit 0N/A // builds a window-save will preserve the %o registers. In the LION build 0N/A // we need to save the 64-bit %o registers which requires we save them 869N/A // before the window-save (as then they become %i registers and get their 868N/A // heads chopped off on interrupt). We have to save some %g registers here 2042N/A // This frame's save area. Includes extra space for the native call: 1004N/A // vararg's layout space and the like. Briefly holds the caller's 1503N/A // Make sure save locations are always 8 byte aligned. 869N/A // can't use round_to because it doesn't produce compile time constant 65N/A // During deoptimization only the result register need to be restored 65N/A // all the other values have already been extracted. 65N/A // Record volatile registers as callee-save values in an OopMap so their save locations will be 2266N/A // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for 2266N/A // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers 2266N/A // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame 2266N/A // (as the stub's I's) when the runtime routine called by the stub creates its frame. 2624N/A // Always make the frame size 16 byte aligned. 2266N/A // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words 2624N/A // CodeBlob frame size is in words. 2266N/A // OopMap* map = new OopMap(*total_frame_words, 0); 2266N/A // Save 64-bit O registers; they will get their heads chopped off on a 'save'. 2266N/A // Reload the 64 bit Oregs. Although they are now Iregs we load them 2266N/A // to Oregs here to avoid interrupts cutting off their heads 2624N/A // This is really a waste but we'll keep things as they were for now 2624N/A // Save all the FP registers: 32 doubles (32 floats correspond to the 2 halves of the first 16 doubles) 0N/A // Record as callee saved both halves of double registers (2 float registers). 2624N/A// Pop the current frame and restore all the registers that we 2222N/A // Restore all the FP registers 2624N/A // Note that G2 (AKA GThread) must be saved and restored separately. 868N/A // TODO-FIXME: save and restore some of the other ASRs, viz., %asi and %gsr. 868N/A // And temporarily place them in TLS 2624N/A // Now reload the 64bit Oregs after we've restore the window. 1948N/A// Pop the current frame and restore the registers that might be holding 869N/A // 32bit build returns longs in G1 2624N/A // Retrieve the 64-bit O's. 869N/A // Now reload the 64bit Oregs after we've restore the window. 2270N/A// Is vector's size (in bytes) bigger than a size saved by default? 2270N/A// 8 bytes FP registers are saved by default on SPARC. 2624N/A // Note, MaxVectorSize == 8 on SPARC. 2270N/A// The java_calling_convention describes stack locations as ideal slots on 2270N/A// a frame with no abi restrictions. Since we must observe abi restrictions 869N/A// (like the placement of the register window) the slots must be biased by 869N/A// --------------------------------------------------------------------------- 2624N/A// Read the array of BasicTypes from a signature, and compute where the 2624N/A// arguments should go. Values in the VMRegPair regs array refer to 4-byte (VMRegImpl::stack_slot_size) 869N/A// quantities. Values less than VMRegImpl::stack0 are registers, those above 869N/A// refer to 4-byte stack slots. All stack slots are based off of the window 869N/A// top. VMRegImpl::stack0 refers to the first slot past the 16-word window, 869N/A// and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register 869N/A// values 0-63 (up to RegisterImpl::number_of_registers) are the 64-bit 869N/A// integer registers. Values 64-95 are the (32-bit only) float registers. 2624N/A// Each 32-bit quantity is given its own number, so the integer registers 2624N/A// (in either 32- or 64-bit builds) use 2 numbers. For example, there is 869N/A// an O0-low and an O0-high. Essentially, all int register numbers are doubled. 2624N/A// Register results are passed in O0-O5, for outgoing call arguments. To 869N/A// convert to incoming arguments, convert all O's to I's. The regs array 869N/A// refer to the low and hi 32-bit words of 64-bit registers or stack slots. 0N/A// If the regs[].second() field is set to VMRegImpl::Bad(), it means it's unused (a 2615N/A// 32-bit value was passed). If both are VMRegImpl::Bad(), it means no value was 2615N/A// passed (used as a placeholder for the other half of longs and doubles in 2615N/A// the 64-bit build). regs[].second() is either VMRegImpl::Bad() or regs[].second() is 2615N/A// regs[].first()+1 (regs[].first() may be misaligned in the C calling convention). 2615N/A// Sparc never passes a value in regs[].second() but not regs[].first() (regs[].first() 2624N/A// == VMRegImpl::Bad() && regs[].second() != VMRegImpl::Bad()) nor unrelated values in the 2624N/A// Note: the INPUTS in sig_bt are in units of Java argument words, which are 2615N/A// either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit 2622N/A// units regardless of build. 869N/A// --------------------------------------------------------------------------- 868N/A// The compiled Java calling convention. The Java convention always passes 824N/A// 64-bit values in adjacent aligned locations (either registers or stack), 824N/A// floats in float registers and doubles in aligned float pairs. There is 824N/A// no backing varargs store for values in registers. 824N/A// In the 32-bit build, longs are passed on the stack (cannot be 824N/A// passed in I's, because longs in I's get their heads chopped off at 869N/A case T_ADDRESS:
// Used, e.g., in slow-path locking for the lock's stack address 0N/A case T_ADDRESS:
// Used, e.g., in slow-path locking for the lock's stack address 0N/A // On 32-bit SPARC put longs always on the stack to keep the pressure off 0N/A // integer argument registers. They should be used for oops. 2624N/A // retun the amount of stack space these arguments will need. 2390N/A// Helper class mostly to avoid passing masm everywhere, and handle 869N/A// store displacement overflow logic. 869N/A // base+st_off points to top of argument 869N/A // Argument slot values may be loaded first into a register because 869N/A // they might not fit into displacement. 0N/A // Stores long into offset pointed to by base 0N/A// Patch the callers callsite with entry to compiled code if it exists. 2624N/A // Call into the VM to patch the caller, then jump to compiled callee 0N/A // Must save all the live Gregs the list is: 0N/A // G1: 1st Long arg (32bit build) 0N/A // G2: global allocated to TLS 2624N/A // G3: used in inline cache check (scratch) 869N/A // G4: 2nd Long arg (32bit build); 2624N/A // G5: used in inline cache check (methodOop) 0N/A // The longs must go to the stack by hand since in the 32 bit build they can be trashed by window ops. 0N/A // Must be a leaf call... 0N/A // can be very far once the blob has been relocated 0N/A// Stores long into offset pointed to by base 869N/A // In V9, longs are given 2 64-bit slots in the interpreter, but the 869N/A // data is passed in only 1 slot. 0N/A // Misaligned store of 64-bit data 2624N/A // Misaligned store of 64-bit data 869N/A// Stores into offset pointed to by base 869N/A // In V9, doubles are given 2 64-bit slots in the interpreter, but the 2624N/A // data is passed in only 1 slot. 869N/A // Need to marshal 64-bit value from misaligned Lesp loads 2624N/A // Before we get into the guts of the C2I adapter, see if we should be here 2624N/A // at all. We've come from compiled code and are attempting to jump to the 2624N/A // interpreter, which means the caller made a static call to get here 869N/A // (vcalls always get a compiled target if there is one). Check for a 2624N/A // compiled target. If there is one, we need to patch the caller's call. 2624N/A // However we will run interpreted if we come thru here. The next pass 869N/A // thru the call site will run compiled. If we ran compiled here then 2624N/A // we can (theorectically) do endless i2c->c2i->i2c transitions during 1801N/A // we can have at most one and don't need to play any tricks to keep 2624N/A // from endlessly growing the stack. 2624N/A // Actually if we detected that we had an i2c->c2i transition here we 2624N/A // ought to be able to reset the world back to the state of the interpreted 869N/A // call and not bother building another interpreter arg area. We don't 869N/A // do that at this point. 2624N/A // Since all args are passed on the stack, total_args_passed*wordSize is the 2624N/A // space we need. Add in varargs area needed by the interpreter. Round up 2624N/A // Make some extra space on the stack. 2624N/A // Write the args into the outgoing interpreter space. 868N/A // Load the interpreter entry point. 2624N/A // Pass O5_savedSP as an argument to the interpreter. 1280N/A // The interpreter will restore SP to this value before returning. 0N/A // Jump to the interpreter just as if interpreter was doing it. 1280N/A // Setup Lesp for the call. Cannot actually set Lesp as the current Lesp 1280N/A // (really L0) is in use by the compiled frame as a generic temp. However, 1280N/A // the interpreter does not know where its args are without some kind of 1280N/A // arg pointer being passed in. Pass it in Gargs. 2624N/A // Generate an I2C adapter: adjust the I-frame to make space for the C-frame 1280N/A // layout. Lesp was saved by the calling I-frame and will be restored on 1280N/A // return. Meanwhile, outgoing arg space is all owned by the callee 1280N/A // C-frame, so we can mangle it at will. After adjusting the frame size, 1280N/A // hoist register arguments and repack other args according to the compiled 1280N/A // code convention. Finally, end in a jump to the compiled code. The entry 1280N/A // point address is the start of the buffer. 1280N/A // We will only enter here from an interpreted frame and never from after 1280N/A // passing thru a c2i. Azul allowed this but we do not. If we lose the 1280N/A // race and use a c2i we will remain interpreted for the race loser(s). 1280N/A // This removes all sorts of headaches on the x86 side and also eliminates 1280N/A // the possibility of having c2i -> i2c -> c2i -> ... endless transitions. 1280N/A // Adapters can be frameless because they do not require the caller 1280N/A // to perform additional cleanup work, such as correcting the stack pointer. 1280N/A // An i2c adapter is frameless because the *caller* frame, which is interpreted, 1280N/A // routinely repairs its own stack pointer (from interpreter_frame_last_sp), 1280N/A // even if a callee has modified the stack pointer. 1280N/A // A c2i adapter is frameless because the *callee* frame, which is interpreted, 2624N/A // routinely repairs its caller's stack pointer (from sender_sp, which is set 1280N/A // up via the senderSP register). 1280N/A // In other words, if *either* the caller or callee is interpreted, we can 1280N/A // get the stack pointer repaired after a call. 1280N/A // This is why c2i and i2c adapters cannot be indefinitely composed. 1280N/A // In particular, if a c2i adapter were to somehow call an i2c adapter, 1280N/A // both caller and callee would be compiled methods, and neither would 1280N/A // clean up the stack pointer changes performed by the two adapters. 2624N/A // If this happens, control eventually transfers back to the compiled 1280N/A // caller, but with an uncorrected stack, causing delayed havoc. 868N/A // So, let's test for cascading c2i/i2c adapters right now. 0N/A // assert(Interpreter::contains($return_addr) || 0N/A // StubRoutines::contains($return_addr), 0N/A // "i2c adapter must return to an interpreter frame"); 0N/A const char*
msg =
"i2c adapter must return to an interpreter frame";
2624N/A // As you can see from the list of inputs & outputs there are not a lot 0N/A // of temp registers to work with: mostly G1, G3 & G4. 869N/A // G5_method - Method oop 0N/A // G4 (Gargs) - Pointer to interpreter's args 2624N/A // O0..O4 - free for scratch 2624N/A // O5_savedSP - Caller's saved SP, to be restored if needed 0N/A // O7 - Valid return address 868N/A // L0-L7, I0-I7 - Caller's temps (no frame pushed yet) 2624N/A // O0-O5 - Outgoing args in compiled layout 2624N/A // O6 - Adjusted or restored SP 868N/A // O7 - Valid return address 869N/A // L0-L7, I0-I7 - Caller's temps (no frame pushed yet) 868N/A // F0-F7 - more outgoing args 0N/A // Gargs is the incoming argument base, and also an outgoing argument. 0N/A // ON ENTRY TO THE CODE WE ARE MAKING, WE HAVE AN INTERPRETED FRAME 0N/A // WITH O7 HOLDING A VALID RETURN PC 2624N/A // +--------------+ <--- start of outgoing args 869N/A // : rest of args : |---size is java-arg-words 869N/A // +--------------+ <--- O4_args (misaligned) and Lesp if prior is not C2I 869N/A // : unused : |---Space for max Java stack, plus stack alignment 2624N/A // +--------------+ <--- SP + 16*wordsize 869N/A // +--------------+ <--- SP 869N/A // WE REPACK THE STACK. We use the common calling convention layout as 869N/A // discovered by calling SharedRuntime::calling_convention. We assume it 2624N/A // causes an arbitrary shuffle of memory, which may require some register 2624N/A // temps to do the shuffle. We hope for (and optimize for) the case where 0N/A // temps are not needed. We may have to resize the stack slightly, in case 868N/A // we need alignment padding (32-bit interpreter can pass longs & doubles 0N/A // misaligned, but the compilers expect them aligned). 2624N/A // +--------------+ <--- start of outgoing args 869N/A // | floats, | |---Outgoing stack args. 869N/A // : doubles : | First few args in registers. 2624N/A // +--------------+ <--- SP' + 16*wordsize 869N/A // +--------------+ <--- SP' 869N/A // ON EXIT FROM THE CODE WE ARE MAKING, WE STILL HAVE AN INTERPRETED FRAME 869N/A // WITH O7 HOLDING A VALID RETURN PC - ITS JUST THAT THE ARGS ARE NOW SETUP 2624N/A // FOR COMPILED CODE AND THE FRAME SLIGHTLY GROWN. 0N/A // Cut-out for having no stack args. Since up to 6 args are passed 868N/A // in registers, we will commonly have no stack args. 0N/A // Convert VMReg stack slots to words. 0N/A // Round up to miminum stack alignment, in wordSize 2624N/A // Now compute the distance from Lesp to SP. This calculation does not 0N/A // include the space for total_args_passed because Lesp has not yet popped 0N/A // Now generate the shuffle code. Pick up all register args and move the 2624N/A // rest through G1_scratch. 0N/A // Longs and doubles are passed in native word order, but misaligned 0N/A // in the 32-bit build. 2624N/A // Pick up 0, 1 or 2 words from Lesp+offset. Assume mis-aligned in the 0N/A // 32-bit build and aligned in the 64-bit build. Look for the obvious 0N/A // Load in argument order going down. 2624N/A // In V9, longs are given 2 64-bit slots in the interpreter, but the 0N/A // data is passed in only 1 slot. 2624N/A // In V9, doubles are given 2 64-bit slots in the interpreter, but the 2624N/A // data is passed in only 1 slot. This code also handles longs that 0N/A // are passed on the stack, but need a stack-to-stack move through a 0N/A // spare float register. 2624N/A // Need to marshal 64-bit value from misaligned Lesp loads 0N/A // Was the argument really intended to be on the stack, but was loaded 0N/A // Convert stack slot to an SP offset 0N/A // Store down the shuffled stack word. Target address _is_ aligned. 869N/A // Jump to the compiled code just as if compiled code was doing it. 869N/A // 6243940 We might end up in handle_wrong_method if 869N/A // the callee is deoptimized as we race thru here. If that 2624N/A // happens we don't want to take a safepoint because the 2624N/A // caller frame will look interpreted and arguments are now 0N/A // "compiled" so it is much better to make this transition 869N/A // invisible to the stack walking code. Unfortunately if 0N/A // we try and find the callee by normal means a safepoint 0N/A // is possible. So we stash the desired callee in the thread 869N/A // and the vm will find there should this case occur. 868N/A // Open a big window for deopt failure 2624N/A// --------------------------------------------------------------- 2624N/A // ------------------------------------------------------------------------- 2624N/A // Generate a C2I adapter. On entry we know G5 holds the methodOop. The 0N/A // args start out packed in the compiled layout. They need to be unpacked 0N/A // into the interpreter layout. This will almost always require some stack 0N/A // space. We grow the current (compiled) stack, then repack the args. We 0N/A // finally end in a jump to the generic interpreter entry point. On exit 869N/A // from the interpreter, the interpreter will restore our SP (lest the 0N/A // compiled code, which relys solely on SP and not FP, get sick). 2624N/A // Method might have been compiled since the call site was patched to 2624N/A // interpreted if that is the case treat it as a miss so we can get 0N/A // the call site corrected. 0N/A// Helper function for native calling conventions 0N/A // Bias any stack based VMReg we get by ignoring the window area 2624N/A // but not the register parameter save area. 0N/A // This is strange for the following reasons. We'd normally expect 0N/A // the calling convention to return an VMReg for a stack slot 0N/A // completely ignoring any abi reserved area. C2 thinks of that 0N/A // abi area as only out_preserve_stack_slots. This does not include 869N/A // the area allocated by the C abi to store down integer arguments 0N/A // because the java calling convention does not use it. So 2624N/A // since c2 assumes that there are only out_preserve_stack_slots 2624N/A // to bias the optoregs (which impacts VMRegs) when actually referencing any actual stack 0N/A // location the c calling convention must add in this bias amount 0N/A // to make up for the fact that the out_preserve_stack_slots is 0N/A // insufficient for C calls. What a mess. I sure hope those 6 0N/A // stack words were worth it on every java call! 0N/A // Another way of cleaning this up would be for out_preserve_stack_slots 2624N/A // to take a parameter to say whether it was C or java calling conventions. 2624N/A // Then things might look a little better (but not much). 2624N/A // Now return a biased offset that will be correct when out_preserve_slots is added back in 0N/A // Return the number of VMReg stack_slots needed for the args. 0N/A // This value does not include an abi space (like register window 869N/A // The native convention is V8 if !LP64 0N/A // The LP64 convention is the V9 convention which is slightly more sane. 2624N/A // We return the amount of VMReg stack slots we need to reserve for all 0N/A // the arguments NOT counting out_preserve_stack_slots. Since we always 0N/A // have space for storing at least 6 registers to memory we start with that. 0N/A // See int_stk_helper for a further discussion. 2624N/A // V9 convention: All things "as-if" on double-wide stack slots. 0N/A // Hoist any flt/dbl's in the first 16 dbl regs. 0N/A int j = 0;
// Count of actual args, not HALVES 868N/A // V9ism: floats go in ODD registers 1855N/A // V9ism: floats go in ODD stack slot 2624N/A // V8 convention: first 6 things in O-regs, rest on stack. 2624N/A // Alignment is willy-nilly. 869N/A// --------------------------------------------------------------------------- 869N/A// Check and forward and pending exception. Thread is stored in 868N/A// L7_thread_cache and possibly NOT in G2_thread. Since this is a native call, there 868N/A// is no exception handler. We merely pop this frame off and throw the 869N/A// exception in the caller's frame. 245N/A // Since this is a native call, we *know* the proper exception handler 869N/A // without calling into the VM: it's the empty function. Just pop this 868N/A // frame and then jump to forward_exception_entry; O7 will contain the 869N/A // native caller's return PC. 245N/A// A simple move of integer like type 245N/A// On 64 bit we will store integer like items to the stack as 0N/A// 64 bits items (sparc abi) even though java would only store 869N/A// 32bits for a parameter. On 32bit it will simply be 32 bits 868N/A// So this routine will do 32->32 on 32bit and 32->64 on 64bit 869N/A// An oop arg. Must pass a handle not the oop itself 2624N/A // must pass a handle. First figure out the location we use as a handle 0N/A // Oop is already on the stack 869N/A // Oop is in an input register pass we must flush it to the stack 2697N/A// A float arg may have to do float reg int reg conversion 2697N/A // stack to stack the easiest of the bunch 1101N/A // In theory these overlap but the ordering is such that this is likely a nop 2624N/A // Do the simple ones here else do two int moves 1026N/A // split src into two separate registers 1026N/A // Remember hi means hi address or lsw on sparc 1026N/A // this will only move lo -> lo and ignore hi 1017N/A // MSW -> MSW (lo ie. first word) 1026N/A // Remember lo is low address not msb for stack slots 2624N/A // and lo is the "real" register for registers 868N/A // we will move: src.hi (LSW) -> dst.lo, src.lo (MSW) -> src.lo [the MSW is in the LSW of the reg] 0N/A // msw is stack move to L5 2372N/A // lsw is stack move to dst.lo (real reg) 2372N/A // we will move: src.hi (LSW) -> dst.lo, src.lo (MSW) -> L5 2372N/A // So dst now has the low order correct position the 0N/A // For LP64 we can probably do better. 2439N/A // The painful thing here is that like long_move a VMRegPair might be 0N/A // 1: a single physical register 0N/A // 2: two physical registers (v8) 0N/A // 3: a physical reg [lo] and a stack slot [hi] (v8) 0N/A // 4: two stack slots 869N/A // Since src is always a java calling convention we know that the src pair 2624N/A // is always either all registers or all stack (and aligned?) 0N/A // in a register [lo] and a stack slot [hi] 2439N/A // stack to stack the easiest of the bunch 0N/A // ought to be a way to do this where if alignment is ok we use ldd/std when possible 0N/A // stack -> reg, stack -> stack 869N/A // This was missing. (very rare case) 2624N/A // Eventually optimize for alignment QQQ 869N/A // Eventually optimize for alignment QQQ 2439N/A // ought to be able to do a single store 869N/A // ought to be able to do a single load 776N/A // ought to be able to do a single store 776N/A // ought to be able to do a single load 776N/A // REMEMBER first() is low address not LSB 0N/A // In theory these overlap but the ordering is such that this is likely a nop 869N/A// Creates an inner frame if one hasn't already been created, and 868N/A// saves a copy of the thread in L7_thread_cache 48N/A // Save thread in L7 (INNER FRAME); it crosses a bunch of VM calls below 1963N/A // Don't use save_thread because it smashes G2 and we merely want to save a 0N/A // if map is non-NULL then the code should store the values, 869N/A // otherwise it should load them. 869N/A // Save or restore double word values 2334N/A// Check GC_locker::needs_gc and enter the runtime if it's true. This 2334N/A// keeps a new JNI critical region from starting until a GC has been 2624N/A// forced. Save down any oops in registers and describe them in an 0N/A // Save down any values that are live in registers and call into the 0N/A // runtime to halt for a GC 2624N/A // Reload all the register arguments 869N/A // Stress register saving 0N/A // Destroy argument registers 2624N/A// Unpack an array argument into a pointer to the body and the length 2624N/A// if the array is non-null, otherwise pass 0 for both. 0N/A // Pass the length, ptr pair 2624N/A // Load the arg up from the stack 0N/A // Now write the args into the outgoing interpreter space 2624N/A // Load the member_arg into register, if necessary. 0N/A // no data motion is needed 2624N/A // Make sure the receiver is loaded into a register. 2624N/A // Porting note: This assumes that compiled calling conventions always 2624N/A // pass the receiver oop in a register. If this is not true on some 0N/A // platform, pick a temp and load the receiver from stack. 0N/A // no data motion is needed 2624N/A // Figure out which address we are really jumping to: 0N/A// --------------------------------------------------------------------------- 869N/A// Generate a native wrapper for a given method. The method takes arguments 2624N/A// in the Java compiled code convention, marshals them to the native 2624N/A// convention (handlizes oops, etc), transitions to native, makes the call, 0N/A// returns to java state (possibly blocking), unhandlizes any result and 0N/A// Critical native functions are a shorthand for the use of 869N/A// GetPrimtiveArrayCritical and disallow the use of any other JNI 2624N/A// functions. The wrapper is expected to unpack the arguments before 2624N/A// passing them to the callee and perform checks before and after the 0N/A// native call to ensure that they GC_locker 0N/A// parts of JNI setup are skipped like the tear down of the JNI handle 0N/A// block and the check for pending exceptions it's impossible for them 2624N/A// They are roughly structured like this: 0N/A// if (GC_locker::needs_gc()) 0N/A// SharedRuntime::block_for_jni_critical(); 0N/A// tranistion to thread_in_native 0N/A// unpack arrray arguments and call native entry point 869N/A// check for safepoint in progress 2624N/A// check if any thread suspend flags are set 2624N/A// call into JVM and possible unlock the JNI critical 0N/A// if a GC was suppressed while in the critical native. 0N/A// transition back to thread_in_Java 869N/A // Native nmethod wrappers never take possesion of the oop arguments. 2624N/A // So the caller will gc the arguments. The only thing we need an 2624N/A // oopMap for is if the call is static 0N/A // An OopMap for lock (and class if static), and one for the VM call itself 2624N/A // First thing make an ic check to see if we should even be here 0N/A // Object.hashCode can pull the hashCode from the header word 869N/A // instead of doing a full VM transition once it's been computed. 2624N/A // Since hashCode is usually polymorphic at call sites we can't do 2624N/A // this optimization at the call site without a lot of work. 0N/A // Read the header and build a mask to get its hash field. Give up if the object is not unlocked. 0N/A // We depend on hash_mask being at most 32 bits and avoid the use of 0N/A // hash_mask_in_place because it could be larger than 32 bits in a 64-bit 0N/A // Check if biased and fall through to runtime if so 0N/A // Check for a valid (non-zero) hash code and get its value. 2624N/A // We have received a description of where all the java arg are located 0N/A // on entry to the wrapper. We need to convert these args to where 0N/A // the jni function will expect them. To figure out where they go 0N/A // we convert the java signature to a C signature by inserting 0N/A // the hidden arguments as arg[0] and possibly arg[1] (static method) 0N/A // These have to be saved and restored across the safepoint 2624N/A // Arrays are passed as int, elem* pair 869N/A // Now figure out where the args must be stored and how much stack space 2624N/A // they require (neglecting out_preserve_stack_slots but space for storing 2624N/A // the 1st six register arguments). It's weird see int_stk_helper. 868N/A // Critical natives may have to call out so they need a save area 0N/A // for register arguments. 2624N/A // Compute framesize for the wrapper. We need to handlize all oops in 2624N/A // registers. We must create space for them here that is disjoint from 2624N/A // the windowed save area because we have no control over when we might 2624N/A // flush the window again and overwrite values that gc has since modified. 1057N/A // We always just allocate 6 word for storing down these object. This allow 1057N/A // us to simply record the base and use the Ireg number to decide which 2624N/A // slot to use. (Note that the reg number is the inbound number not the 2624N/A // We must shuffle args to match the native convention, and include var-args space. 2624N/A // Calculate the total number of stack slots we will need. 2624N/A // First count the abi requirement plus all of the outgoing args 2334N/A // Now the space for the inbound oop handle area 2624N/A // Now any space we need for handlizing a klass if static method 2624N/A // Now a place to save return value or as a temporary for any gpr -> fpr moves 1112N/A // Ok The space we have allocated will look like: 2624N/A // |---------------------| <- lock_slot_offset 2624N/A // |---------------------| <- klass_slot_offset 1112N/A // |---------------------| <- oop_handle_offset 0N/A // | based arguments | 0N/A // |---------------------| 0N/A // |---------------------| 869N/A // SP-> | out_preserved_slots | // Now compute actual number of stack words we need rounding to make // stack properly aligned. // Generate stack overflow check before creating frame // Generate a new frame for the wrapper. // We immediately shuffle the arguments so that any vm call we have to // make from here on out (sync slow path, jvmti, etc.) we will have // captured the oops from our caller and have a valid oopMap for // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* // (derived from JavaThread* which is in L7_thread_cache) and, if static, // the class mirror instead of a receiver. This pretty much guarantees that // register layout will not match. We ignore these extra arguments during // the shuffle. The shuffle is described by the two calling convention // vectors we have in our possession. We simply walk the java vector to // get the source locations and the c vector to get the destinations. // Because we have a new window and the argument registers are completely // disjoint ( I0 -> O1, I1 -> O2, ...) we have nothing to worry about // This is a trick. We double the stack slots so we can claim // the oops in the caller's frame. Since we are sure to have // more args than the caller doubling is enough to make // sure we can capture all the incoming oop args from the // Record sp-based slot for receiver on stack for non-static methods // We move the arguments backward because the floating point registers // destination will always be to a register with a greater or equal register // Pre-load a static method's oop into O1. Used both by locking code and // the normal JNI call code. // Now handlize the static class mirror in O1. It's known not-null. // We have all of the arguments setup at this point. We MUST NOT touch any Oregs // except O6/O7. So if we must call out we must push a new frame. We immediately // push a new frame and flush the windows. // Call the next instruction // We use the same pc/oopMap repeatedly when we call out // O7 now has the pc loaded that we will use when we finally call to native. // Save thread in L7; it crosses a bunch of VM calls below // Don't use save_thread because it smashes G2 and we merely // If we create an inner frame once is plenty // when we create it we must also save G2_thread // dtrace method entry support // RedefineClasses() tracing support for obsolete method entry // We are in the jni frame unless saved_frame is true in which case // we are in one frame deeper (the "inner" frame). If we are in the // "inner" frames the args are in the Iregs and if the jni frame then // they are in the Oregs. // If we ever need to go to the VM (for locking, jvmti) then // we will always be in the "inner" frame. // Lock a synchronized method // making the box point to itself will make it clear it went unused // but also be obviously invalid // Compiler_lock_object (Roop, Rmark, Rbox, Rscratch) -- kills Rmark, Rbox, Rscratch // None of the above fast optimizations worked so we have to get into the // slow case of monitor enter. Inline a special case of call_VM that // disallows any pending_exception. // Record last_Java_sp, in case the VM code releases the JVM lock. __ stop(
"no pending exception allowed on exit from IR::monitorenter");
// Finally just about ready to make the JNI call // Store only what we need from this frame // QQQ I think that non-v9 (like we care) we don't need these saves // either as the flush traps and the current window goes too. // get JNIEnv* which is first argument to native // Use that pc we placed in O7 a while back as the current frame anchor // We flushed the windows ages ago now mark them as flushed before transitioning. // Transition from _thread_in_Java to _thread_in_native. // Unpack native results. For int-types, we do any needed sign-extension // and move things into I0. The return value there will survive any VM // calls for blocking or unlocking. An FP or OOP result (handle) is done // specially in the slow-path code. case T_VOID:
break;
// Nothing to do! case T_FLOAT:
break;
// Got it where we want it (unless slow-path) case T_DOUBLE:
break;
// Got it where we want it (unless slow-path) // In 64 bits build result is in O0, in O0, O1 in 32bit build break;
// Cannot de-handlize until after reclaiming jvm_lock // Block, if necessary, before resuming in _thread_in_Java state. // In order for GC to work, don't clear the last_Java_sp until after blocking. // Switch thread to "native transition" state before reading the synchronization state. // This additional state is necessary because reading and testing the synchronization // state is not atomic w.r.t. GC, as this scenario demonstrates: // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. // VM thread changes sync state to synchronizing and suspends threads for GC. // Thread A is resumed to finish this native method, but doesn't block here since it // didn't see any synchronization is progress, and escapes. // Force this write out before the read below // Write serialization page so VM thread can do a pseudo remote membar. // We use the current thread pointer to calculate a thread specific // offset to write to within the page. This minimizes bus traffic // due to cache line collision. // Block. Save any potential method result value before the operation and // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this // lets us share the oopMap we used when we went native rather the create // a distinct one for this pc // Restore any method result value // The call above performed the transition to thread_in_Java so // skip the transition logic below. // thread state is thread_in_native_trans. Any safepoint blocking has already // happened so we can now change state to _thread_in_Java. // Handle possible exception (will unlock if necessary) // native result if any is live in freg or I0 (and I1 if long and 32bit vm) // Get locked oop from the handle we passed to jni // Must save pending exception around the slow-path VM call. Since it's a // leaf call, the pending exception (if any) can be kept in a register. // (Roop, Rmark, Rbox, Rscratch) // save and restore any potential method result value around the unlocking // operation. Will save in I0 (or stack for FP returns). // Must clear pending-exception before re-entering the VM. Since this is // a leaf call, pending-exception-oop can be safely kept in a register. // slow case of monitor enter. Inline a special case of call_VM that // disallows any pending_exception. __ stop(
"no pending exception allowed on exit from IR::monitorexit");
// check_forward_pending_exception jump to forward_exception if any pending // exception is set. The forward_exception routine expects to see the // exception in pending_exception and not in a register. Kind of clumsy, // since all folks who branch to forward_exception must have tested // pending_exception first and hence have it in a register already. // Tell dtrace about this method exit // Clear "last Java frame" SP and PC. // Must leave proper result in O0,O1 and G1 (c2/tiered only) __ srl (
I1, 0,
I1);
// Zero extend O1 (harmless?) // --------------------------------------------------------------------------- // Generate a dtrace nmethod for a given signature. The method takes arguments // in the Java compiled code convention, marshals them to the native // abi and then leaves nops at the position you would expect to call a native // function. When the probe is enabled the nops are replaced with a trap // instruction that dtrace inserts and the trace will cause a notification // The probes are only able to take primitive types and java/lang/String as // arguments. No other java types are allowed. Strings are converted to utf8 // strings so that from dtrace point of view java strings are converted to C // strings. There is an arbitrary fixed limit on the total space that a method // can use for converting the strings. (256 chars per string in the signature). // So any java string larger then this is truncated. // generate_dtrace_nmethod is guarded by a mutex so we are sure to // be single threaded in this method. // Fill in the signature array, for the calling-convention call. // The signature we are going to use for the trap that dtrace will see // is converted to NULL. (A one-slot java/lang/Long object reference // is converted to a two-slot long, which is why we double the allocation). // Skip the receiver as dtrace doesn't want to see it in_sig_bt[i++] =
bt;
// Collect remaining bits of signature // We convert double to long // We convert float to int // Now get the compiled-Java layout as input arguments // We have received a description of where all the java arg are located // on entry to the wrapper. We need to convert these args to where // the a native (non-jni) function would expect them. To figure out // where they go we convert the java signature to a C signature and remove // T_VOID for any long/double we might have received. // Now figure out where the args must be stored and how much stack space // they require (neglecting out_preserve_stack_slots but space for storing // the 1st six register arguments). It's weird see int_stk_helper. // Calculate the total number of stack slots we will need. // First count the abi requirement plus all of the outgoing args // Now space for the string(s) we must convert // Ok The space we have allocated will look like: // |---------------------| // |---------------------| <- string_locs[n] // |---------------------| <- string_locs[n-1] // |---------------------| <- string_locs[1] // |---------------------| <- string_locs[0] // |---------------------| <- conversion_temp // |---------------------| // SP-> | out_preserved_slots | // Now compute actual number of stack words we need rounding to make // stack properly aligned. // First thing make an ic check to see if we should even be here // The instruction at the verified entry point must be 5 bytes or longer // because it can be patched on the fly by make_non_entrant. The stack bang // instruction fits that requirement. // Generate stack overflow check before creating frame "valid size for make_non_entrant");
// Generate a new frame for the wrapper. // Frame is now completed as far a size and linkage. const Register g0 =
G0;
// without this we get a compiler warning (why??) // need to unbox a one-slot value // If the final destination is an acceptable register // If tmp wasn't final destination copy to final destination ++
c_arg;
// move over the T_VOID to keep the loop indices in sync // We store the oop now so that the conversion pass can reach // while in the inner frame. This will be the only store if // Convert the arg to NULL // Destination could be an odd reg on 32bit in which case // we can't load direct to the destination. // 32bit can't do a split move of something like g1 -> O0, O1 // If we have any strings we must store any register based arg to the stack // This includes any still live xmm registers too. // protect all the arg registers // Get first string offset // It's a string the oop and it was already copied to the out arg // Ok now we are done. Need to place the nop that dtrace wants in order to // this function returns the adjust size (in number of words) to a c2i adapter // activation for use during deoptimization "test and remove; got more parms than locals");
return 0;
// No adjustment for negative locals // "Top of Stack" slots that may be unused by the calling convention but must // otherwise be preserved. // On Intel these are not necessary and the value can be zero. // On Sparc this describes the words reserved for storing a register window // when an interrupt occurs. // Common out the new frame generation for deopt and uncommon trap // make sure that the frames are aligned properly // Deopt needs to pass some extra live values from frame to frame // trash registers to show a clear pattern in backtraces // Don't touch I5 could have valuable savedSP // trash the return value as there is nothing to return yet // loop through the UnrollBlock info and create new frames // Before we make new frames, check to see if stack is available. // Do this after the caller's return address is on top of stack // Get total frame size for interpreted frames // Adjust old interpreter frame to make space for new frame's extra java locals // We capture the original sp for the transition frame only because it is needed in // order to properly calculate interpreter_sp_adjustment. Even though in real life // every interpreter frame captures a savedSP it is only needed at the transition // (fortunately). If we had to have it correct everywhere then we would need to // be told the sp_adjustment for each frame we create. If the frame size array // were to have twice the frame count entries then we could have pairs [sp_adjustment, frame_size] // for each frame we create and keep up the illusion every where. // make sure that there is at least one entry in the array // Now push the new interpreter frames // allocate a new frame, filling the registers //------------------------------generate_deopt_blob---------------------------- // Ought to generate an ideal graph & compile, but here's some SPARC ASM // allocate space for the code // setup code generation tools // Measured 8/7/03 at 1212 in 32bit debug build (no VerifyThread) // Measured 8/7/03 at 1396 in 32bit debug build (VerifyThread) // This is the entry point for code which is returning to a de-optimized // The steps taken by this frame are as follows: // - push a dummy "register_save" and save the return values (O0, O1, F0/F1, G1) // and all potentially live registers (at a pollpoint many registers can be live). // - call the C routine: Deoptimization::fetch_unroll_info (this function // returns information about the number and size of interpreter frames // which are equivalent to the frame which is being deoptimized) // - deallocate the unpack frame, restoring only results values. Other // volatile registers will now be captured in the vframeArray as needed. // - deallocate the deoptimization frame // - in a loop using the information returned in the previous step // push new interpreter frames (take care to propagate the return // values through each new frame pushed) // - create a dummy "unpack_frame" and save the return values (O0, O1, F0) // - call the C routine: Deoptimization::unpack_frames (this function // lays out values on the interpreter frame which was just created) // - deallocate the dummy unpack_frame // - ensure that all the return values are correctly set and then do // a return to the interpreter entry point // Refer to the following methods for more information: // - Deoptimization::fetch_unroll_info // - Deoptimization::unpack_frames // restore G2, the trampoline destroyed it // On entry we have been called by the deoptimized nmethod with a call that // replaced the original call (or safepoint polling location) so the deoptimizing // pc is now in O7. Return values are still in the expected places // restore G2, the trampoline destroyed it // On entry we have been jumped to by the exception handler (or exception_blob // for server). O0 contains the exception oop and O7 contains the original // exception pc. So if we push a frame here it will look to the // stack walking code (fetch_unroll_info) just like a normal call so // state will be extracted normally. // save exception oop in JavaThread and fall through into the // exception_in_tls case since they are handled in same way except // for where the pending exception is kept. // Vanilla deoptimization with an exception pending in exception_oop // No need to update oop_map as each call to save_live_registers will produce identical oopmap // verify that there is really an exception oop in exception_oop __ stop(
"no exception in thread");
// verify that there is no pending exception __ stop(
"must not have pending exception here");
// Reexecute entry, similar to c2 uncommon trap // No need to update oop_map as each call to save_live_registers will produce identical oopmap // do the call by hand so we can get the oopmap // Set an oopmap for the call site this describes all our saved volatile registers // NOTE: we know that only O0/O1 will be reloaded by restore_result_registers // so this move will survive // Move the pending exception from exception_oop to Oexception so // the pending exception will be picked up the interpreter. // deallocate the deoptimization frame taking care to preserve the return values // Allocate new interpreter frame(s) and possible c2i adapter frame // push a dummy "unpack_frame" taking care of float return values and // call Deoptimization::unpack_frames to have the unpacker layout // information in the interpreter frames just created and then return // to the interpreter entry point // 32-bit 1-register longs return longs in G1 // LP64 uses g4 in set_last_Java_frame // In 32 bit, C2 returns longs in G1 so restore the saved G1 into // I0/I1 if the return value is long. //------------------------------generate_uncommon_trap_blob-------------------- // Ought to generate an ideal graph & compile, but here's some SPARC ASM // allocate space for the code // setup code generation tools // Measured 8/7/03 at 660 in 32bit debug build (no VerifyThread) // Measured 8/7/03 at 1028 in 32bit debug build (VerifyThread) // This is the entry point for all traps the compiler takes when it thinks // it cannot handle further execution of compilation code. The frame is // deoptimized in these cases and converted into interpreter frames for // The steps taken by this frame are as follows: // - push a fake "unpack_frame" // - call the C routine Deoptimization::uncommon_trap (this function // packs the current compiled frame into vframe arrays and returns // information about the number and size of interpreter frames which // are equivalent to the frame which is being deoptimized) // - deallocate the "unpack_frame" // - deallocate the deoptimization frame // - in a loop using the information returned in the previous step // push interpreter frames; // - create a dummy "unpack_frame" // - call the C routine: Deoptimization::unpack_frames (this function // lays out values on the interpreter frame which was just created) // - deallocate the dummy unpack_frame // - return to the interpreter entry point // Refer to the following methods for more information: // - Deoptimization::uncommon_trap // - Deoptimization::unpack_frame // the unloaded class index is in O0 (first parameter to this blob) // push a dummy "unpack_frame" // and call Deoptimization::uncommon_trap to pack the compiled frame into // vframe array and return the UnrollBlock information // deallocate the deoptimized frame taking care to preserve the return values // Allocate new interpreter frame(s) and possible c2i adapter frame // push a dummy "unpack_frame" taking care of float return values and // call Deoptimization::unpack_frames to have the unpacker layout // information in the interpreter frames just created and then return // to the interpreter entry point //------------------------------generate_handler_blob------------------- // Generate a special Compile2Runtime blob that saves all registers, and sets // This blob is jumped to (via a breakpoint and the signal handler) from a // safepoint in compiled code. On entry to this blob, O7 contains the // address in the original nmethod at which we should resume normal execution. // Thus, this blob looks like a subroutine which must preserve lots of // registers and return normally. Note that O7 is never register-allocated, // so it is guaranteed to be free here. // The hardest part of what this blob must do is to save the 64-bit %o // registers in the 32-bit build. A simple 'save' turn the %o's to %i's and // an interrupt will chop off their heads. Making space in the caller's frame // first will let us save the 64-bit %o's before save'ing, but we cannot hand // the adjusted FP off to the GC stack-crawler: this will modify the caller's // SP and mess up HIS OopMaps. So we first adjust the caller's SP, then save // the 64-bit %o's, then do a save, then fixup the caller's SP (our FP). // Tricky, tricky, tricky... // allocate space for the code // setup code generation tools // Measured 8/7/03 at 896 in 32bit debug build (no VerifyThread) // Measured 8/7/03 at 1080 in 32bit debug build (VerifyThread) // even larger with TraceJumps // If this causes a return before the processing, then do a "restore" // Make it look like we were called via the poll // so that frame constructor always sees a valid return address // setup last_Java_sp (blows G4) // call into the runtime to handle illegal instructions exception // Do not use call_VM_leaf, because we need to make a GC map at this call site. // Set an oopmap for the call site. // We need this not only for callee-saved registers, but also for volatile // registers that the compiler might be keeping live across a safepoint. // We are back the the original state on entry and ready to go. // Pending exception after the safepoint // We are back the the original state on entry. // Tail-call forward_exception_entry, with the issuing PC in O7, // so it looks like the original nmethod called forward_exception_entry. // make sure all code is generated // Generate a stub that calls into vm to find out the proper destination // of a java call. All the argument registers are live at this point // but since this is generic code we don't know what they are and the caller // must do any gc of the args. // allocate space for the code // setup code generation tools // Measured 8/7/03 at 896 in 32bit debug build (no VerifyThread) // Measured 8/7/03 at 1080 in 32bit debug build (VerifyThread) // even larger with TraceJumps // setup last_Java_sp (blows G4) // call into the runtime to handle illegal instructions exception // Do not use call_VM_leaf, because we need to make a GC map at this call site. // O0 contains the address we are going to jump to assuming no exception got installed // Set an oopmap for the call site. // We need this not only for callee-saved registers, but also for volatile // registers that the compiler might be keeping live across a safepoint. // get the returned methodOop // O0 is where we want to jump, overwrite G3 which is saved and scratch // We are back the the original state on entry and ready to go. // Pending exception after the safepoint // We are back the the original state on entry. // Tail-call forward_exception_entry, with the issuing PC in O7, // so it looks like the original nmethod called forward_exception_entry. // make sure all code is generated // frame_size_words or bytes??