0N/A/*
2160N/A * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
0N/A *
0N/A */
0N/A
1879N/A#include "precompiled.hpp"
1879N/A#include "asm/assembler.hpp"
1879N/A#include "assembler_x86.inline.hpp"
1879N/A#include "interpreter/interpreter.hpp"
1879N/A#include "nativeInst_x86.hpp"
1879N/A#include "oops/instanceOop.hpp"
1879N/A#include "oops/methodOop.hpp"
1879N/A#include "oops/objArrayKlass.hpp"
1879N/A#include "oops/oop.inline.hpp"
1879N/A#include "prims/methodHandles.hpp"
1879N/A#include "runtime/frame.inline.hpp"
1879N/A#include "runtime/handles.inline.hpp"
1879N/A#include "runtime/sharedRuntime.hpp"
1879N/A#include "runtime/stubCodeGenerator.hpp"
1879N/A#include "runtime/stubRoutines.hpp"
1879N/A#include "utilities/top.hpp"
1879N/A#ifdef TARGET_OS_FAMILY_linux
1879N/A# include "thread_linux.inline.hpp"
1879N/A#endif
1879N/A#ifdef TARGET_OS_FAMILY_solaris
1879N/A# include "thread_solaris.inline.hpp"
1879N/A#endif
1879N/A#ifdef TARGET_OS_FAMILY_windows
1879N/A# include "thread_windows.inline.hpp"
1879N/A#endif
2796N/A#ifdef TARGET_OS_FAMILY_bsd
2796N/A# include "thread_bsd.inline.hpp"
2796N/A#endif
1879N/A#ifdef COMPILER2
1879N/A#include "opto/runtime.hpp"
1879N/A#endif
0N/A
0N/A// Declaration and definition of StubGenerator (no .hpp file).
0N/A// For a more detailed description of the stub routine structure
0N/A// see the comment in stubRoutines.hpp
0N/A
0N/A#define __ _masm->
113N/A#define TIMES_OOP (UseCompressedOops ? Address::times_4 : Address::times_8)
304N/A#define a__ ((Assembler*)_masm)->
0N/A
0N/A#ifdef PRODUCT
0N/A#define BLOCK_COMMENT(str) /* nothing */
0N/A#else
0N/A#define BLOCK_COMMENT(str) __ block_comment(str)
0N/A#endif
0N/A
0N/A#define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
0N/Aconst int MXCSR_MASK = 0xFFC0; // Mask out any pending exceptions
0N/A
0N/A// Stub Code definitions
0N/A
0N/Astatic address handle_unsafe_access() {
0N/A JavaThread* thread = JavaThread::current();
0N/A address pc = thread->saved_exception_pc();
0N/A // pc is the instruction which we must emulate
0N/A // doing a no-op is fine: return garbage from the load
0N/A // therefore, compute npc
0N/A address npc = Assembler::locate_next_instruction(pc);
0N/A
0N/A // request an async exception
0N/A thread->set_pending_unsafe_access_error();
0N/A
0N/A // return address of next instruction to execute
0N/A return npc;
0N/A}
0N/A
0N/Aclass StubGenerator: public StubCodeGenerator {
0N/A private:
0N/A
0N/A#ifdef PRODUCT
0N/A#define inc_counter_np(counter) (0)
0N/A#else
0N/A void inc_counter_np_(int& counter) {
2961N/A // This can destroy rscratch1 if counter is far from the code cache
0N/A __ incrementl(ExternalAddress((address)&counter));
0N/A }
0N/A#define inc_counter_np(counter) \
0N/A BLOCK_COMMENT("inc_counter " #counter); \
0N/A inc_counter_np_(counter);
0N/A#endif
0N/A
0N/A // Call stubs are used to call Java from C
0N/A //
0N/A // Linux Arguments:
0N/A // c_rarg0: call wrapper address address
0N/A // c_rarg1: result address
0N/A // c_rarg2: result type BasicType
0N/A // c_rarg3: method methodOop
0N/A // c_rarg4: (interpreter) entry point address
0N/A // c_rarg5: parameters intptr_t*
0N/A // 16(rbp): parameter size (in words) int
0N/A // 24(rbp): thread Thread*
0N/A //
0N/A // [ return_from_Java ] <--- rsp
0N/A // [ argument word n ]
0N/A // ...
0N/A // -12 [ argument word 1 ]
0N/A // -11 [ saved r15 ] <--- rsp_after_call
0N/A // -10 [ saved r14 ]
0N/A // -9 [ saved r13 ]
0N/A // -8 [ saved r12 ]
0N/A // -7 [ saved rbx ]
0N/A // -6 [ call wrapper ]
0N/A // -5 [ result ]
0N/A // -4 [ result type ]
0N/A // -3 [ method ]
0N/A // -2 [ entry point ]
0N/A // -1 [ parameters ]
0N/A // 0 [ saved rbp ] <--- rbp
0N/A // 1 [ return address ]
0N/A // 2 [ parameter size ]
0N/A // 3 [ thread ]
0N/A //
0N/A // Windows Arguments:
0N/A // c_rarg0: call wrapper address address
0N/A // c_rarg1: result address
0N/A // c_rarg2: result type BasicType
0N/A // c_rarg3: method methodOop
0N/A // 48(rbp): (interpreter) entry point address
0N/A // 56(rbp): parameters intptr_t*
0N/A // 64(rbp): parameter size (in words) int
0N/A // 72(rbp): thread Thread*
0N/A //
0N/A // [ return_from_Java ] <--- rsp
0N/A // [ argument word n ]
0N/A // ...
2254N/A // -28 [ argument word 1 ]
2254N/A // -27 [ saved xmm15 ] <--- rsp_after_call
2254N/A // [ saved xmm7-xmm14 ]
2254N/A // -9 [ saved xmm6 ] (each xmm register takes 2 slots)
2254N/A // -7 [ saved r15 ]
0N/A // -6 [ saved r14 ]
0N/A // -5 [ saved r13 ]
0N/A // -4 [ saved r12 ]
0N/A // -3 [ saved rdi ]
0N/A // -2 [ saved rsi ]
0N/A // -1 [ saved rbx ]
0N/A // 0 [ saved rbp ] <--- rbp
0N/A // 1 [ return address ]
0N/A // 2 [ call wrapper ]
0N/A // 3 [ result ]
0N/A // 4 [ result type ]
0N/A // 5 [ method ]
0N/A // 6 [ entry point ]
0N/A // 7 [ parameters ]
0N/A // 8 [ parameter size ]
0N/A // 9 [ thread ]
0N/A //
0N/A // Windows reserves the callers stack space for arguments 1-4.
0N/A // We spill c_rarg0-c_rarg3 to this space.
0N/A
0N/A // Call stub stack layout word offsets from rbp
0N/A enum call_stub_layout {
0N/A#ifdef _WIN64
2254N/A xmm_save_first = 6, // save from xmm6
2254N/A xmm_save_last = 15, // to xmm15
2254N/A xmm_save_base = -9,
2254N/A rsp_after_call_off = xmm_save_base - 2 * (xmm_save_last - xmm_save_first), // -27
2254N/A r15_off = -7,
0N/A r14_off = -6,
0N/A r13_off = -5,
0N/A r12_off = -4,
0N/A rdi_off = -3,
0N/A rsi_off = -2,
0N/A rbx_off = -1,
0N/A rbp_off = 0,
0N/A retaddr_off = 1,
0N/A call_wrapper_off = 2,
0N/A result_off = 3,
0N/A result_type_off = 4,
0N/A method_off = 5,
0N/A entry_point_off = 6,
0N/A parameters_off = 7,
0N/A parameter_size_off = 8,
0N/A thread_off = 9
0N/A#else
0N/A rsp_after_call_off = -12,
0N/A mxcsr_off = rsp_after_call_off,
0N/A r15_off = -11,
0N/A r14_off = -10,
0N/A r13_off = -9,
0N/A r12_off = -8,
0N/A rbx_off = -7,
0N/A call_wrapper_off = -6,
0N/A result_off = -5,
0N/A result_type_off = -4,
0N/A method_off = -3,
0N/A entry_point_off = -2,
0N/A parameters_off = -1,
0N/A rbp_off = 0,
0N/A retaddr_off = 1,
0N/A parameter_size_off = 2,
0N/A thread_off = 3
0N/A#endif
0N/A };
0N/A
2254N/A#ifdef _WIN64
2254N/A Address xmm_save(int reg) {
2254N/A assert(reg >= xmm_save_first && reg <= xmm_save_last, "XMM register number out of range");
2254N/A return Address(rbp, (xmm_save_base - (reg - xmm_save_first) * 2) * wordSize);
2254N/A }
2254N/A#endif
2254N/A
0N/A address generate_call_stub(address& return_address) {
0N/A assert((int)frame::entry_frame_after_call_words == -(int)rsp_after_call_off + 1 &&
0N/A (int)frame::entry_frame_call_wrapper_offset == (int)call_wrapper_off,
0N/A "adjust this code");
0N/A StubCodeMark mark(this, "StubRoutines", "call_stub");
0N/A address start = __ pc();
0N/A
0N/A // same as in generate_catch_exception()!
0N/A const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
0N/A
0N/A const Address call_wrapper (rbp, call_wrapper_off * wordSize);
0N/A const Address result (rbp, result_off * wordSize);
0N/A const Address result_type (rbp, result_type_off * wordSize);
0N/A const Address method (rbp, method_off * wordSize);
0N/A const Address entry_point (rbp, entry_point_off * wordSize);
0N/A const Address parameters (rbp, parameters_off * wordSize);
0N/A const Address parameter_size(rbp, parameter_size_off * wordSize);
0N/A
0N/A // same as in generate_catch_exception()!
0N/A const Address thread (rbp, thread_off * wordSize);
0N/A
0N/A const Address r15_save(rbp, r15_off * wordSize);
0N/A const Address r14_save(rbp, r14_off * wordSize);
0N/A const Address r13_save(rbp, r13_off * wordSize);
0N/A const Address r12_save(rbp, r12_off * wordSize);
0N/A const Address rbx_save(rbp, rbx_off * wordSize);
0N/A
0N/A // stub code
0N/A __ enter();
304N/A __ subptr(rsp, -rsp_after_call_off * wordSize);
0N/A
0N/A // save register parameters
0N/A#ifndef _WIN64
304N/A __ movptr(parameters, c_rarg5); // parameters
304N/A __ movptr(entry_point, c_rarg4); // entry_point
0N/A#endif
0N/A
304N/A __ movptr(method, c_rarg3); // method
304N/A __ movl(result_type, c_rarg2); // result type
304N/A __ movptr(result, c_rarg1); // result
304N/A __ movptr(call_wrapper, c_rarg0); // call wrapper
0N/A
0N/A // save regs belonging to calling function
304N/A __ movptr(rbx_save, rbx);
304N/A __ movptr(r12_save, r12);
304N/A __ movptr(r13_save, r13);
304N/A __ movptr(r14_save, r14);
304N/A __ movptr(r15_save, r15);
0N/A#ifdef _WIN64
2254N/A for (int i = 6; i <= 15; i++) {
2254N/A __ movdqu(xmm_save(i), as_XMMRegister(i));
2254N/A }
2254N/A
0N/A const Address rdi_save(rbp, rdi_off * wordSize);
0N/A const Address rsi_save(rbp, rsi_off * wordSize);
0N/A
304N/A __ movptr(rsi_save, rsi);
304N/A __ movptr(rdi_save, rdi);
0N/A#else
0N/A const Address mxcsr_save(rbp, mxcsr_off * wordSize);
0N/A {
0N/A Label skip_ldmx;
0N/A __ stmxcsr(mxcsr_save);
0N/A __ movl(rax, mxcsr_save);
0N/A __ andl(rax, MXCSR_MASK); // Only check control and mask bits
304N/A ExternalAddress mxcsr_std(StubRoutines::x86::mxcsr_std());
0N/A __ cmp32(rax, mxcsr_std);
0N/A __ jcc(Assembler::equal, skip_ldmx);
0N/A __ ldmxcsr(mxcsr_std);
0N/A __ bind(skip_ldmx);
0N/A }
0N/A#endif
0N/A
0N/A // Load up thread register
304N/A __ movptr(r15_thread, thread);
113N/A __ reinit_heapbase();
0N/A
0N/A#ifdef ASSERT
0N/A // make sure we have no pending exceptions
0N/A {
0N/A Label L;
304N/A __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
0N/A __ jcc(Assembler::equal, L);
0N/A __ stop("StubRoutines::call_stub: entered with pending exception");
0N/A __ bind(L);
0N/A }
0N/A#endif
0N/A
0N/A // pass parameters if any
0N/A BLOCK_COMMENT("pass parameters if any");
0N/A Label parameters_done;
0N/A __ movl(c_rarg3, parameter_size);
0N/A __ testl(c_rarg3, c_rarg3);
0N/A __ jcc(Assembler::zero, parameters_done);
0N/A
0N/A Label loop;
304N/A __ movptr(c_rarg2, parameters); // parameter pointer
304N/A __ movl(c_rarg1, c_rarg3); // parameter counter is in c_rarg1
0N/A __ BIND(loop);
304N/A __ movptr(rax, Address(c_rarg2, 0));// get parameter
304N/A __ addptr(c_rarg2, wordSize); // advance to next parameter
304N/A __ decrementl(c_rarg1); // decrement counter
304N/A __ push(rax); // pass parameter
0N/A __ jcc(Assembler::notZero, loop);
0N/A
0N/A // call Java function
0N/A __ BIND(parameters_done);
304N/A __ movptr(rbx, method); // get methodOop
304N/A __ movptr(c_rarg1, entry_point); // get entry_point
304N/A __ mov(r13, rsp); // set sender sp
0N/A BLOCK_COMMENT("call Java function");
0N/A __ call(c_rarg1);
0N/A
0N/A BLOCK_COMMENT("call_stub_return_address:");
0N/A return_address = __ pc();
0N/A
0N/A // store result depending on type (everything that is not
0N/A // T_OBJECT, T_LONG, T_FLOAT or T_DOUBLE is treated as T_INT)
304N/A __ movptr(c_rarg0, result);
0N/A Label is_long, is_float, is_double, exit;
0N/A __ movl(c_rarg1, result_type);
0N/A __ cmpl(c_rarg1, T_OBJECT);
0N/A __ jcc(Assembler::equal, is_long);
0N/A __ cmpl(c_rarg1, T_LONG);
0N/A __ jcc(Assembler::equal, is_long);
0N/A __ cmpl(c_rarg1, T_FLOAT);
0N/A __ jcc(Assembler::equal, is_float);
0N/A __ cmpl(c_rarg1, T_DOUBLE);
0N/A __ jcc(Assembler::equal, is_double);
0N/A
0N/A // handle T_INT case
0N/A __ movl(Address(c_rarg0, 0), rax);
0N/A
0N/A __ BIND(exit);
0N/A
0N/A // pop parameters
304N/A __ lea(rsp, rsp_after_call);
0N/A
0N/A#ifdef ASSERT
0N/A // verify that threads correspond
0N/A {
0N/A Label L, S;
304N/A __ cmpptr(r15_thread, thread);
0N/A __ jcc(Assembler::notEqual, S);
0N/A __ get_thread(rbx);
304N/A __ cmpptr(r15_thread, rbx);
0N/A __ jcc(Assembler::equal, L);
0N/A __ bind(S);
0N/A __ jcc(Assembler::equal, L);
0N/A __ stop("StubRoutines::call_stub: threads must correspond");
0N/A __ bind(L);
0N/A }
0N/A#endif
0N/A
0N/A // restore regs belonging to calling function
2254N/A#ifdef _WIN64
2254N/A for (int i = 15; i >= 6; i--) {
2254N/A __ movdqu(as_XMMRegister(i), xmm_save(i));
2254N/A }
2254N/A#endif
304N/A __ movptr(r15, r15_save);
304N/A __ movptr(r14, r14_save);
304N/A __ movptr(r13, r13_save);
304N/A __ movptr(r12, r12_save);
304N/A __ movptr(rbx, rbx_save);
0N/A
0N/A#ifdef _WIN64
304N/A __ movptr(rdi, rdi_save);
304N/A __ movptr(rsi, rsi_save);
0N/A#else
0N/A __ ldmxcsr(mxcsr_save);
0N/A#endif
0N/A
0N/A // restore rsp
304N/A __ addptr(rsp, -rsp_after_call_off * wordSize);
0N/A
0N/A // return
304N/A __ pop(rbp);
0N/A __ ret(0);
0N/A
0N/A // handle return types different from T_INT
0N/A __ BIND(is_long);
0N/A __ movq(Address(c_rarg0, 0), rax);
0N/A __ jmp(exit);
0N/A
0N/A __ BIND(is_float);
0N/A __ movflt(Address(c_rarg0, 0), xmm0);
0N/A __ jmp(exit);
0N/A
0N/A __ BIND(is_double);
0N/A __ movdbl(Address(c_rarg0, 0), xmm0);
0N/A __ jmp(exit);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Return point for a Java call if there's an exception thrown in
0N/A // Java code. The exception is caught and transformed into a
0N/A // pending exception stored in JavaThread that can be tested from
0N/A // within the VM.
0N/A //
0N/A // Note: Usually the parameters are removed by the callee. In case
0N/A // of an exception crossing an activation frame boundary, that is
0N/A // not the case if the callee is compiled code => need to setup the
0N/A // rsp.
0N/A //
0N/A // rax: exception oop
0N/A
0N/A address generate_catch_exception() {
0N/A StubCodeMark mark(this, "StubRoutines", "catch_exception");
0N/A address start = __ pc();
0N/A
0N/A // same as in generate_call_stub():
0N/A const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
0N/A const Address thread (rbp, thread_off * wordSize);
0N/A
0N/A#ifdef ASSERT
0N/A // verify that threads correspond
0N/A {
0N/A Label L, S;
304N/A __ cmpptr(r15_thread, thread);
0N/A __ jcc(Assembler::notEqual, S);
0N/A __ get_thread(rbx);
304N/A __ cmpptr(r15_thread, rbx);
0N/A __ jcc(Assembler::equal, L);
0N/A __ bind(S);
0N/A __ stop("StubRoutines::catch_exception: threads must correspond");
0N/A __ bind(L);
0N/A }
0N/A#endif
0N/A
0N/A // set pending exception
0N/A __ verify_oop(rax);
0N/A
304N/A __ movptr(Address(r15_thread, Thread::pending_exception_offset()), rax);
0N/A __ lea(rscratch1, ExternalAddress((address)__FILE__));
304N/A __ movptr(Address(r15_thread, Thread::exception_file_offset()), rscratch1);
0N/A __ movl(Address(r15_thread, Thread::exception_line_offset()), (int) __LINE__);
0N/A
0N/A // complete return to VM
0N/A assert(StubRoutines::_call_stub_return_address != NULL,
0N/A "_call_stub_return_address must have been generated before");
0N/A __ jump(RuntimeAddress(StubRoutines::_call_stub_return_address));
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Continuation point for runtime calls returning with a pending
0N/A // exception. The pending exception check happened in the runtime
0N/A // or native call stub. The pending exception in Thread is
0N/A // converted into a Java-level exception.
0N/A //
0N/A // Contract with Java-level exception handlers:
0N/A // rax: exception
0N/A // rdx: throwing pc
0N/A //
0N/A // NOTE: At entry of this stub, exception-pc must be on stack !!
0N/A
0N/A address generate_forward_exception() {
0N/A StubCodeMark mark(this, "StubRoutines", "forward exception");
0N/A address start = __ pc();
0N/A
0N/A // Upon entry, the sp points to the return address returning into
0N/A // Java (interpreted or compiled) code; i.e., the return address
0N/A // becomes the throwing pc.
0N/A //
0N/A // Arguments pushed before the runtime call are still on the stack
0N/A // but the exception handler will reset the stack pointer ->
0N/A // ignore them. A potential result in registers can be ignored as
0N/A // well.
0N/A
0N/A#ifdef ASSERT
0N/A // make sure this code is only executed if there is a pending exception
0N/A {
0N/A Label L;
304N/A __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t) NULL);
0N/A __ jcc(Assembler::notEqual, L);
0N/A __ stop("StubRoutines::forward exception: no pending exception (1)");
0N/A __ bind(L);
0N/A }
0N/A#endif
0N/A
0N/A // compute exception handler into rbx
304N/A __ movptr(c_rarg0, Address(rsp, 0));
0N/A BLOCK_COMMENT("call exception_handler_for_return_address");
0N/A __ call_VM_leaf(CAST_FROM_FN_PTR(address,
0N/A SharedRuntime::exception_handler_for_return_address),
1295N/A r15_thread, c_rarg0);
304N/A __ mov(rbx, rax);
0N/A
0N/A // setup rax & rdx, remove return address & clear pending exception
304N/A __ pop(rdx);
304N/A __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
512N/A __ movptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
0N/A
0N/A#ifdef ASSERT
0N/A // make sure exception is set
0N/A {
0N/A Label L;
304N/A __ testptr(rax, rax);
0N/A __ jcc(Assembler::notEqual, L);
0N/A __ stop("StubRoutines::forward exception: no pending exception (2)");
0N/A __ bind(L);
0N/A }
0N/A#endif
0N/A
0N/A // continue at exception handler (return address removed)
0N/A // rax: exception
0N/A // rbx: exception handler
0N/A // rdx: throwing pc
0N/A __ verify_oop(rax);
0N/A __ jmp(rbx);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Support for jint atomic::xchg(jint exchange_value, volatile jint* dest)
0N/A //
0N/A // Arguments :
0N/A // c_rarg0: exchange_value
0N/A // c_rarg0: dest
0N/A //
0N/A // Result:
0N/A // *dest <- ex, return (orig *dest)
0N/A address generate_atomic_xchg() {
0N/A StubCodeMark mark(this, "StubRoutines", "atomic_xchg");
0N/A address start = __ pc();
0N/A
0N/A __ movl(rax, c_rarg0); // Copy to eax we need a return value anyhow
0N/A __ xchgl(rax, Address(c_rarg1, 0)); // automatic LOCK
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Support for intptr_t atomic::xchg_ptr(intptr_t exchange_value, volatile intptr_t* dest)
0N/A //
0N/A // Arguments :
0N/A // c_rarg0: exchange_value
0N/A // c_rarg1: dest
0N/A //
0N/A // Result:
0N/A // *dest <- ex, return (orig *dest)
0N/A address generate_atomic_xchg_ptr() {
0N/A StubCodeMark mark(this, "StubRoutines", "atomic_xchg_ptr");
0N/A address start = __ pc();
0N/A
304N/A __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
304N/A __ xchgptr(rax, Address(c_rarg1, 0)); // automatic LOCK
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Support for jint atomic::atomic_cmpxchg(jint exchange_value, volatile jint* dest,
0N/A // jint compare_value)
0N/A //
0N/A // Arguments :
0N/A // c_rarg0: exchange_value
0N/A // c_rarg1: dest
0N/A // c_rarg2: compare_value
0N/A //
0N/A // Result:
0N/A // if ( compare_value == *dest ) {
0N/A // *dest = exchange_value
0N/A // return compare_value;
0N/A // else
0N/A // return *dest;
0N/A address generate_atomic_cmpxchg() {
0N/A StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg");
0N/A address start = __ pc();
0N/A
0N/A __ movl(rax, c_rarg2);
0N/A if ( os::is_MP() ) __ lock();
0N/A __ cmpxchgl(c_rarg0, Address(c_rarg1, 0));
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Support for jint atomic::atomic_cmpxchg_long(jlong exchange_value,
0N/A // volatile jlong* dest,
0N/A // jlong compare_value)
0N/A // Arguments :
0N/A // c_rarg0: exchange_value
0N/A // c_rarg1: dest
0N/A // c_rarg2: compare_value
0N/A //
0N/A // Result:
0N/A // if ( compare_value == *dest ) {
0N/A // *dest = exchange_value
0N/A // return compare_value;
0N/A // else
0N/A // return *dest;
0N/A address generate_atomic_cmpxchg_long() {
0N/A StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_long");
0N/A address start = __ pc();
0N/A
0N/A __ movq(rax, c_rarg2);
0N/A if ( os::is_MP() ) __ lock();
0N/A __ cmpxchgq(c_rarg0, Address(c_rarg1, 0));
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Support for jint atomic::add(jint add_value, volatile jint* dest)
0N/A //
0N/A // Arguments :
0N/A // c_rarg0: add_value
0N/A // c_rarg1: dest
0N/A //
0N/A // Result:
0N/A // *dest += add_value
0N/A // return *dest;
0N/A address generate_atomic_add() {
0N/A StubCodeMark mark(this, "StubRoutines", "atomic_add");
0N/A address start = __ pc();
0N/A
0N/A __ movl(rax, c_rarg0);
0N/A if ( os::is_MP() ) __ lock();
0N/A __ xaddl(Address(c_rarg1, 0), c_rarg0);
0N/A __ addl(rax, c_rarg0);
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Support for intptr_t atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest)
0N/A //
0N/A // Arguments :
0N/A // c_rarg0: add_value
0N/A // c_rarg1: dest
0N/A //
0N/A // Result:
0N/A // *dest += add_value
0N/A // return *dest;
0N/A address generate_atomic_add_ptr() {
0N/A StubCodeMark mark(this, "StubRoutines", "atomic_add_ptr");
0N/A address start = __ pc();
0N/A
304N/A __ movptr(rax, c_rarg0); // Copy to eax we need a return value anyhow
0N/A if ( os::is_MP() ) __ lock();
304N/A __ xaddptr(Address(c_rarg1, 0), c_rarg0);
304N/A __ addptr(rax, c_rarg0);
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Support for intptr_t OrderAccess::fence()
0N/A //
0N/A // Arguments :
0N/A //
0N/A // Result:
0N/A address generate_orderaccess_fence() {
0N/A StubCodeMark mark(this, "StubRoutines", "orderaccess_fence");
0N/A address start = __ pc();
671N/A __ membar(Assembler::StoreLoad);
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Support for intptr_t get_previous_fp()
0N/A //
0N/A // This routine is used to find the previous frame pointer for the
0N/A // caller (current_frame_guess). This is used as part of debugging
0N/A // ps() is seemingly lost trying to find frames.
0N/A // This code assumes that caller current_frame_guess) has a frame.
0N/A address generate_get_previous_fp() {
0N/A StubCodeMark mark(this, "StubRoutines", "get_previous_fp");
0N/A const Address old_fp(rbp, 0);
0N/A const Address older_fp(rax, 0);
0N/A address start = __ pc();
0N/A
0N/A __ enter();
304N/A __ movptr(rax, old_fp); // callers fp
304N/A __ movptr(rax, older_fp); // the frame for ps()
304N/A __ pop(rbp);
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
3574N/A // Support for intptr_t get_previous_sp()
3574N/A //
3574N/A // This routine is used to find the previous stack pointer for the
3574N/A // caller.
3574N/A address generate_get_previous_sp() {
3574N/A StubCodeMark mark(this, "StubRoutines", "get_previous_sp");
3574N/A address start = __ pc();
3574N/A
3574N/A __ movptr(rax, rsp);
3574N/A __ addptr(rax, 8); // return address is at the top of the stack.
3574N/A __ ret(0);
3574N/A
3574N/A return start;
3574N/A }
3574N/A
0N/A //----------------------------------------------------------------------------------------------------
0N/A // Support for void verify_mxcsr()
0N/A //
0N/A // This routine is used with -Xcheck:jni to verify that native
0N/A // JNI code does not return to Java code without restoring the
0N/A // MXCSR register to our expected state.
0N/A
0N/A address generate_verify_mxcsr() {
0N/A StubCodeMark mark(this, "StubRoutines", "verify_mxcsr");
0N/A address start = __ pc();
0N/A
0N/A const Address mxcsr_save(rsp, 0);
0N/A
0N/A if (CheckJNICalls) {
0N/A Label ok_ret;
304N/A __ push(rax);
304N/A __ subptr(rsp, wordSize); // allocate a temp location
0N/A __ stmxcsr(mxcsr_save);
0N/A __ movl(rax, mxcsr_save);
0N/A __ andl(rax, MXCSR_MASK); // Only check control and mask bits
304N/A __ cmpl(rax, *(int *)(StubRoutines::x86::mxcsr_std()));
0N/A __ jcc(Assembler::equal, ok_ret);
0N/A
0N/A __ warn("MXCSR changed by native JNI code, use -XX:+RestoreMXCSROnJNICall");
0N/A
304N/A __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std()));
0N/A
0N/A __ bind(ok_ret);
304N/A __ addptr(rsp, wordSize);
304N/A __ pop(rax);
0N/A }
0N/A
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A address generate_f2i_fixup() {
0N/A StubCodeMark mark(this, "StubRoutines", "f2i_fixup");
0N/A Address inout(rsp, 5 * wordSize); // return address + 4 saves
0N/A
0N/A address start = __ pc();
0N/A
0N/A Label L;
0N/A
304N/A __ push(rax);
304N/A __ push(c_rarg3);
304N/A __ push(c_rarg2);
304N/A __ push(c_rarg1);
0N/A
0N/A __ movl(rax, 0x7f800000);
0N/A __ xorl(c_rarg3, c_rarg3);
0N/A __ movl(c_rarg2, inout);
0N/A __ movl(c_rarg1, c_rarg2);
0N/A __ andl(c_rarg1, 0x7fffffff);
0N/A __ cmpl(rax, c_rarg1); // NaN? -> 0
0N/A __ jcc(Assembler::negative, L);
0N/A __ testl(c_rarg2, c_rarg2); // signed ? min_jint : max_jint
0N/A __ movl(c_rarg3, 0x80000000);
0N/A __ movl(rax, 0x7fffffff);
0N/A __ cmovl(Assembler::positive, c_rarg3, rax);
0N/A
0N/A __ bind(L);
304N/A __ movptr(inout, c_rarg3);
304N/A
304N/A __ pop(c_rarg1);
304N/A __ pop(c_rarg2);
304N/A __ pop(c_rarg3);
304N/A __ pop(rax);
0N/A
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A address generate_f2l_fixup() {
0N/A StubCodeMark mark(this, "StubRoutines", "f2l_fixup");
0N/A Address inout(rsp, 5 * wordSize); // return address + 4 saves
0N/A address start = __ pc();
0N/A
0N/A Label L;
0N/A
304N/A __ push(rax);
304N/A __ push(c_rarg3);
304N/A __ push(c_rarg2);
304N/A __ push(c_rarg1);
0N/A
0N/A __ movl(rax, 0x7f800000);
0N/A __ xorl(c_rarg3, c_rarg3);
0N/A __ movl(c_rarg2, inout);
0N/A __ movl(c_rarg1, c_rarg2);
0N/A __ andl(c_rarg1, 0x7fffffff);
0N/A __ cmpl(rax, c_rarg1); // NaN? -> 0
0N/A __ jcc(Assembler::negative, L);
0N/A __ testl(c_rarg2, c_rarg2); // signed ? min_jlong : max_jlong
0N/A __ mov64(c_rarg3, 0x8000000000000000);
0N/A __ mov64(rax, 0x7fffffffffffffff);
304N/A __ cmov(Assembler::positive, c_rarg3, rax);
0N/A
0N/A __ bind(L);
304N/A __ movptr(inout, c_rarg3);
304N/A
304N/A __ pop(c_rarg1);
304N/A __ pop(c_rarg2);
304N/A __ pop(c_rarg3);
304N/A __ pop(rax);
0N/A
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A address generate_d2i_fixup() {
0N/A StubCodeMark mark(this, "StubRoutines", "d2i_fixup");
0N/A Address inout(rsp, 6 * wordSize); // return address + 5 saves
0N/A
0N/A address start = __ pc();
0N/A
0N/A Label L;
0N/A
304N/A __ push(rax);
304N/A __ push(c_rarg3);
304N/A __ push(c_rarg2);
304N/A __ push(c_rarg1);
304N/A __ push(c_rarg0);
0N/A
0N/A __ movl(rax, 0x7ff00000);
0N/A __ movq(c_rarg2, inout);
0N/A __ movl(c_rarg3, c_rarg2);
304N/A __ mov(c_rarg1, c_rarg2);
304N/A __ mov(c_rarg0, c_rarg2);
0N/A __ negl(c_rarg3);
304N/A __ shrptr(c_rarg1, 0x20);
0N/A __ orl(c_rarg3, c_rarg2);
0N/A __ andl(c_rarg1, 0x7fffffff);
0N/A __ xorl(c_rarg2, c_rarg2);
0N/A __ shrl(c_rarg3, 0x1f);
0N/A __ orl(c_rarg1, c_rarg3);
0N/A __ cmpl(rax, c_rarg1);
0N/A __ jcc(Assembler::negative, L); // NaN -> 0
304N/A __ testptr(c_rarg0, c_rarg0); // signed ? min_jint : max_jint
0N/A __ movl(c_rarg2, 0x80000000);
0N/A __ movl(rax, 0x7fffffff);
304N/A __ cmov(Assembler::positive, c_rarg2, rax);
0N/A
0N/A __ bind(L);
304N/A __ movptr(inout, c_rarg2);
304N/A
304N/A __ pop(c_rarg0);
304N/A __ pop(c_rarg1);
304N/A __ pop(c_rarg2);
304N/A __ pop(c_rarg3);
304N/A __ pop(rax);
0N/A
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A address generate_d2l_fixup() {
0N/A StubCodeMark mark(this, "StubRoutines", "d2l_fixup");
0N/A Address inout(rsp, 6 * wordSize); // return address + 5 saves
0N/A
0N/A address start = __ pc();
0N/A
0N/A Label L;
0N/A
304N/A __ push(rax);
304N/A __ push(c_rarg3);
304N/A __ push(c_rarg2);
304N/A __ push(c_rarg1);
304N/A __ push(c_rarg0);
0N/A
0N/A __ movl(rax, 0x7ff00000);
0N/A __ movq(c_rarg2, inout);
0N/A __ movl(c_rarg3, c_rarg2);
304N/A __ mov(c_rarg1, c_rarg2);
304N/A __ mov(c_rarg0, c_rarg2);
0N/A __ negl(c_rarg3);
304N/A __ shrptr(c_rarg1, 0x20);
0N/A __ orl(c_rarg3, c_rarg2);
0N/A __ andl(c_rarg1, 0x7fffffff);
0N/A __ xorl(c_rarg2, c_rarg2);
0N/A __ shrl(c_rarg3, 0x1f);
0N/A __ orl(c_rarg1, c_rarg3);
0N/A __ cmpl(rax, c_rarg1);
0N/A __ jcc(Assembler::negative, L); // NaN -> 0
0N/A __ testq(c_rarg0, c_rarg0); // signed ? min_jlong : max_jlong
0N/A __ mov64(c_rarg2, 0x8000000000000000);
0N/A __ mov64(rax, 0x7fffffffffffffff);
0N/A __ cmovq(Assembler::positive, c_rarg2, rax);
0N/A
0N/A __ bind(L);
0N/A __ movq(inout, c_rarg2);
0N/A
304N/A __ pop(c_rarg0);
304N/A __ pop(c_rarg1);
304N/A __ pop(c_rarg2);
304N/A __ pop(c_rarg3);
304N/A __ pop(rax);
0N/A
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A address generate_fp_mask(const char *stub_name, int64_t mask) {
1365N/A __ align(CodeEntryAlignment);
0N/A StubCodeMark mark(this, "StubRoutines", stub_name);
0N/A address start = __ pc();
0N/A
0N/A __ emit_data64( mask, relocInfo::none );
0N/A __ emit_data64( mask, relocInfo::none );
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // The following routine generates a subroutine to throw an
0N/A // asynchronous UnknownError when an unsafe access gets a fault that
0N/A // could not be reasonably prevented by the programmer. (Example:
0N/A // SIGBUS/OBJERR.)
0N/A address generate_handler_for_unsafe_access() {
0N/A StubCodeMark mark(this, "StubRoutines", "handler_for_unsafe_access");
0N/A address start = __ pc();
0N/A
304N/A __ push(0); // hole for return address-to-be
304N/A __ pusha(); // push registers
0N/A Address next_pc(rsp, RegisterImpl::number_of_registers * BytesPerWord);
0N/A
2770N/A // FIXME: this probably needs alignment logic
2770N/A
304N/A __ subptr(rsp, frame::arg_reg_save_area_bytes);
0N/A BLOCK_COMMENT("call handle_unsafe_access");
0N/A __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, handle_unsafe_access)));
304N/A __ addptr(rsp, frame::arg_reg_save_area_bytes);
304N/A
304N/A __ movptr(next_pc, rax); // stuff next address
304N/A __ popa();
0N/A __ ret(0); // jump to next address
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Non-destructive plausibility checks for oops
0N/A //
0N/A // Arguments:
0N/A // all args on stack!
0N/A //
0N/A // Stack after saving c_rarg3:
0N/A // [tos + 0]: saved c_rarg3
0N/A // [tos + 1]: saved c_rarg2
124N/A // [tos + 2]: saved r12 (several TemplateTable methods use it)
124N/A // [tos + 3]: saved flags
124N/A // [tos + 4]: return address
124N/A // * [tos + 5]: error message (char*)
124N/A // * [tos + 6]: object to verify (oop)
124N/A // * [tos + 7]: saved rax - saved by caller and bashed
1503N/A // * [tos + 8]: saved r10 (rscratch1) - saved by caller
0N/A // * = popped on exit
0N/A address generate_verify_oop() {
0N/A StubCodeMark mark(this, "StubRoutines", "verify_oop");
0N/A address start = __ pc();
0N/A
0N/A Label exit, error;
0N/A
304N/A __ pushf();
0N/A __ incrementl(ExternalAddress((address) StubRoutines::verify_oop_count_addr()));
0N/A
304N/A __ push(r12);
124N/A
0N/A // save c_rarg2 and c_rarg3
304N/A __ push(c_rarg2);
304N/A __ push(c_rarg3);
0N/A
124N/A enum {
124N/A // After previous pushes.
124N/A oop_to_verify = 6 * wordSize,
124N/A saved_rax = 7 * wordSize,
1503N/A saved_r10 = 8 * wordSize,
124N/A
124N/A // Before the call to MacroAssembler::debug(), see below.
124N/A return_addr = 16 * wordSize,
124N/A error_msg = 17 * wordSize
124N/A };
124N/A
0N/A // get object
304N/A __ movptr(rax, Address(rsp, oop_to_verify));
0N/A
0N/A // make sure object is 'reasonable'
304N/A __ testptr(rax, rax);
0N/A __ jcc(Assembler::zero, exit); // if obj is NULL it is OK
0N/A // Check if the oop is in the right area of memory
304N/A __ movptr(c_rarg2, rax);
512N/A __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_mask());
304N/A __ andptr(c_rarg2, c_rarg3);
512N/A __ movptr(c_rarg3, (intptr_t) Universe::verify_oop_bits());
304N/A __ cmpptr(c_rarg2, c_rarg3);
0N/A __ jcc(Assembler::notZero, error);
0N/A
124N/A // set r12 to heapbase for load_klass()
124N/A __ reinit_heapbase();
124N/A
0N/A // make sure klass is 'reasonable'
113N/A __ load_klass(rax, rax); // get klass
304N/A __ testptr(rax, rax);
0N/A __ jcc(Assembler::zero, error); // if klass is NULL it is broken
0N/A // Check if the klass is in the right area of memory
304N/A __ mov(c_rarg2, rax);
512N/A __ movptr(c_rarg3, (intptr_t) Universe::verify_klass_mask());
304N/A __ andptr(c_rarg2, c_rarg3);
512N/A __ movptr(c_rarg3, (intptr_t) Universe::verify_klass_bits());
304N/A __ cmpptr(c_rarg2, c_rarg3);
0N/A __ jcc(Assembler::notZero, error);
0N/A
0N/A // make sure klass' klass is 'reasonable'
113N/A __ load_klass(rax, rax);
304N/A __ testptr(rax, rax);
0N/A __ jcc(Assembler::zero, error); // if klass' klass is NULL it is broken
0N/A // Check if the klass' klass is in the right area of memory
512N/A __ movptr(c_rarg3, (intptr_t) Universe::verify_klass_mask());
304N/A __ andptr(rax, c_rarg3);
512N/A __ movptr(c_rarg3, (intptr_t) Universe::verify_klass_bits());
304N/A __ cmpptr(rax, c_rarg3);
0N/A __ jcc(Assembler::notZero, error);
0N/A
0N/A // return if everything seems ok
0N/A __ bind(exit);
304N/A __ movptr(rax, Address(rsp, saved_rax)); // get saved rax back
1503N/A __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
304N/A __ pop(c_rarg3); // restore c_rarg3
304N/A __ pop(c_rarg2); // restore c_rarg2
304N/A __ pop(r12); // restore r12
304N/A __ popf(); // restore flags
1503N/A __ ret(4 * wordSize); // pop caller saved stuff
0N/A
0N/A // handle errors
0N/A __ bind(error);
304N/A __ movptr(rax, Address(rsp, saved_rax)); // get saved rax back
1503N/A __ movptr(rscratch1, Address(rsp, saved_r10)); // get saved r10 back
304N/A __ pop(c_rarg3); // get saved c_rarg3 back
304N/A __ pop(c_rarg2); // get saved c_rarg2 back
304N/A __ pop(r12); // get saved r12 back
304N/A __ popf(); // get saved flags off stack --
0N/A // will be ignored
0N/A
304N/A __ pusha(); // push registers
0N/A // (rip is already
0N/A // already pushed)
124N/A // debug(char* msg, int64_t pc, int64_t regs[])
0N/A // We've popped the registers we'd saved (c_rarg3, c_rarg2 and flags), and
0N/A // pushed all the registers, so now the stack looks like:
0N/A // [tos + 0] 16 saved registers
0N/A // [tos + 16] return address
124N/A // * [tos + 17] error message (char*)
124N/A // * [tos + 18] object to verify (oop)
124N/A // * [tos + 19] saved rax - saved by caller and bashed
1503N/A // * [tos + 20] saved r10 (rscratch1) - saved by caller
124N/A // * = popped on exit
124N/A
304N/A __ movptr(c_rarg0, Address(rsp, error_msg)); // pass address of error message
304N/A __ movptr(c_rarg1, Address(rsp, return_addr)); // pass return address
304N/A __ movq(c_rarg2, rsp); // pass address of regs on stack
304N/A __ mov(r12, rsp); // remember rsp
304N/A __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
304N/A __ andptr(rsp, -16); // align stack as required by ABI
0N/A BLOCK_COMMENT("call MacroAssembler::debug");
304N/A __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug64)));
304N/A __ mov(rsp, r12); // restore rsp
304N/A __ popa(); // pop registers (includes r12)
1503N/A __ ret(4 * wordSize); // pop caller saved stuff
0N/A
0N/A return start;
0N/A }
0N/A
0N/A //
0N/A // Verify that a register contains clean 32-bits positive value
0N/A // (high 32-bits are 0) so it could be used in 64-bits shifts.
0N/A //
0N/A // Input:
0N/A // Rint - 32-bits value
0N/A // Rtmp - scratch
0N/A //
0N/A void assert_clean_int(Register Rint, Register Rtmp) {
0N/A#ifdef ASSERT
0N/A Label L;
0N/A assert_different_registers(Rtmp, Rint);
0N/A __ movslq(Rtmp, Rint);
0N/A __ cmpq(Rtmp, Rint);
124N/A __ jcc(Assembler::equal, L);
0N/A __ stop("high 32-bits of int value are not 0");
0N/A __ bind(L);
0N/A#endif
0N/A }
0N/A
0N/A // Generate overlap test for array copy stubs
0N/A //
0N/A // Input:
0N/A // c_rarg0 - from
0N/A // c_rarg1 - to
0N/A // c_rarg2 - element count
0N/A //
0N/A // Output:
0N/A // rax - &from[element count - 1]
0N/A //
0N/A void array_overlap_test(address no_overlap_target, Address::ScaleFactor sf) {
0N/A assert(no_overlap_target != NULL, "must be generated");
0N/A array_overlap_test(no_overlap_target, NULL, sf);
0N/A }
0N/A void array_overlap_test(Label& L_no_overlap, Address::ScaleFactor sf) {
0N/A array_overlap_test(NULL, &L_no_overlap, sf);
0N/A }
0N/A void array_overlap_test(address no_overlap_target, Label* NOLp, Address::ScaleFactor sf) {
0N/A const Register from = c_rarg0;
0N/A const Register to = c_rarg1;
0N/A const Register count = c_rarg2;
0N/A const Register end_from = rax;
0N/A
304N/A __ cmpptr(to, from);
304N/A __ lea(end_from, Address(from, count, sf, 0));
0N/A if (NOLp == NULL) {
0N/A ExternalAddress no_overlap(no_overlap_target);
0N/A __ jump_cc(Assembler::belowEqual, no_overlap);
304N/A __ cmpptr(to, end_from);
0N/A __ jump_cc(Assembler::aboveEqual, no_overlap);
0N/A } else {
0N/A __ jcc(Assembler::belowEqual, (*NOLp));
304N/A __ cmpptr(to, end_from);
0N/A __ jcc(Assembler::aboveEqual, (*NOLp));
0N/A }
0N/A }
0N/A
0N/A // Shuffle first three arg regs on Windows into Linux/Solaris locations.
0N/A //
0N/A // Outputs:
0N/A // rdi - rcx
0N/A // rsi - rdx
0N/A // rdx - r8
0N/A // rcx - r9
0N/A //
0N/A // Registers r9 and r10 are used to save rdi and rsi on Windows, which latter
0N/A // are non-volatile. r9 and r10 should not be used by the caller.
0N/A //
0N/A void setup_arg_regs(int nargs = 3) {
0N/A const Register saved_rdi = r9;
0N/A const Register saved_rsi = r10;
0N/A assert(nargs == 3 || nargs == 4, "else fix");
0N/A#ifdef _WIN64
0N/A assert(c_rarg0 == rcx && c_rarg1 == rdx && c_rarg2 == r8 && c_rarg3 == r9,
0N/A "unexpected argument registers");
0N/A if (nargs >= 4)
304N/A __ mov(rax, r9); // r9 is also saved_rdi
304N/A __ movptr(saved_rdi, rdi);
304N/A __ movptr(saved_rsi, rsi);
304N/A __ mov(rdi, rcx); // c_rarg0
304N/A __ mov(rsi, rdx); // c_rarg1
304N/A __ mov(rdx, r8); // c_rarg2
0N/A if (nargs >= 4)
304N/A __ mov(rcx, rax); // c_rarg3 (via rax)
0N/A#else
0N/A assert(c_rarg0 == rdi && c_rarg1 == rsi && c_rarg2 == rdx && c_rarg3 == rcx,
0N/A "unexpected argument registers");
0N/A#endif
0N/A }
0N/A
0N/A void restore_arg_regs() {
0N/A const Register saved_rdi = r9;
0N/A const Register saved_rsi = r10;
0N/A#ifdef _WIN64
304N/A __ movptr(rdi, saved_rdi);
304N/A __ movptr(rsi, saved_rsi);
0N/A#endif
0N/A }
0N/A
0N/A // Generate code for an array write pre barrier
0N/A //
0N/A // addr - starting address
2171N/A // count - element count
2171N/A // tmp - scratch register
0N/A //
0N/A // Destroy no registers!
0N/A //
2171N/A void gen_write_ref_array_pre_barrier(Register addr, Register count, bool dest_uninitialized) {
0N/A BarrierSet* bs = Universe::heap()->barrier_set();
0N/A switch (bs->kind()) {
0N/A case BarrierSet::G1SATBCT:
0N/A case BarrierSet::G1SATBCTLogging:
2171N/A // With G1, don't generate the call if we statically know that the target in uninitialized
2171N/A if (!dest_uninitialized) {
2171N/A __ pusha(); // push registers
2171N/A if (count == c_rarg0) {
2171N/A if (addr == c_rarg1) {
2171N/A // exactly backwards!!
2171N/A __ xchgptr(c_rarg1, c_rarg0);
2171N/A } else {
2171N/A __ movptr(c_rarg1, count);
2171N/A __ movptr(c_rarg0, addr);
2171N/A }
2171N/A } else {
2171N/A __ movptr(c_rarg0, addr);
2171N/A __ movptr(c_rarg1, count);
2171N/A }
2171N/A __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_pre), 2);
2171N/A __ popa();
0N/A }
2171N/A break;
0N/A case BarrierSet::CardTableModRef:
0N/A case BarrierSet::CardTableExtension:
0N/A case BarrierSet::ModRef:
0N/A break;
342N/A default:
0N/A ShouldNotReachHere();
0N/A
0N/A }
0N/A }
0N/A
0N/A //
0N/A // Generate code for an array write post barrier
0N/A //
0N/A // Input:
0N/A // start - register containing starting address of destination array
4534N/A // count - elements count
0N/A // scratch - scratch register
0N/A //
0N/A // The input registers are overwritten.
4534N/A //
4534N/A void gen_write_ref_array_post_barrier(Register start, Register count, Register scratch) {
4534N/A assert_different_registers(start, count, scratch);
0N/A BarrierSet* bs = Universe::heap()->barrier_set();
0N/A switch (bs->kind()) {
0N/A case BarrierSet::G1SATBCT:
0N/A case BarrierSet::G1SATBCTLogging:
0N/A {
4534N/A __ pusha(); // push registers (overkill)
4534N/A if (c_rarg0 == count) { // On win64 c_rarg0 == rcx
4534N/A assert_different_registers(c_rarg1, start);
4534N/A __ mov(c_rarg1, count);
4534N/A __ mov(c_rarg0, start);
4534N/A } else {
4534N/A assert_different_registers(c_rarg0, count);
4534N/A __ mov(c_rarg0, start);
4534N/A __ mov(c_rarg1, count);
4534N/A }
1192N/A __ call_VM_leaf(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post), 2);
304N/A __ popa();
0N/A }
0N/A break;
0N/A case BarrierSet::CardTableModRef:
0N/A case BarrierSet::CardTableExtension:
0N/A {
0N/A CardTableModRefBS* ct = (CardTableModRefBS*)bs;
0N/A assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
0N/A
0N/A Label L_loop;
4534N/A const Register end = count;
4534N/A
4534N/A __ leaq(end, Address(start, count, TIMES_OOP, 0)); // end == start+count*oop_size
4534N/A __ subptr(end, BytesPerHeapOop); // end - 1 to make inclusive
4534N/A __ shrptr(start, CardTableModRefBS::card_shift);
4534N/A __ shrptr(end, CardTableModRefBS::card_shift);
4534N/A __ subptr(end, start); // end --> cards count
4534N/A
4534N/A int64_t disp = (int64_t) ct->byte_map_base;
4534N/A __ mov64(scratch, disp);
304N/A __ addptr(start, scratch);
0N/A __ BIND(L_loop);
0N/A __ movb(Address(start, count, Address::times_1), 0);
304N/A __ decrement(count);
0N/A __ jcc(Assembler::greaterEqual, L_loop);
0N/A }
342N/A break;
342N/A default:
342N/A ShouldNotReachHere();
342N/A
342N/A }
342N/A }
0N/A
405N/A
0N/A // Copy big chunks forward
0N/A //
0N/A // Inputs:
0N/A // end_from - source arrays end address
0N/A // end_to - destination array end address
0N/A // qword_count - 64-bits element count, negative
0N/A // to - scratch
4134N/A // L_copy_bytes - entry label
0N/A // L_copy_8_bytes - exit label
0N/A //
4134N/A void copy_bytes_forward(Register end_from, Register end_to,
0N/A Register qword_count, Register to,
4134N/A Label& L_copy_bytes, Label& L_copy_8_bytes) {
0N/A DEBUG_ONLY(__ stop("enter at entry label, not here"));
0N/A Label L_loop;
1365N/A __ align(OptoLoopAlignment);
4134N/A if (UseUnalignedLoadStores) {
4134N/A Label L_end;
4134N/A // Copy 64-bytes per iteration
4134N/A __ BIND(L_loop);
4134N/A if (UseAVX >= 2) {
4134N/A __ vmovdqu(xmm0, Address(end_from, qword_count, Address::times_8, -56));
4134N/A __ vmovdqu(Address(end_to, qword_count, Address::times_8, -56), xmm0);
4134N/A __ vmovdqu(xmm1, Address(end_from, qword_count, Address::times_8, -24));
4134N/A __ vmovdqu(Address(end_to, qword_count, Address::times_8, -24), xmm1);
4134N/A } else {
4134N/A __ movdqu(xmm0, Address(end_from, qword_count, Address::times_8, -56));
4134N/A __ movdqu(Address(end_to, qword_count, Address::times_8, -56), xmm0);
4134N/A __ movdqu(xmm1, Address(end_from, qword_count, Address::times_8, -40));
4134N/A __ movdqu(Address(end_to, qword_count, Address::times_8, -40), xmm1);
4134N/A __ movdqu(xmm2, Address(end_from, qword_count, Address::times_8, -24));
4134N/A __ movdqu(Address(end_to, qword_count, Address::times_8, -24), xmm2);
4134N/A __ movdqu(xmm3, Address(end_from, qword_count, Address::times_8, - 8));
4134N/A __ movdqu(Address(end_to, qword_count, Address::times_8, - 8), xmm3);
4134N/A }
4134N/A __ BIND(L_copy_bytes);
4134N/A __ addptr(qword_count, 8);
4134N/A __ jcc(Assembler::lessEqual, L_loop);
4134N/A __ subptr(qword_count, 4); // sub(8) and add(4)
4134N/A __ jccb(Assembler::greater, L_end);
4134N/A // Copy trailing 32 bytes
4134N/A if (UseAVX >= 2) {
4134N/A __ vmovdqu(xmm0, Address(end_from, qword_count, Address::times_8, -24));
4134N/A __ vmovdqu(Address(end_to, qword_count, Address::times_8, -24), xmm0);
4134N/A } else {
4134N/A __ movdqu(xmm0, Address(end_from, qword_count, Address::times_8, -24));
4134N/A __ movdqu(Address(end_to, qword_count, Address::times_8, -24), xmm0);
4134N/A __ movdqu(xmm1, Address(end_from, qword_count, Address::times_8, - 8));
4134N/A __ movdqu(Address(end_to, qword_count, Address::times_8, - 8), xmm1);
4134N/A }
4134N/A __ addptr(qword_count, 4);
4134N/A __ BIND(L_end);
4442N/A if (UseAVX >= 2) {
4442N/A // clean upper bits of YMM registers
4442N/A __ vzeroupper();
4442N/A }
405N/A } else {
4134N/A // Copy 32-bytes per iteration
4134N/A __ BIND(L_loop);
405N/A __ movq(to, Address(end_from, qword_count, Address::times_8, -24));
405N/A __ movq(Address(end_to, qword_count, Address::times_8, -24), to);
405N/A __ movq(to, Address(end_from, qword_count, Address::times_8, -16));
405N/A __ movq(Address(end_to, qword_count, Address::times_8, -16), to);
405N/A __ movq(to, Address(end_from, qword_count, Address::times_8, - 8));
405N/A __ movq(Address(end_to, qword_count, Address::times_8, - 8), to);
405N/A __ movq(to, Address(end_from, qword_count, Address::times_8, - 0));
405N/A __ movq(Address(end_to, qword_count, Address::times_8, - 0), to);
4134N/A
4134N/A __ BIND(L_copy_bytes);
4134N/A __ addptr(qword_count, 4);
4134N/A __ jcc(Assembler::lessEqual, L_loop);
405N/A }
304N/A __ subptr(qword_count, 4);
0N/A __ jcc(Assembler::less, L_copy_8_bytes); // Copy trailing qwords
0N/A }
0N/A
0N/A // Copy big chunks backward
0N/A //
0N/A // Inputs:
0N/A // from - source arrays address
0N/A // dest - destination array address
0N/A // qword_count - 64-bits element count
0N/A // to - scratch
4134N/A // L_copy_bytes - entry label
0N/A // L_copy_8_bytes - exit label
0N/A //
4134N/A void copy_bytes_backward(Register from, Register dest,
0N/A Register qword_count, Register to,
4134N/A Label& L_copy_bytes, Label& L_copy_8_bytes) {
0N/A DEBUG_ONLY(__ stop("enter at entry label, not here"));
0N/A Label L_loop;
1365N/A __ align(OptoLoopAlignment);
4134N/A if (UseUnalignedLoadStores) {
4134N/A Label L_end;
4134N/A // Copy 64-bytes per iteration
4134N/A __ BIND(L_loop);
4134N/A if (UseAVX >= 2) {
4134N/A __ vmovdqu(xmm0, Address(from, qword_count, Address::times_8, 32));
4134N/A __ vmovdqu(Address(dest, qword_count, Address::times_8, 32), xmm0);
4134N/A __ vmovdqu(xmm1, Address(from, qword_count, Address::times_8, 0));
4134N/A __ vmovdqu(Address(dest, qword_count, Address::times_8, 0), xmm1);
4134N/A } else {
4134N/A __ movdqu(xmm0, Address(from, qword_count, Address::times_8, 48));
4134N/A __ movdqu(Address(dest, qword_count, Address::times_8, 48), xmm0);
4134N/A __ movdqu(xmm1, Address(from, qword_count, Address::times_8, 32));
4134N/A __ movdqu(Address(dest, qword_count, Address::times_8, 32), xmm1);
4134N/A __ movdqu(xmm2, Address(from, qword_count, Address::times_8, 16));
4134N/A __ movdqu(Address(dest, qword_count, Address::times_8, 16), xmm2);
4134N/A __ movdqu(xmm3, Address(from, qword_count, Address::times_8, 0));
4134N/A __ movdqu(Address(dest, qword_count, Address::times_8, 0), xmm3);
4134N/A }
4134N/A __ BIND(L_copy_bytes);
4134N/A __ subptr(qword_count, 8);
4134N/A __ jcc(Assembler::greaterEqual, L_loop);
4134N/A
4134N/A __ addptr(qword_count, 4); // add(8) and sub(4)
4134N/A __ jccb(Assembler::less, L_end);
4134N/A // Copy trailing 32 bytes
4134N/A if (UseAVX >= 2) {
4134N/A __ vmovdqu(xmm0, Address(from, qword_count, Address::times_8, 0));
4134N/A __ vmovdqu(Address(dest, qword_count, Address::times_8, 0), xmm0);
4134N/A } else {
4134N/A __ movdqu(xmm0, Address(from, qword_count, Address::times_8, 16));
4134N/A __ movdqu(Address(dest, qword_count, Address::times_8, 16), xmm0);
4134N/A __ movdqu(xmm1, Address(from, qword_count, Address::times_8, 0));
4134N/A __ movdqu(Address(dest, qword_count, Address::times_8, 0), xmm1);
4134N/A }
4134N/A __ subptr(qword_count, 4);
4134N/A __ BIND(L_end);
4442N/A if (UseAVX >= 2) {
4442N/A // clean upper bits of YMM registers
4442N/A __ vzeroupper();
4442N/A }
405N/A } else {
4134N/A // Copy 32-bytes per iteration
4134N/A __ BIND(L_loop);
405N/A __ movq(to, Address(from, qword_count, Address::times_8, 24));
405N/A __ movq(Address(dest, qword_count, Address::times_8, 24), to);
405N/A __ movq(to, Address(from, qword_count, Address::times_8, 16));
405N/A __ movq(Address(dest, qword_count, Address::times_8, 16), to);
405N/A __ movq(to, Address(from, qword_count, Address::times_8, 8));
405N/A __ movq(Address(dest, qword_count, Address::times_8, 8), to);
405N/A __ movq(to, Address(from, qword_count, Address::times_8, 0));
405N/A __ movq(Address(dest, qword_count, Address::times_8, 0), to);
4134N/A
4134N/A __ BIND(L_copy_bytes);
4134N/A __ subptr(qword_count, 4);
4134N/A __ jcc(Assembler::greaterEqual, L_loop);
405N/A }
304N/A __ addptr(qword_count, 4);
0N/A __ jcc(Assembler::greater, L_copy_8_bytes); // Copy trailing qwords
0N/A }
0N/A
0N/A
0N/A // Arguments:
0N/A // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
0N/A // ignored
0N/A // name - stub name string
0N/A //
0N/A // Inputs:
0N/A // c_rarg0 - source array address
0N/A // c_rarg1 - destination array address
0N/A // c_rarg2 - element count, treated as ssize_t, can be zero
0N/A //
0N/A // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
0N/A // we let the hardware handle it. The one to eight bytes within words,
0N/A // dwords or qwords that span cache line boundaries will still be loaded
0N/A // and stored atomically.
0N/A //
0N/A // Side Effects:
0N/A // disjoint_byte_copy_entry is set to the no-overlap entry point
0N/A // used by generate_conjoint_byte_copy().
0N/A //
2160N/A address generate_disjoint_byte_copy(bool aligned, address* entry, const char *name) {
0N/A __ align(CodeEntryAlignment);
0N/A StubCodeMark mark(this, "StubRoutines", name);
0N/A address start = __ pc();
0N/A
4134N/A Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
0N/A Label L_copy_byte, L_exit;
0N/A const Register from = rdi; // source array address
0N/A const Register to = rsi; // destination array address
0N/A const Register count = rdx; // elements count
0N/A const Register byte_count = rcx;
0N/A const Register qword_count = count;
0N/A const Register end_from = from; // source array end address
0N/A const Register end_to = to; // destination array end address
0N/A // End pointers are inclusive, and if count is not zero they point
0N/A // to the last unit copied: end_to[0] := end_from[0]
0N/A
0N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
0N/A assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
0N/A
2160N/A if (entry != NULL) {
2160N/A *entry = __ pc();
2160N/A // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2160N/A BLOCK_COMMENT("Entry:");
2160N/A }
0N/A
0N/A setup_arg_regs(); // from => rdi, to => rsi, count => rdx
0N/A // r9 and r10 may be used to save non-volatile registers
0N/A
0N/A // 'from', 'to' and 'count' are now valid
304N/A __ movptr(byte_count, count);
304N/A __ shrptr(count, 3); // count => qword_count
0N/A
0N/A // Copy from low to high addresses. Use 'to' as scratch.
304N/A __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
304N/A __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
304N/A __ negptr(qword_count); // make the count negative
4134N/A __ jmp(L_copy_bytes);
0N/A
0N/A // Copy trailing qwords
0N/A __ BIND(L_copy_8_bytes);
0N/A __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
0N/A __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
304N/A __ increment(qword_count);
0N/A __ jcc(Assembler::notZero, L_copy_8_bytes);
0N/A
0N/A // Check for and copy trailing dword
0N/A __ BIND(L_copy_4_bytes);
304N/A __ testl(byte_count, 4);
0N/A __ jccb(Assembler::zero, L_copy_2_bytes);
0N/A __ movl(rax, Address(end_from, 8));
0N/A __ movl(Address(end_to, 8), rax);
0N/A
304N/A __ addptr(end_from, 4);
304N/A __ addptr(end_to, 4);
0N/A
0N/A // Check for and copy trailing word
0N/A __ BIND(L_copy_2_bytes);
304N/A __ testl(byte_count, 2);
0N/A __ jccb(Assembler::zero, L_copy_byte);
0N/A __ movw(rax, Address(end_from, 8));
0N/A __ movw(Address(end_to, 8), rax);
0N/A
304N/A __ addptr(end_from, 2);
304N/A __ addptr(end_to, 2);
0N/A
0N/A // Check for and copy trailing byte
0N/A __ BIND(L_copy_byte);
304N/A __ testl(byte_count, 1);
0N/A __ jccb(Assembler::zero, L_exit);
0N/A __ movb(rax, Address(end_from, 8));
0N/A __ movb(Address(end_to, 8), rax);
0N/A
0N/A __ BIND(L_exit);
0N/A restore_arg_regs();
2961N/A inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
4134N/A // Copy in multi-bytes chunks
4134N/A copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
0N/A __ jmp(L_copy_4_bytes);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Arguments:
0N/A // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
0N/A // ignored
0N/A // name - stub name string
0N/A //
0N/A // Inputs:
0N/A // c_rarg0 - source array address
0N/A // c_rarg1 - destination array address
0N/A // c_rarg2 - element count, treated as ssize_t, can be zero
0N/A //
0N/A // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
0N/A // we let the hardware handle it. The one to eight bytes within words,
0N/A // dwords or qwords that span cache line boundaries will still be loaded
0N/A // and stored atomically.
0N/A //
2160N/A address generate_conjoint_byte_copy(bool aligned, address nooverlap_target,
2160N/A address* entry, const char *name) {
0N/A __ align(CodeEntryAlignment);
0N/A StubCodeMark mark(this, "StubRoutines", name);
0N/A address start = __ pc();
0N/A
4134N/A Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
0N/A const Register from = rdi; // source array address
0N/A const Register to = rsi; // destination array address
0N/A const Register count = rdx; // elements count
0N/A const Register byte_count = rcx;
0N/A const Register qword_count = count;
0N/A
0N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
0N/A assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
0N/A
2160N/A if (entry != NULL) {
2160N/A *entry = __ pc();
2160N/A // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2160N/A BLOCK_COMMENT("Entry:");
2160N/A }
2160N/A
2160N/A array_overlap_test(nooverlap_target, Address::times_1);
0N/A setup_arg_regs(); // from => rdi, to => rsi, count => rdx
0N/A // r9 and r10 may be used to save non-volatile registers
0N/A
0N/A // 'from', 'to' and 'count' are now valid
304N/A __ movptr(byte_count, count);
304N/A __ shrptr(count, 3); // count => qword_count
0N/A
0N/A // Copy from high to low addresses.
0N/A
0N/A // Check for and copy trailing byte
304N/A __ testl(byte_count, 1);
0N/A __ jcc(Assembler::zero, L_copy_2_bytes);
0N/A __ movb(rax, Address(from, byte_count, Address::times_1, -1));
0N/A __ movb(Address(to, byte_count, Address::times_1, -1), rax);
304N/A __ decrement(byte_count); // Adjust for possible trailing word
0N/A
0N/A // Check for and copy trailing word
0N/A __ BIND(L_copy_2_bytes);
304N/A __ testl(byte_count, 2);
0N/A __ jcc(Assembler::zero, L_copy_4_bytes);
0N/A __ movw(rax, Address(from, byte_count, Address::times_1, -2));
0N/A __ movw(Address(to, byte_count, Address::times_1, -2), rax);
0N/A
0N/A // Check for and copy trailing dword
0N/A __ BIND(L_copy_4_bytes);
304N/A __ testl(byte_count, 4);
4134N/A __ jcc(Assembler::zero, L_copy_bytes);
0N/A __ movl(rax, Address(from, qword_count, Address::times_8));
0N/A __ movl(Address(to, qword_count, Address::times_8), rax);
4134N/A __ jmp(L_copy_bytes);
0N/A
0N/A // Copy trailing qwords
0N/A __ BIND(L_copy_8_bytes);
0N/A __ movq(rax, Address(from, qword_count, Address::times_8, -8));
0N/A __ movq(Address(to, qword_count, Address::times_8, -8), rax);
304N/A __ decrement(qword_count);
0N/A __ jcc(Assembler::notZero, L_copy_8_bytes);
0N/A
0N/A restore_arg_regs();
2961N/A inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
4134N/A // Copy in multi-bytes chunks
4134N/A copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
0N/A
0N/A restore_arg_regs();
2961N/A inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr); // Update counter after rscratch1 is free
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Arguments:
0N/A // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
0N/A // ignored
0N/A // name - stub name string
0N/A //
0N/A // Inputs:
0N/A // c_rarg0 - source array address
0N/A // c_rarg1 - destination array address
0N/A // c_rarg2 - element count, treated as ssize_t, can be zero
0N/A //
0N/A // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
0N/A // let the hardware handle it. The two or four words within dwords
0N/A // or qwords that span cache line boundaries will still be loaded
0N/A // and stored atomically.
0N/A //
0N/A // Side Effects:
0N/A // disjoint_short_copy_entry is set to the no-overlap entry point
0N/A // used by generate_conjoint_short_copy().
0N/A //
2160N/A address generate_disjoint_short_copy(bool aligned, address *entry, const char *name) {
0N/A __ align(CodeEntryAlignment);
0N/A StubCodeMark mark(this, "StubRoutines", name);
0N/A address start = __ pc();
0N/A
4134N/A Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes,L_copy_2_bytes,L_exit;
0N/A const Register from = rdi; // source array address
0N/A const Register to = rsi; // destination array address
0N/A const Register count = rdx; // elements count
0N/A const Register word_count = rcx;
0N/A const Register qword_count = count;
0N/A const Register end_from = from; // source array end address
0N/A const Register end_to = to; // destination array end address
0N/A // End pointers are inclusive, and if count is not zero they point
0N/A // to the last unit copied: end_to[0] := end_from[0]
0N/A
0N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
0N/A assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
0N/A
2160N/A if (entry != NULL) {
2160N/A *entry = __ pc();
2160N/A // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2160N/A BLOCK_COMMENT("Entry:");
2160N/A }
0N/A
0N/A setup_arg_regs(); // from => rdi, to => rsi, count => rdx
0N/A // r9 and r10 may be used to save non-volatile registers
0N/A
0N/A // 'from', 'to' and 'count' are now valid
304N/A __ movptr(word_count, count);
304N/A __ shrptr(count, 2); // count => qword_count
0N/A
0N/A // Copy from low to high addresses. Use 'to' as scratch.
304N/A __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
304N/A __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
304N/A __ negptr(qword_count);
4134N/A __ jmp(L_copy_bytes);
0N/A
0N/A // Copy trailing qwords
0N/A __ BIND(L_copy_8_bytes);
0N/A __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
0N/A __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
304N/A __ increment(qword_count);
0N/A __ jcc(Assembler::notZero, L_copy_8_bytes);
0N/A
0N/A // Original 'dest' is trashed, so we can't use it as a
0N/A // base register for a possible trailing word copy
0N/A
0N/A // Check for and copy trailing dword
0N/A __ BIND(L_copy_4_bytes);
304N/A __ testl(word_count, 2);
0N/A __ jccb(Assembler::zero, L_copy_2_bytes);
0N/A __ movl(rax, Address(end_from, 8));
0N/A __ movl(Address(end_to, 8), rax);
0N/A
304N/A __ addptr(end_from, 4);
304N/A __ addptr(end_to, 4);
0N/A
0N/A // Check for and copy trailing word
0N/A __ BIND(L_copy_2_bytes);
304N/A __ testl(word_count, 1);
0N/A __ jccb(Assembler::zero, L_exit);
0N/A __ movw(rax, Address(end_from, 8));
0N/A __ movw(Address(end_to, 8), rax);
0N/A
0N/A __ BIND(L_exit);
0N/A restore_arg_regs();
2961N/A inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
4134N/A // Copy in multi-bytes chunks
4134N/A copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
0N/A __ jmp(L_copy_4_bytes);
0N/A
0N/A return start;
0N/A }
0N/A
1683N/A address generate_fill(BasicType t, bool aligned, const char *name) {
1683N/A __ align(CodeEntryAlignment);
1683N/A StubCodeMark mark(this, "StubRoutines", name);
1683N/A address start = __ pc();
1683N/A
1683N/A BLOCK_COMMENT("Entry:");
1683N/A
1683N/A const Register to = c_rarg0; // source array address
1683N/A const Register value = c_rarg1; // value
1683N/A const Register count = c_rarg2; // elements count
1683N/A
1683N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
1683N/A
1683N/A __ generate_fill(t, aligned, to, value, count, rax, xmm0);
1683N/A
1683N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
1683N/A __ ret(0);
1683N/A return start;
1683N/A }
1683N/A
0N/A // Arguments:
0N/A // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
0N/A // ignored
0N/A // name - stub name string
0N/A //
0N/A // Inputs:
0N/A // c_rarg0 - source array address
0N/A // c_rarg1 - destination array address
0N/A // c_rarg2 - element count, treated as ssize_t, can be zero
0N/A //
0N/A // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
0N/A // let the hardware handle it. The two or four words within dwords
0N/A // or qwords that span cache line boundaries will still be loaded
0N/A // and stored atomically.
0N/A //
2160N/A address generate_conjoint_short_copy(bool aligned, address nooverlap_target,
2160N/A address *entry, const char *name) {
0N/A __ align(CodeEntryAlignment);
0N/A StubCodeMark mark(this, "StubRoutines", name);
0N/A address start = __ pc();
0N/A
4134N/A Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes;
0N/A const Register from = rdi; // source array address
0N/A const Register to = rsi; // destination array address
0N/A const Register count = rdx; // elements count
0N/A const Register word_count = rcx;
0N/A const Register qword_count = count;
0N/A
0N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
0N/A assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
0N/A
2160N/A if (entry != NULL) {
2160N/A *entry = __ pc();
2160N/A // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2160N/A BLOCK_COMMENT("Entry:");
2160N/A }
2160N/A
2160N/A array_overlap_test(nooverlap_target, Address::times_2);
0N/A setup_arg_regs(); // from => rdi, to => rsi, count => rdx
0N/A // r9 and r10 may be used to save non-volatile registers
0N/A
0N/A // 'from', 'to' and 'count' are now valid
304N/A __ movptr(word_count, count);
304N/A __ shrptr(count, 2); // count => qword_count
0N/A
0N/A // Copy from high to low addresses. Use 'to' as scratch.
0N/A
0N/A // Check for and copy trailing word
304N/A __ testl(word_count, 1);
0N/A __ jccb(Assembler::zero, L_copy_4_bytes);
0N/A __ movw(rax, Address(from, word_count, Address::times_2, -2));
0N/A __ movw(Address(to, word_count, Address::times_2, -2), rax);
0N/A
0N/A // Check for and copy trailing dword
0N/A __ BIND(L_copy_4_bytes);
304N/A __ testl(word_count, 2);
4134N/A __ jcc(Assembler::zero, L_copy_bytes);
0N/A __ movl(rax, Address(from, qword_count, Address::times_8));
0N/A __ movl(Address(to, qword_count, Address::times_8), rax);
4134N/A __ jmp(L_copy_bytes);
0N/A
0N/A // Copy trailing qwords
0N/A __ BIND(L_copy_8_bytes);
0N/A __ movq(rax, Address(from, qword_count, Address::times_8, -8));
0N/A __ movq(Address(to, qword_count, Address::times_8, -8), rax);
304N/A __ decrement(qword_count);
0N/A __ jcc(Assembler::notZero, L_copy_8_bytes);
0N/A
0N/A restore_arg_regs();
2961N/A inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
4134N/A // Copy in multi-bytes chunks
4134N/A copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
0N/A
0N/A restore_arg_regs();
2961N/A inc_counter_np(SharedRuntime::_jshort_array_copy_ctr); // Update counter after rscratch1 is free
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Arguments:
0N/A // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
0N/A // ignored
113N/A // is_oop - true => oop array, so generate store check code
0N/A // name - stub name string
0N/A //
0N/A // Inputs:
0N/A // c_rarg0 - source array address
0N/A // c_rarg1 - destination array address
0N/A // c_rarg2 - element count, treated as ssize_t, can be zero
0N/A //
0N/A // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
0N/A // the hardware handle it. The two dwords within qwords that span
0N/A // cache line boundaries will still be loaded and stored atomicly.
0N/A //
0N/A // Side Effects:
0N/A // disjoint_int_copy_entry is set to the no-overlap entry point
113N/A // used by generate_conjoint_int_oop_copy().
0N/A //
2171N/A address generate_disjoint_int_oop_copy(bool aligned, bool is_oop, address* entry,
2171N/A const char *name, bool dest_uninitialized = false) {
0N/A __ align(CodeEntryAlignment);
0N/A StubCodeMark mark(this, "StubRoutines", name);
0N/A address start = __ pc();
0N/A
4134N/A Label L_copy_bytes, L_copy_8_bytes, L_copy_4_bytes, L_exit;
0N/A const Register from = rdi; // source array address
0N/A const Register to = rsi; // destination array address
0N/A const Register count = rdx; // elements count
0N/A const Register dword_count = rcx;
0N/A const Register qword_count = count;
0N/A const Register end_from = from; // source array end address
0N/A const Register end_to = to; // destination array end address
113N/A const Register saved_to = r11; // saved destination array address
0N/A // End pointers are inclusive, and if count is not zero they point
0N/A // to the last unit copied: end_to[0] := end_from[0]
0N/A
0N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
0N/A assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
0N/A
2160N/A if (entry != NULL) {
2160N/A *entry = __ pc();
2160N/A // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2160N/A BLOCK_COMMENT("Entry:");
113N/A }
113N/A
0N/A setup_arg_regs(); // from => rdi, to => rsi, count => rdx
0N/A // r9 and r10 may be used to save non-volatile registers
113N/A if (is_oop) {
113N/A __ movq(saved_to, to);
2171N/A gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
113N/A }
113N/A
0N/A // 'from', 'to' and 'count' are now valid
304N/A __ movptr(dword_count, count);
304N/A __ shrptr(count, 1); // count => qword_count
0N/A
0N/A // Copy from low to high addresses. Use 'to' as scratch.
304N/A __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
304N/A __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
304N/A __ negptr(qword_count);
4134N/A __ jmp(L_copy_bytes);
0N/A
0N/A // Copy trailing qwords
0N/A __ BIND(L_copy_8_bytes);
0N/A __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
0N/A __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
304N/A __ increment(qword_count);
0N/A __ jcc(Assembler::notZero, L_copy_8_bytes);
0N/A
0N/A // Check for and copy trailing dword
0N/A __ BIND(L_copy_4_bytes);
304N/A __ testl(dword_count, 1); // Only byte test since the value is 0 or 1
0N/A __ jccb(Assembler::zero, L_exit);
0N/A __ movl(rax, Address(end_from, 8));
0N/A __ movl(Address(end_to, 8), rax);
0N/A
0N/A __ BIND(L_exit);
113N/A if (is_oop) {
4534N/A gen_write_ref_array_post_barrier(saved_to, dword_count, rax);
113N/A }
0N/A restore_arg_regs();
2961N/A inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
4134N/A // Copy in multi-bytes chunks
4134N/A copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
0N/A __ jmp(L_copy_4_bytes);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Arguments:
0N/A // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
0N/A // ignored
113N/A // is_oop - true => oop array, so generate store check code
0N/A // name - stub name string
0N/A //
0N/A // Inputs:
0N/A // c_rarg0 - source array address
0N/A // c_rarg1 - destination array address
0N/A // c_rarg2 - element count, treated as ssize_t, can be zero
0N/A //
0N/A // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
0N/A // the hardware handle it. The two dwords within qwords that span
0N/A // cache line boundaries will still be loaded and stored atomicly.
0N/A //
2160N/A address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, address nooverlap_target,
2171N/A address *entry, const char *name,
2171N/A bool dest_uninitialized = false) {
0N/A __ align(CodeEntryAlignment);
0N/A StubCodeMark mark(this, "StubRoutines", name);
0N/A address start = __ pc();
0N/A
4134N/A Label L_copy_bytes, L_copy_8_bytes, L_copy_2_bytes, L_exit;
0N/A const Register from = rdi; // source array address
0N/A const Register to = rsi; // destination array address
0N/A const Register count = rdx; // elements count
0N/A const Register dword_count = rcx;
0N/A const Register qword_count = count;
0N/A
0N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
0N/A assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
0N/A
2160N/A if (entry != NULL) {
2160N/A *entry = __ pc();
2160N/A // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2160N/A BLOCK_COMMENT("Entry:");
2160N/A }
2160N/A
2160N/A array_overlap_test(nooverlap_target, Address::times_4);
2160N/A setup_arg_regs(); // from => rdi, to => rsi, count => rdx
2160N/A // r9 and r10 may be used to save non-volatile registers
2160N/A
113N/A if (is_oop) {
113N/A // no registers are destroyed by this call
2171N/A gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
113N/A }
113N/A
113N/A assert_clean_int(count, rax); // Make sure 'count' is clean int.
0N/A // 'from', 'to' and 'count' are now valid
304N/A __ movptr(dword_count, count);
304N/A __ shrptr(count, 1); // count => qword_count
0N/A
0N/A // Copy from high to low addresses. Use 'to' as scratch.
0N/A
0N/A // Check for and copy trailing dword
304N/A __ testl(dword_count, 1);
4134N/A __ jcc(Assembler::zero, L_copy_bytes);
0N/A __ movl(rax, Address(from, dword_count, Address::times_4, -4));
0N/A __ movl(Address(to, dword_count, Address::times_4, -4), rax);
4134N/A __ jmp(L_copy_bytes);
0N/A
0N/A // Copy trailing qwords
0N/A __ BIND(L_copy_8_bytes);
0N/A __ movq(rax, Address(from, qword_count, Address::times_8, -8));
0N/A __ movq(Address(to, qword_count, Address::times_8, -8), rax);
304N/A __ decrement(qword_count);
0N/A __ jcc(Assembler::notZero, L_copy_8_bytes);
0N/A
113N/A if (is_oop) {
113N/A __ jmp(L_exit);
113N/A }
0N/A restore_arg_regs();
2961N/A inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
4134N/A // Copy in multi-bytes chunks
4134N/A copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
0N/A
4534N/A __ BIND(L_exit);
4534N/A if (is_oop) {
4534N/A gen_write_ref_array_post_barrier(to, dword_count, rax);
4534N/A }
0N/A restore_arg_regs();
2961N/A inc_counter_np(SharedRuntime::_jint_array_copy_ctr); // Update counter after rscratch1 is free
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Arguments:
0N/A // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
0N/A // ignored
0N/A // is_oop - true => oop array, so generate store check code
0N/A // name - stub name string
0N/A //
0N/A // Inputs:
0N/A // c_rarg0 - source array address
0N/A // c_rarg1 - destination array address
0N/A // c_rarg2 - element count, treated as ssize_t, can be zero
0N/A //
113N/A // Side Effects:
0N/A // disjoint_oop_copy_entry or disjoint_long_copy_entry is set to the
0N/A // no-overlap entry point used by generate_conjoint_long_oop_copy().
0N/A //
2171N/A address generate_disjoint_long_oop_copy(bool aligned, bool is_oop, address *entry,
2171N/A const char *name, bool dest_uninitialized = false) {
0N/A __ align(CodeEntryAlignment);
0N/A StubCodeMark mark(this, "StubRoutines", name);
0N/A address start = __ pc();
0N/A
4134N/A Label L_copy_bytes, L_copy_8_bytes, L_exit;
0N/A const Register from = rdi; // source array address
0N/A const Register to = rsi; // destination array address
0N/A const Register qword_count = rdx; // elements count
0N/A const Register end_from = from; // source array end address
0N/A const Register end_to = rcx; // destination array end address
0N/A const Register saved_to = to;
4534N/A const Register saved_count = r11;
0N/A // End pointers are inclusive, and if count is not zero they point
0N/A // to the last unit copied: end_to[0] := end_from[0]
0N/A
0N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
0N/A // Save no-overlap entry point for generate_conjoint_long_oop_copy()
0N/A assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
0N/A
2160N/A if (entry != NULL) {
2160N/A *entry = __ pc();
2160N/A // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2160N/A BLOCK_COMMENT("Entry:");
0N/A }
0N/A
0N/A setup_arg_regs(); // from => rdi, to => rsi, count => rdx
0N/A // r9 and r10 may be used to save non-volatile registers
0N/A // 'from', 'to' and 'qword_count' are now valid
2160N/A if (is_oop) {
4534N/A // Save to and count for store barrier
4534N/A __ movptr(saved_count, qword_count);
2160N/A // no registers are destroyed by this call
2171N/A gen_write_ref_array_pre_barrier(to, qword_count, dest_uninitialized);
2160N/A }
0N/A
0N/A // Copy from low to high addresses. Use 'to' as scratch.
304N/A __ lea(end_from, Address(from, qword_count, Address::times_8, -8));
304N/A __ lea(end_to, Address(to, qword_count, Address::times_8, -8));
304N/A __ negptr(qword_count);
4134N/A __ jmp(L_copy_bytes);
0N/A
0N/A // Copy trailing qwords
0N/A __ BIND(L_copy_8_bytes);
0N/A __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
0N/A __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
304N/A __ increment(qword_count);
0N/A __ jcc(Assembler::notZero, L_copy_8_bytes);
0N/A
0N/A if (is_oop) {
0N/A __ jmp(L_exit);
0N/A } else {
0N/A restore_arg_regs();
2961N/A inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A }
0N/A
4134N/A // Copy in multi-bytes chunks
4134N/A copy_bytes_forward(end_from, end_to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
0N/A
0N/A if (is_oop) {
0N/A __ BIND(L_exit);
4534N/A gen_write_ref_array_post_barrier(saved_to, saved_count, rax);
0N/A }
0N/A restore_arg_regs();
2961N/A if (is_oop) {
2961N/A inc_counter_np(SharedRuntime::_oop_array_copy_ctr); // Update counter after rscratch1 is free
2961N/A } else {
2961N/A inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2961N/A }
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Arguments:
0N/A // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
0N/A // ignored
0N/A // is_oop - true => oop array, so generate store check code
0N/A // name - stub name string
0N/A //
0N/A // Inputs:
0N/A // c_rarg0 - source array address
0N/A // c_rarg1 - destination array address
0N/A // c_rarg2 - element count, treated as ssize_t, can be zero
0N/A //
2171N/A address generate_conjoint_long_oop_copy(bool aligned, bool is_oop,
2171N/A address nooverlap_target, address *entry,
2171N/A const char *name, bool dest_uninitialized = false) {
0N/A __ align(CodeEntryAlignment);
0N/A StubCodeMark mark(this, "StubRoutines", name);
0N/A address start = __ pc();
0N/A
4134N/A Label L_copy_bytes, L_copy_8_bytes, L_exit;
0N/A const Register from = rdi; // source array address
0N/A const Register to = rsi; // destination array address
0N/A const Register qword_count = rdx; // elements count
0N/A const Register saved_count = rcx;
0N/A
0N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
0N/A assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
0N/A
2160N/A if (entry != NULL) {
2160N/A *entry = __ pc();
2160N/A // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
2160N/A BLOCK_COMMENT("Entry:");
0N/A }
2160N/A
2160N/A array_overlap_test(nooverlap_target, Address::times_8);
0N/A setup_arg_regs(); // from => rdi, to => rsi, count => rdx
0N/A // r9 and r10 may be used to save non-volatile registers
0N/A // 'from', 'to' and 'qword_count' are now valid
0N/A if (is_oop) {
0N/A // Save to and count for store barrier
304N/A __ movptr(saved_count, qword_count);
0N/A // No registers are destroyed by this call
2171N/A gen_write_ref_array_pre_barrier(to, saved_count, dest_uninitialized);
0N/A }
0N/A
4134N/A __ jmp(L_copy_bytes);
0N/A
0N/A // Copy trailing qwords
0N/A __ BIND(L_copy_8_bytes);
0N/A __ movq(rax, Address(from, qword_count, Address::times_8, -8));
0N/A __ movq(Address(to, qword_count, Address::times_8, -8), rax);
304N/A __ decrement(qword_count);
0N/A __ jcc(Assembler::notZero, L_copy_8_bytes);
0N/A
0N/A if (is_oop) {
0N/A __ jmp(L_exit);
0N/A } else {
0N/A restore_arg_regs();
2961N/A inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A }
0N/A
4134N/A // Copy in multi-bytes chunks
4134N/A copy_bytes_backward(from, to, qword_count, rax, L_copy_bytes, L_copy_8_bytes);
0N/A
0N/A if (is_oop) {
0N/A __ BIND(L_exit);
4534N/A gen_write_ref_array_post_barrier(to, saved_count, rax);
0N/A }
0N/A restore_arg_regs();
2961N/A if (is_oop) {
2961N/A inc_counter_np(SharedRuntime::_oop_array_copy_ctr); // Update counter after rscratch1 is free
2961N/A } else {
2961N/A inc_counter_np(SharedRuntime::_jlong_array_copy_ctr); // Update counter after rscratch1 is free
2961N/A }
304N/A __ xorptr(rax, rax); // return 0
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A
0N/A // Helper for generating a dynamic type check.
0N/A // Smashes no registers.
0N/A void generate_type_check(Register sub_klass,
0N/A Register super_check_offset,
0N/A Register super_klass,
0N/A Label& L_success) {
0N/A assert_different_registers(sub_klass, super_check_offset, super_klass);
0N/A
0N/A BLOCK_COMMENT("type_check:");
0N/A
0N/A Label L_miss;
0N/A
644N/A __ check_klass_subtype_fast_path(sub_klass, super_klass, noreg, &L_success, &L_miss, NULL,
644N/A super_check_offset);
644N/A __ check_klass_subtype_slow_path(sub_klass, super_klass, noreg, noreg, &L_success, NULL);
0N/A
0N/A // Fall through on failure!
0N/A __ BIND(L_miss);
0N/A }
0N/A
0N/A //
0N/A // Generate checkcasting array copy stub
0N/A //
0N/A // Input:
0N/A // c_rarg0 - source array address
0N/A // c_rarg1 - destination array address
0N/A // c_rarg2 - element count, treated as ssize_t, can be zero
0N/A // c_rarg3 - size_t ckoff (super_check_offset)
0N/A // not Win64
0N/A // c_rarg4 - oop ckval (super_klass)
0N/A // Win64
0N/A // rsp+40 - oop ckval (super_klass)
0N/A //
0N/A // Output:
0N/A // rax == 0 - success
0N/A // rax == -1^K - failure, where K is partial transfer count
0N/A //
2171N/A address generate_checkcast_copy(const char *name, address *entry,
2171N/A bool dest_uninitialized = false) {
0N/A
0N/A Label L_load_element, L_store_element, L_do_card_marks, L_done;
0N/A
0N/A // Input registers (after setup_arg_regs)
0N/A const Register from = rdi; // source array address
0N/A const Register to = rsi; // destination array address
0N/A const Register length = rdx; // elements count
0N/A const Register ckoff = rcx; // super_check_offset
0N/A const Register ckval = r8; // super_klass
0N/A
0N/A // Registers used as temps (r13, r14 are save-on-entry)
0N/A const Register end_from = from; // source array end address
0N/A const Register end_to = r13; // destination array end address
0N/A const Register count = rdx; // -(count_remaining)
0N/A const Register r14_length = r14; // saved copy of length
0N/A // End pointers are inclusive, and if length is not zero they point
0N/A // to the last unit copied: end_to[0] := end_from[0]
0N/A
0N/A const Register rax_oop = rax; // actual oop copied
0N/A const Register r11_klass = r11; // oop._klass
0N/A
0N/A //---------------------------------------------------------------
0N/A // Assembler stub will be used for this call to arraycopy
0N/A // if the two arrays are subtypes of Object[] but the
0N/A // destination array type is not equal to or a supertype
0N/A // of the source type. Each element must be separately
0N/A // checked.
0N/A
0N/A __ align(CodeEntryAlignment);
0N/A StubCodeMark mark(this, "StubRoutines", name);
0N/A address start = __ pc();
0N/A
0N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
0N/A
0N/A#ifdef ASSERT
0N/A // caller guarantees that the arrays really are different
0N/A // otherwise, we would have to make conjoint checks
0N/A { Label L;
113N/A array_overlap_test(L, TIMES_OOP);
0N/A __ stop("checkcast_copy within a single array");
0N/A __ bind(L);
0N/A }
0N/A#endif //ASSERT
0N/A
0N/A setup_arg_regs(4); // from => rdi, to => rsi, length => rdx
0N/A // ckoff => rcx, ckval => r8
0N/A // r9 and r10 may be used to save non-volatile registers
0N/A#ifdef _WIN64
0N/A // last argument (#4) is on stack on Win64
1913N/A __ movptr(ckval, Address(rsp, 6 * wordSize));
0N/A#endif
0N/A
1913N/A // Caller of this entry point must set up the argument registers.
2160N/A if (entry != NULL) {
2160N/A *entry = __ pc();
2160N/A BLOCK_COMMENT("Entry:");
2160N/A }
1913N/A
1913N/A // allocate spill slots for r13, r14
1913N/A enum {
1913N/A saved_r13_offset,
1913N/A saved_r14_offset,
1913N/A saved_rbp_offset
1913N/A };
1913N/A __ subptr(rsp, saved_rbp_offset * wordSize);
1913N/A __ movptr(Address(rsp, saved_r13_offset * wordSize), r13);
1913N/A __ movptr(Address(rsp, saved_r14_offset * wordSize), r14);
1913N/A
0N/A // check that int operands are properly extended to size_t
0N/A assert_clean_int(length, rax);
0N/A assert_clean_int(ckoff, rax);
0N/A
0N/A#ifdef ASSERT
0N/A BLOCK_COMMENT("assert consistent ckoff/ckval");
0N/A // The ckoff and ckval must be mutually consistent,
0N/A // even though caller generates both.
0N/A { Label L;
3042N/A int sco_offset = in_bytes(Klass::super_check_offset_offset());
0N/A __ cmpl(ckoff, Address(ckval, sco_offset));
0N/A __ jcc(Assembler::equal, L);
0N/A __ stop("super_check_offset inconsistent");
0N/A __ bind(L);
0N/A }
0N/A#endif //ASSERT
0N/A
0N/A // Loop-invariant addresses. They are exclusive end pointers.
113N/A Address end_from_addr(from, length, TIMES_OOP, 0);
113N/A Address end_to_addr(to, length, TIMES_OOP, 0);
0N/A // Loop-variant addresses. They assume post-incremented count < 0.
113N/A Address from_element_addr(end_from, count, TIMES_OOP, 0);
113N/A Address to_element_addr(end_to, count, TIMES_OOP, 0);
0N/A
2171N/A gen_write_ref_array_pre_barrier(to, count, dest_uninitialized);
0N/A
0N/A // Copy from low to high addresses, indexed from the end of each array.
304N/A __ lea(end_from, end_from_addr);
304N/A __ lea(end_to, end_to_addr);
304N/A __ movptr(r14_length, length); // save a copy of the length
304N/A assert(length == count, ""); // else fix next line:
304N/A __ negptr(count); // negate and test the length
0N/A __ jcc(Assembler::notZero, L_load_element);
0N/A
0N/A // Empty array: Nothing to do.
304N/A __ xorptr(rax, rax); // return 0 on (trivial) success
0N/A __ jmp(L_done);
0N/A
0N/A // ======== begin loop ========
0N/A // (Loop is rotated; its entry is L_load_element.)
0N/A // Loop control:
0N/A // for (count = -count; count != 0; count++)
0N/A // Base pointers src, dst are biased by 8*(count-1),to last element.
1365N/A __ align(OptoLoopAlignment);
0N/A
0N/A __ BIND(L_store_element);
113N/A __ store_heap_oop(to_element_addr, rax_oop); // store the oop
304N/A __ increment(count); // increment the count toward zero
0N/A __ jcc(Assembler::zero, L_do_card_marks);
0N/A
0N/A // ======== loop entry is here ========
0N/A __ BIND(L_load_element);
113N/A __ load_heap_oop(rax_oop, from_element_addr); // load the oop
304N/A __ testptr(rax_oop, rax_oop);
0N/A __ jcc(Assembler::zero, L_store_element);
0N/A
113N/A __ load_klass(r11_klass, rax_oop);// query the object klass
0N/A generate_type_check(r11_klass, ckoff, ckval, L_store_element);
0N/A // ======== end loop ========
0N/A
0N/A // It was a real error; we must depend on the caller to finish the job.
0N/A // Register rdx = -1 * number of *remaining* oops, r14 = *total* oops.
0N/A // Emit GC store barriers for the oops we have copied (r14 + rdx),
0N/A // and report their number to the caller.
4534N/A assert_different_registers(rax, r14_length, count, to, end_to, rcx, rscratch1);
4534N/A Label L_post_barrier;
4534N/A __ addptr(r14_length, count); // K = (original - remaining) oops
4534N/A __ movptr(rax, r14_length); // save the value
4534N/A __ notptr(rax); // report (-1^K) to caller (does not affect flags)
4534N/A __ jccb(Assembler::notZero, L_post_barrier);
4534N/A __ jmp(L_done); // K == 0, nothing was copied, skip post barrier
0N/A
0N/A // Come here on success only.
0N/A __ BIND(L_do_card_marks);
4534N/A __ xorptr(rax, rax); // return 0 on success
4534N/A
4534N/A __ BIND(L_post_barrier);
4534N/A gen_write_ref_array_post_barrier(to, r14_length, rscratch1);
0N/A
0N/A // Common exit point (success or failure).
0N/A __ BIND(L_done);
304N/A __ movptr(r13, Address(rsp, saved_r13_offset * wordSize));
304N/A __ movptr(r14, Address(rsp, saved_r14_offset * wordSize));
0N/A restore_arg_regs();
2961N/A inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr); // Update counter after rscratch1 is free
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A //
0N/A // Generate 'unsafe' array copy stub
0N/A // Though just as safe as the other stubs, it takes an unscaled
0N/A // size_t argument instead of an element count.
0N/A //
0N/A // Input:
0N/A // c_rarg0 - source array address
0N/A // c_rarg1 - destination array address
0N/A // c_rarg2 - byte count, treated as ssize_t, can be zero
0N/A //
0N/A // Examines the alignment of the operands and dispatches
0N/A // to a long, int, short, or byte copy loop.
0N/A //
2160N/A address generate_unsafe_copy(const char *name,
2160N/A address byte_copy_entry, address short_copy_entry,
2160N/A address int_copy_entry, address long_copy_entry) {
0N/A
0N/A Label L_long_aligned, L_int_aligned, L_short_aligned;
0N/A
0N/A // Input registers (before setup_arg_regs)
0N/A const Register from = c_rarg0; // source array address
0N/A const Register to = c_rarg1; // destination array address
0N/A const Register size = c_rarg2; // byte count (size_t)
0N/A
0N/A // Register used as a temp
0N/A const Register bits = rax; // test copy of low bits
0N/A
0N/A __ align(CodeEntryAlignment);
0N/A StubCodeMark mark(this, "StubRoutines", name);
0N/A address start = __ pc();
0N/A
0N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
0N/A
0N/A // bump this on entry, not on exit:
0N/A inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr);
0N/A
304N/A __ mov(bits, from);
304N/A __ orptr(bits, to);
304N/A __ orptr(bits, size);
0N/A
0N/A __ testb(bits, BytesPerLong-1);
0N/A __ jccb(Assembler::zero, L_long_aligned);
0N/A
0N/A __ testb(bits, BytesPerInt-1);
0N/A __ jccb(Assembler::zero, L_int_aligned);
0N/A
0N/A __ testb(bits, BytesPerShort-1);
0N/A __ jump_cc(Assembler::notZero, RuntimeAddress(byte_copy_entry));
0N/A
0N/A __ BIND(L_short_aligned);
304N/A __ shrptr(size, LogBytesPerShort); // size => short_count
0N/A __ jump(RuntimeAddress(short_copy_entry));
0N/A
0N/A __ BIND(L_int_aligned);
304N/A __ shrptr(size, LogBytesPerInt); // size => int_count
0N/A __ jump(RuntimeAddress(int_copy_entry));
0N/A
0N/A __ BIND(L_long_aligned);
304N/A __ shrptr(size, LogBytesPerLong); // size => qword_count
0N/A __ jump(RuntimeAddress(long_copy_entry));
0N/A
0N/A return start;
0N/A }
0N/A
0N/A // Perform range checks on the proposed arraycopy.
0N/A // Kills temp, but nothing else.
0N/A // Also, clean the sign bits of src_pos and dst_pos.
0N/A void arraycopy_range_checks(Register src, // source array oop (c_rarg0)
0N/A Register src_pos, // source position (c_rarg1)
0N/A Register dst, // destination array oo (c_rarg2)
0N/A Register dst_pos, // destination position (c_rarg3)
0N/A Register length,
0N/A Register temp,
0N/A Label& L_failed) {
0N/A BLOCK_COMMENT("arraycopy_range_checks:");
0N/A
0N/A // if (src_pos + length > arrayOop(src)->length()) FAIL;
0N/A __ movl(temp, length);
0N/A __ addl(temp, src_pos); // src_pos + length
0N/A __ cmpl(temp, Address(src, arrayOopDesc::length_offset_in_bytes()));
0N/A __ jcc(Assembler::above, L_failed);
0N/A
0N/A // if (dst_pos + length > arrayOop(dst)->length()) FAIL;
0N/A __ movl(temp, length);
0N/A __ addl(temp, dst_pos); // dst_pos + length
0N/A __ cmpl(temp, Address(dst, arrayOopDesc::length_offset_in_bytes()));
0N/A __ jcc(Assembler::above, L_failed);
0N/A
0N/A // Have to clean up high 32-bits of 'src_pos' and 'dst_pos'.
0N/A // Move with sign extension can be used since they are positive.
0N/A __ movslq(src_pos, src_pos);
0N/A __ movslq(dst_pos, dst_pos);
0N/A
0N/A BLOCK_COMMENT("arraycopy_range_checks done");
0N/A }
0N/A
0N/A //
0N/A // Generate generic array copy stubs
0N/A //
0N/A // Input:
0N/A // c_rarg0 - src oop
0N/A // c_rarg1 - src_pos (32-bits)
0N/A // c_rarg2 - dst oop
0N/A // c_rarg3 - dst_pos (32-bits)
0N/A // not Win64
0N/A // c_rarg4 - element count (32-bits)
0N/A // Win64
0N/A // rsp+40 - element count (32-bits)
0N/A //
0N/A // Output:
0N/A // rax == 0 - success
0N/A // rax == -1^K - failure, where K is partial transfer count
0N/A //
2160N/A address generate_generic_copy(const char *name,
2160N/A address byte_copy_entry, address short_copy_entry,
2256N/A address int_copy_entry, address oop_copy_entry,
2256N/A address long_copy_entry, address checkcast_copy_entry) {
0N/A
0N/A Label L_failed, L_failed_0, L_objArray;
0N/A Label L_copy_bytes, L_copy_shorts, L_copy_ints, L_copy_longs;
0N/A
0N/A // Input registers
0N/A const Register src = c_rarg0; // source array oop
0N/A const Register src_pos = c_rarg1; // source position
0N/A const Register dst = c_rarg2; // destination array oop
0N/A const Register dst_pos = c_rarg3; // destination position
1913N/A#ifndef _WIN64
1913N/A const Register length = c_rarg4;
0N/A#else
1913N/A const Address length(rsp, 6 * wordSize); // elements count is on stack on Win64
0N/A#endif
0N/A
0N/A { int modulus = CodeEntryAlignment;
0N/A int target = modulus - 5; // 5 = sizeof jmp(L_failed)
0N/A int advance = target - (__ offset() % modulus);
0N/A if (advance < 0) advance += modulus;
0N/A if (advance > 0) __ nop(advance);
0N/A }
0N/A StubCodeMark mark(this, "StubRoutines", name);
0N/A
0N/A // Short-hop target to L_failed. Makes for denser prologue code.
0N/A __ BIND(L_failed_0);
0N/A __ jmp(L_failed);
0N/A assert(__ offset() % CodeEntryAlignment == 0, "no further alignment needed");
0N/A
0N/A __ align(CodeEntryAlignment);
0N/A address start = __ pc();
0N/A
0N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
0N/A
0N/A // bump this on entry, not on exit:
0N/A inc_counter_np(SharedRuntime::_generic_array_copy_ctr);
0N/A
0N/A //-----------------------------------------------------------------------
0N/A // Assembler stub will be used for this call to arraycopy
0N/A // if the following conditions are met:
0N/A //
0N/A // (1) src and dst must not be null.
0N/A // (2) src_pos must not be negative.
0N/A // (3) dst_pos must not be negative.
0N/A // (4) length must not be negative.
0N/A // (5) src klass and dst klass should be the same and not NULL.
0N/A // (6) src and dst should be arrays.
0N/A // (7) src_pos + length must not exceed length of src.
0N/A // (8) dst_pos + length must not exceed length of dst.
0N/A //
0N/A
0N/A // if (src == NULL) return -1;
304N/A __ testptr(src, src); // src oop
0N/A size_t j1off = __ offset();
0N/A __ jccb(Assembler::zero, L_failed_0);
0N/A
0N/A // if (src_pos < 0) return -1;
0N/A __ testl(src_pos, src_pos); // src_pos (32-bits)
0N/A __ jccb(Assembler::negative, L_failed_0);
0N/A
0N/A // if (dst == NULL) return -1;
304N/A __ testptr(dst, dst); // dst oop
0N/A __ jccb(Assembler::zero, L_failed_0);
0N/A
0N/A // if (dst_pos < 0) return -1;
0N/A __ testl(dst_pos, dst_pos); // dst_pos (32-bits)
0N/A size_t j4off = __ offset();
0N/A __ jccb(Assembler::negative, L_failed_0);
0N/A
0N/A // The first four tests are very dense code,
0N/A // but not quite dense enough to put four
0N/A // jumps in a 16-byte instruction fetch buffer.
0N/A // That's good, because some branch predicters
0N/A // do not like jumps so close together.
0N/A // Make sure of this.
0N/A guarantee(((j1off ^ j4off) & ~15) != 0, "I$ line of 1st & 4th jumps");
0N/A
0N/A // registers used as temp
0N/A const Register r11_length = r11; // elements count to copy
0N/A const Register r10_src_klass = r10; // array klass
0N/A
0N/A // if (length < 0) return -1;
1913N/A __ movl(r11_length, length); // length (elements count, 32-bits value)
0N/A __ testl(r11_length, r11_length);
0N/A __ jccb(Assembler::negative, L_failed_0);
0N/A
113N/A __ load_klass(r10_src_klass, src);
0N/A#ifdef ASSERT
0N/A // assert(src->klass() != NULL);
1913N/A {
1913N/A BLOCK_COMMENT("assert klasses not null {");
1913N/A Label L1, L2;
304N/A __ testptr(r10_src_klass, r10_src_klass);
0N/A __ jcc(Assembler::notZero, L2); // it is broken if klass is NULL
0N/A __ bind(L1);
0N/A __ stop("broken null klass");
0N/A __ bind(L2);
1913N/A __ load_klass(rax, dst);
1913N/A __ cmpq(rax, 0);
0N/A __ jcc(Assembler::equal, L1); // this would be broken also
1913N/A BLOCK_COMMENT("} assert klasses not null done");
0N/A }
0N/A#endif
0N/A
0N/A // Load layout helper (32-bits)
0N/A //
0N/A // |array_tag| | header_size | element_type | |log2_element_size|
0N/A // 32 30 24 16 8 2 0
0N/A //
0N/A // array_tag: typeArray = 0x3, objArray = 0x2, non-array = 0x0
0N/A //
0N/A
3042N/A const int lh_offset = in_bytes(Klass::layout_helper_offset());
0N/A
0N/A // Handle objArrays completely differently...
1913N/A const jint objArray_lh = Klass::array_layout_helper(T_OBJECT);
1913N/A __ cmpl(Address(r10_src_klass, lh_offset), objArray_lh);
0N/A __ jcc(Assembler::equal, L_objArray);
0N/A
0N/A // if (src->klass() != dst->klass()) return -1;
1913N/A __ load_klass(rax, dst);
1913N/A __ cmpq(r10_src_klass, rax);
0N/A __ jcc(Assembler::notEqual, L_failed);
0N/A
1913N/A const Register rax_lh = rax; // layout helper
1913N/A __ movl(rax_lh, Address(r10_src_klass, lh_offset));
1913N/A
0N/A // if (!src->is_Array()) return -1;
0N/A __ cmpl(rax_lh, Klass::_lh_neutral_value);
0N/A __ jcc(Assembler::greaterEqual, L_failed);
0N/A
0N/A // At this point, it is known to be a typeArray (array_tag 0x3).
0N/A#ifdef ASSERT
1913N/A {
1913N/A BLOCK_COMMENT("assert primitive array {");
1913N/A Label L;
0N/A __ cmpl(rax_lh, (Klass::_lh_array_tag_type_value << Klass::_lh_array_tag_shift));
0N/A __ jcc(Assembler::greaterEqual, L);
0N/A __ stop("must be a primitive array");
0N/A __ bind(L);
1913N/A BLOCK_COMMENT("} assert primitive array done");
0N/A }
0N/A#endif
0N/A
0N/A arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
0N/A r10, L_failed);
0N/A
0N/A // typeArrayKlass
0N/A //
0N/A // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
0N/A // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
0N/A //
0N/A
0N/A const Register r10_offset = r10; // array offset
0N/A const Register rax_elsize = rax_lh; // element size
0N/A
0N/A __ movl(r10_offset, rax_lh);
0N/A __ shrl(r10_offset, Klass::_lh_header_size_shift);
304N/A __ andptr(r10_offset, Klass::_lh_header_size_mask); // array_offset
304N/A __ addptr(src, r10_offset); // src array offset
304N/A __ addptr(dst, r10_offset); // dst array offset
0N/A BLOCK_COMMENT("choose copy loop based on element size");
0N/A __ andl(rax_lh, Klass::_lh_log2_element_size_mask); // rax_lh -> rax_elsize
0N/A
0N/A // next registers should be set before the jump to corresponding stub
0N/A const Register from = c_rarg0; // source array address
0N/A const Register to = c_rarg1; // destination array address
0N/A const Register count = c_rarg2; // elements count
0N/A
0N/A // 'from', 'to', 'count' registers should be set in such order
0N/A // since they are the same as 'src', 'src_pos', 'dst'.
0N/A
0N/A __ BIND(L_copy_bytes);
0N/A __ cmpl(rax_elsize, 0);
0N/A __ jccb(Assembler::notEqual, L_copy_shorts);
304N/A __ lea(from, Address(src, src_pos, Address::times_1, 0));// src_addr
304N/A __ lea(to, Address(dst, dst_pos, Address::times_1, 0));// dst_addr
304N/A __ movl2ptr(count, r11_length); // length
0N/A __ jump(RuntimeAddress(byte_copy_entry));
0N/A
0N/A __ BIND(L_copy_shorts);
0N/A __ cmpl(rax_elsize, LogBytesPerShort);
0N/A __ jccb(Assembler::notEqual, L_copy_ints);
304N/A __ lea(from, Address(src, src_pos, Address::times_2, 0));// src_addr
304N/A __ lea(to, Address(dst, dst_pos, Address::times_2, 0));// dst_addr
304N/A __ movl2ptr(count, r11_length); // length
0N/A __ jump(RuntimeAddress(short_copy_entry));
0N/A
0N/A __ BIND(L_copy_ints);
0N/A __ cmpl(rax_elsize, LogBytesPerInt);
0N/A __ jccb(Assembler::notEqual, L_copy_longs);
304N/A __ lea(from, Address(src, src_pos, Address::times_4, 0));// src_addr
304N/A __ lea(to, Address(dst, dst_pos, Address::times_4, 0));// dst_addr
304N/A __ movl2ptr(count, r11_length); // length
0N/A __ jump(RuntimeAddress(int_copy_entry));
0N/A
0N/A __ BIND(L_copy_longs);
0N/A#ifdef ASSERT
1913N/A {
1913N/A BLOCK_COMMENT("assert long copy {");
1913N/A Label L;
0N/A __ cmpl(rax_elsize, LogBytesPerLong);
0N/A __ jcc(Assembler::equal, L);
0N/A __ stop("must be long copy, but elsize is wrong");
0N/A __ bind(L);
1913N/A BLOCK_COMMENT("} assert long copy done");
0N/A }
0N/A#endif
304N/A __ lea(from, Address(src, src_pos, Address::times_8, 0));// src_addr
304N/A __ lea(to, Address(dst, dst_pos, Address::times_8, 0));// dst_addr
304N/A __ movl2ptr(count, r11_length); // length
0N/A __ jump(RuntimeAddress(long_copy_entry));
0N/A
0N/A // objArrayKlass
0N/A __ BIND(L_objArray);
1913N/A // live at this point: r10_src_klass, r11_length, src[_pos], dst[_pos]
0N/A
0N/A Label L_plain_copy, L_checkcast_copy;
0N/A // test array classes for subtyping
1913N/A __ load_klass(rax, dst);
1913N/A __ cmpq(r10_src_klass, rax); // usual case is exact equality
0N/A __ jcc(Assembler::notEqual, L_checkcast_copy);
0N/A
0N/A // Identically typed arrays can be copied without element-wise checks.
0N/A arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
0N/A r10, L_failed);
0N/A
304N/A __ lea(from, Address(src, src_pos, TIMES_OOP,
0N/A arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // src_addr
304N/A __ lea(to, Address(dst, dst_pos, TIMES_OOP,
304N/A arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // dst_addr
304N/A __ movl2ptr(count, r11_length); // length
0N/A __ BIND(L_plain_copy);
0N/A __ jump(RuntimeAddress(oop_copy_entry));
0N/A
0N/A __ BIND(L_checkcast_copy);
1913N/A // live at this point: r10_src_klass, r11_length, rax (dst_klass)
0N/A {
0N/A // Before looking at dst.length, make sure dst is also an objArray.
1913N/A __ cmpl(Address(rax, lh_offset), objArray_lh);
0N/A __ jcc(Assembler::notEqual, L_failed);
0N/A
0N/A // It is safe to examine both src.length and dst.length.
0N/A arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
0N/A rax, L_failed);
1913N/A
1913N/A const Register r11_dst_klass = r11;
113N/A __ load_klass(r11_dst_klass, dst); // reload
0N/A
0N/A // Marshal the base address arguments now, freeing registers.
304N/A __ lea(from, Address(src, src_pos, TIMES_OOP,
0N/A arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
304N/A __ lea(to, Address(dst, dst_pos, TIMES_OOP,
0N/A arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
1913N/A __ movl(count, length); // length (reloaded)
0N/A Register sco_temp = c_rarg3; // this register is free now
0N/A assert_different_registers(from, to, count, sco_temp,
0N/A r11_dst_klass, r10_src_klass);
0N/A assert_clean_int(count, sco_temp);
0N/A
0N/A // Generate the type check.
3042N/A const int sco_offset = in_bytes(Klass::super_check_offset_offset());
0N/A __ movl(sco_temp, Address(r11_dst_klass, sco_offset));
0N/A assert_clean_int(sco_temp, rax);
0N/A generate_type_check(r10_src_klass, sco_temp, r11_dst_klass, L_plain_copy);
0N/A
0N/A // Fetch destination element klass from the objArrayKlass header.
3042N/A int ek_offset = in_bytes(objArrayKlass::element_klass_offset());
304N/A __ movptr(r11_dst_klass, Address(r11_dst_klass, ek_offset));
1913N/A __ movl( sco_temp, Address(r11_dst_klass, sco_offset));
0N/A assert_clean_int(sco_temp, rax);
0N/A
0N/A // the checkcast_copy loop needs two extra arguments:
0N/A assert(c_rarg3 == sco_temp, "#3 already in place");
1913N/A // Set up arguments for checkcast_copy_entry.
1913N/A setup_arg_regs(4);
1913N/A __ movptr(r8, r11_dst_klass); // dst.klass.element_klass, r8 is c_rarg4 on Linux/Solaris
0N/A __ jump(RuntimeAddress(checkcast_copy_entry));
0N/A }
0N/A
0N/A __ BIND(L_failed);
304N/A __ xorptr(rax, rax);
304N/A __ notptr(rax); // return -1
0N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
0N/A __ ret(0);
0N/A
0N/A return start;
0N/A }
0N/A
0N/A void generate_arraycopy_stubs() {
2160N/A address entry;
2160N/A address entry_jbyte_arraycopy;
2160N/A address entry_jshort_arraycopy;
2160N/A address entry_jint_arraycopy;
2160N/A address entry_oop_arraycopy;
2160N/A address entry_jlong_arraycopy;
2160N/A address entry_checkcast_arraycopy;
2160N/A
2160N/A StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, &entry,
2160N/A "jbyte_disjoint_arraycopy");
2160N/A StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, entry, &entry_jbyte_arraycopy,
2160N/A "jbyte_arraycopy");
2160N/A
2160N/A StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, &entry,
2160N/A "jshort_disjoint_arraycopy");
2160N/A StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, entry, &entry_jshort_arraycopy,
2160N/A "jshort_arraycopy");
2160N/A
2160N/A StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, false, &entry,
2160N/A "jint_disjoint_arraycopy");
2160N/A StubRoutines::_jint_arraycopy = generate_conjoint_int_oop_copy(false, false, entry,
2160N/A &entry_jint_arraycopy, "jint_arraycopy");
2160N/A
2160N/A StubRoutines::_jlong_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, false, &entry,
2160N/A "jlong_disjoint_arraycopy");
2160N/A StubRoutines::_jlong_arraycopy = generate_conjoint_long_oop_copy(false, false, entry,
2160N/A &entry_jlong_arraycopy, "jlong_arraycopy");
0N/A
113N/A
113N/A if (UseCompressedOops) {
2160N/A StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, true, &entry,
2160N/A "oop_disjoint_arraycopy");
2160N/A StubRoutines::_oop_arraycopy = generate_conjoint_int_oop_copy(false, true, entry,
2160N/A &entry_oop_arraycopy, "oop_arraycopy");
2171N/A StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_int_oop_copy(false, true, &entry,
2171N/A "oop_disjoint_arraycopy_uninit",
2171N/A /*dest_uninitialized*/true);
2171N/A StubRoutines::_oop_arraycopy_uninit = generate_conjoint_int_oop_copy(false, true, entry,
2171N/A NULL, "oop_arraycopy_uninit",
2171N/A /*dest_uninitialized*/true);
113N/A } else {
2160N/A StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, true, &entry,
2160N/A "oop_disjoint_arraycopy");
2160N/A StubRoutines::_oop_arraycopy = generate_conjoint_long_oop_copy(false, true, entry,
2160N/A &entry_oop_arraycopy, "oop_arraycopy");
2171N/A StubRoutines::_oop_disjoint_arraycopy_uninit = generate_disjoint_long_oop_copy(false, true, &entry,
2171N/A "oop_disjoint_arraycopy_uninit",
2171N/A /*dest_uninitialized*/true);
2171N/A StubRoutines::_oop_arraycopy_uninit = generate_conjoint_long_oop_copy(false, true, entry,
2171N/A NULL, "oop_arraycopy_uninit",
2171N/A /*dest_uninitialized*/true);
113N/A }
0N/A
2171N/A StubRoutines::_checkcast_arraycopy = generate_checkcast_copy("checkcast_arraycopy", &entry_checkcast_arraycopy);
2171N/A StubRoutines::_checkcast_arraycopy_uninit = generate_checkcast_copy("checkcast_arraycopy_uninit", NULL,
2171N/A /*dest_uninitialized*/true);
2171N/A
2160N/A StubRoutines::_unsafe_arraycopy = generate_unsafe_copy("unsafe_arraycopy",
2160N/A entry_jbyte_arraycopy,
2160N/A entry_jshort_arraycopy,
2160N/A entry_jint_arraycopy,
2160N/A entry_jlong_arraycopy);
2160N/A StubRoutines::_generic_arraycopy = generate_generic_copy("generic_arraycopy",
2160N/A entry_jbyte_arraycopy,
2160N/A entry_jshort_arraycopy,
2160N/A entry_jint_arraycopy,
2160N/A entry_oop_arraycopy,
2160N/A entry_jlong_arraycopy,
2160N/A entry_checkcast_arraycopy);
0N/A
1683N/A StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill");
1683N/A StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill");
1683N/A StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill");
1683N/A StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill");
1683N/A StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
1683N/A StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill");
1683N/A
0N/A // We don't generate specialized code for HeapWord-aligned source
0N/A // arrays, so just use the code we've already generated
0N/A StubRoutines::_arrayof_jbyte_disjoint_arraycopy = StubRoutines::_jbyte_disjoint_arraycopy;
0N/A StubRoutines::_arrayof_jbyte_arraycopy = StubRoutines::_jbyte_arraycopy;
0N/A
0N/A StubRoutines::_arrayof_jshort_disjoint_arraycopy = StubRoutines::_jshort_disjoint_arraycopy;
0N/A StubRoutines::_arrayof_jshort_arraycopy = StubRoutines::_jshort_arraycopy;
0N/A
0N/A StubRoutines::_arrayof_jint_disjoint_arraycopy = StubRoutines::_jint_disjoint_arraycopy;
0N/A StubRoutines::_arrayof_jint_arraycopy = StubRoutines::_jint_arraycopy;
0N/A
0N/A StubRoutines::_arrayof_jlong_disjoint_arraycopy = StubRoutines::_jlong_disjoint_arraycopy;
0N/A StubRoutines::_arrayof_jlong_arraycopy = StubRoutines::_jlong_arraycopy;
0N/A
0N/A StubRoutines::_arrayof_oop_disjoint_arraycopy = StubRoutines::_oop_disjoint_arraycopy;
0N/A StubRoutines::_arrayof_oop_arraycopy = StubRoutines::_oop_arraycopy;
2171N/A
2171N/A StubRoutines::_arrayof_oop_disjoint_arraycopy_uninit = StubRoutines::_oop_disjoint_arraycopy_uninit;
2171N/A StubRoutines::_arrayof_oop_arraycopy_uninit = StubRoutines::_oop_arraycopy_uninit;
0N/A }
0N/A
1174N/A void generate_math_stubs() {
1174N/A {
1174N/A StubCodeMark mark(this, "StubRoutines", "log");
1174N/A StubRoutines::_intrinsic_log = (double (*)(double)) __ pc();
1174N/A
1174N/A __ subq(rsp, 8);
1174N/A __ movdbl(Address(rsp, 0), xmm0);
1174N/A __ fld_d(Address(rsp, 0));
1174N/A __ flog();
1174N/A __ fstp_d(Address(rsp, 0));
1174N/A __ movdbl(xmm0, Address(rsp, 0));
1174N/A __ addq(rsp, 8);
1174N/A __ ret(0);
1174N/A }
1174N/A {
1174N/A StubCodeMark mark(this, "StubRoutines", "log10");
1174N/A StubRoutines::_intrinsic_log10 = (double (*)(double)) __ pc();
1174N/A
1174N/A __ subq(rsp, 8);
1174N/A __ movdbl(Address(rsp, 0), xmm0);
1174N/A __ fld_d(Address(rsp, 0));
1174N/A __ flog10();
1174N/A __ fstp_d(Address(rsp, 0));
1174N/A __ movdbl(xmm0, Address(rsp, 0));
1174N/A __ addq(rsp, 8);
1174N/A __ ret(0);
1174N/A }
1174N/A {
1174N/A StubCodeMark mark(this, "StubRoutines", "sin");
1174N/A StubRoutines::_intrinsic_sin = (double (*)(double)) __ pc();
1174N/A
1174N/A __ subq(rsp, 8);
1174N/A __ movdbl(Address(rsp, 0), xmm0);
1174N/A __ fld_d(Address(rsp, 0));
1174N/A __ trigfunc('s');
1174N/A __ fstp_d(Address(rsp, 0));
1174N/A __ movdbl(xmm0, Address(rsp, 0));
1174N/A __ addq(rsp, 8);
1174N/A __ ret(0);
1174N/A }
1174N/A {
1174N/A StubCodeMark mark(this, "StubRoutines", "cos");
1174N/A StubRoutines::_intrinsic_cos = (double (*)(double)) __ pc();
1174N/A
1174N/A __ subq(rsp, 8);
1174N/A __ movdbl(Address(rsp, 0), xmm0);
1174N/A __ fld_d(Address(rsp, 0));
1174N/A __ trigfunc('c');
1174N/A __ fstp_d(Address(rsp, 0));
1174N/A __ movdbl(xmm0, Address(rsp, 0));
1174N/A __ addq(rsp, 8);
1174N/A __ ret(0);
1174N/A }
1174N/A {
1174N/A StubCodeMark mark(this, "StubRoutines", "tan");
1174N/A StubRoutines::_intrinsic_tan = (double (*)(double)) __ pc();
1174N/A
1174N/A __ subq(rsp, 8);
1174N/A __ movdbl(Address(rsp, 0), xmm0);
1174N/A __ fld_d(Address(rsp, 0));
1174N/A __ trigfunc('t');
1174N/A __ fstp_d(Address(rsp, 0));
1174N/A __ movdbl(xmm0, Address(rsp, 0));
1174N/A __ addq(rsp, 8);
1174N/A __ ret(0);
1174N/A }
3752N/A {
3752N/A StubCodeMark mark(this, "StubRoutines", "exp");
3752N/A StubRoutines::_intrinsic_exp = (double (*)(double)) __ pc();
3752N/A
3752N/A __ subq(rsp, 8);
3752N/A __ movdbl(Address(rsp, 0), xmm0);
3752N/A __ fld_d(Address(rsp, 0));
3752N/A __ exp_with_fallback(0);
3752N/A __ fstp_d(Address(rsp, 0));
3752N/A __ movdbl(xmm0, Address(rsp, 0));
3752N/A __ addq(rsp, 8);
3752N/A __ ret(0);
3752N/A }
3752N/A {
3752N/A StubCodeMark mark(this, "StubRoutines", "pow");
3752N/A StubRoutines::_intrinsic_pow = (double (*)(double,double)) __ pc();
3752N/A
3752N/A __ subq(rsp, 8);
3752N/A __ movdbl(Address(rsp, 0), xmm1);
3752N/A __ fld_d(Address(rsp, 0));
3752N/A __ movdbl(Address(rsp, 0), xmm0);
3752N/A __ fld_d(Address(rsp, 0));
3752N/A __ pow_with_fallback(0);
3752N/A __ fstp_d(Address(rsp, 0));
3752N/A __ movdbl(xmm0, Address(rsp, 0));
3752N/A __ addq(rsp, 8);
3752N/A __ ret(0);
3752N/A }
1174N/A }
1174N/A
4056N/A // AES intrinsic stubs
4056N/A enum {AESBlockSize = 16};
4056N/A
4056N/A address generate_key_shuffle_mask() {
4056N/A __ align(16);
4056N/A StubCodeMark mark(this, "StubRoutines", "key_shuffle_mask");
4056N/A address start = __ pc();
4056N/A __ emit_data64( 0x0405060700010203, relocInfo::none );
4056N/A __ emit_data64( 0x0c0d0e0f08090a0b, relocInfo::none );
4056N/A return start;
4056N/A }
4056N/A
4056N/A // Utility routine for loading a 128-bit key word in little endian format
4056N/A // can optionally specify that the shuffle mask is already in an xmmregister
4056N/A void load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask=NULL) {
4056N/A __ movdqu(xmmdst, Address(key, offset));
4056N/A if (xmm_shuf_mask != NULL) {
4056N/A __ pshufb(xmmdst, xmm_shuf_mask);
4056N/A } else {
4056N/A __ pshufb(xmmdst, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
4056N/A }
4056N/A }
4056N/A
4056N/A // Arguments:
4056N/A //
4056N/A // Inputs:
4056N/A // c_rarg0 - source byte array address
4056N/A // c_rarg1 - destination byte array address
4056N/A // c_rarg2 - K (key) in little endian int array
4056N/A //
4056N/A address generate_aescrypt_encryptBlock() {
4130N/A assert(UseAES, "need AES instructions and misaligned SSE support");
4056N/A __ align(CodeEntryAlignment);
4056N/A StubCodeMark mark(this, "StubRoutines", "aescrypt_encryptBlock");
4056N/A Label L_doLast;
4056N/A address start = __ pc();
4056N/A
4056N/A const Register from = c_rarg0; // source array address
4056N/A const Register to = c_rarg1; // destination array address
4056N/A const Register key = c_rarg2; // key array address
4056N/A const Register keylen = rax;
4056N/A
4056N/A const XMMRegister xmm_result = xmm0;
4130N/A const XMMRegister xmm_key_shuf_mask = xmm1;
4130N/A // On win64 xmm6-xmm15 must be preserved so don't use them.
4130N/A const XMMRegister xmm_temp1 = xmm2;
4130N/A const XMMRegister xmm_temp2 = xmm3;
4130N/A const XMMRegister xmm_temp3 = xmm4;
4130N/A const XMMRegister xmm_temp4 = xmm5;
4056N/A
4056N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
4056N/A
4130N/A // keylen could be only {11, 13, 15} * 4 = {44, 52, 60}
4056N/A __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
4056N/A
4056N/A __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
4056N/A __ movdqu(xmm_result, Address(from, 0)); // get 16 bytes of input
4056N/A
4056N/A // For encryption, the java expanded key ordering is just what we need
4056N/A // we don't know if the key is aligned, hence not using load-execute form
4056N/A
4130N/A load_key(xmm_temp1, key, 0x00, xmm_key_shuf_mask);
4130N/A __ pxor(xmm_result, xmm_temp1);
4130N/A
4130N/A load_key(xmm_temp1, key, 0x10, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp2, key, 0x20, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp3, key, 0x30, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp4, key, 0x40, xmm_key_shuf_mask);
4130N/A
4130N/A __ aesenc(xmm_result, xmm_temp1);
4130N/A __ aesenc(xmm_result, xmm_temp2);
4130N/A __ aesenc(xmm_result, xmm_temp3);
4130N/A __ aesenc(xmm_result, xmm_temp4);
4130N/A
4130N/A load_key(xmm_temp1, key, 0x50, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp2, key, 0x60, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp3, key, 0x70, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp4, key, 0x80, xmm_key_shuf_mask);
4130N/A
4130N/A __ aesenc(xmm_result, xmm_temp1);
4130N/A __ aesenc(xmm_result, xmm_temp2);
4130N/A __ aesenc(xmm_result, xmm_temp3);
4130N/A __ aesenc(xmm_result, xmm_temp4);
4130N/A
4130N/A load_key(xmm_temp1, key, 0x90, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp2, key, 0xa0, xmm_key_shuf_mask);
4130N/A
4130N/A __ cmpl(keylen, 44);
4130N/A __ jccb(Assembler::equal, L_doLast);
4130N/A
4130N/A __ aesenc(xmm_result, xmm_temp1);
4130N/A __ aesenc(xmm_result, xmm_temp2);
4130N/A
4130N/A load_key(xmm_temp1, key, 0xb0, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp2, key, 0xc0, xmm_key_shuf_mask);
4130N/A
4130N/A __ cmpl(keylen, 52);
4130N/A __ jccb(Assembler::equal, L_doLast);
4130N/A
4130N/A __ aesenc(xmm_result, xmm_temp1);
4130N/A __ aesenc(xmm_result, xmm_temp2);
4130N/A
4130N/A load_key(xmm_temp1, key, 0xd0, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp2, key, 0xe0, xmm_key_shuf_mask);
4056N/A
4056N/A __ BIND(L_doLast);
4130N/A __ aesenc(xmm_result, xmm_temp1);
4130N/A __ aesenclast(xmm_result, xmm_temp2);
4056N/A __ movdqu(Address(to, 0), xmm_result); // store the result
4056N/A __ xorptr(rax, rax); // return 0
4056N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
4056N/A __ ret(0);
4056N/A
4056N/A return start;
4056N/A }
4056N/A
4056N/A
4056N/A // Arguments:
4056N/A //
4056N/A // Inputs:
4056N/A // c_rarg0 - source byte array address
4056N/A // c_rarg1 - destination byte array address
4056N/A // c_rarg2 - K (key) in little endian int array
4056N/A //
4056N/A address generate_aescrypt_decryptBlock() {
4130N/A assert(UseAES, "need AES instructions and misaligned SSE support");
4056N/A __ align(CodeEntryAlignment);
4056N/A StubCodeMark mark(this, "StubRoutines", "aescrypt_decryptBlock");
4056N/A Label L_doLast;
4056N/A address start = __ pc();
4056N/A
4056N/A const Register from = c_rarg0; // source array address
4056N/A const Register to = c_rarg1; // destination array address
4056N/A const Register key = c_rarg2; // key array address
4056N/A const Register keylen = rax;
4056N/A
4056N/A const XMMRegister xmm_result = xmm0;
4130N/A const XMMRegister xmm_key_shuf_mask = xmm1;
4130N/A // On win64 xmm6-xmm15 must be preserved so don't use them.
4130N/A const XMMRegister xmm_temp1 = xmm2;
4130N/A const XMMRegister xmm_temp2 = xmm3;
4130N/A const XMMRegister xmm_temp3 = xmm4;
4130N/A const XMMRegister xmm_temp4 = xmm5;
4056N/A
4056N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
4056N/A
4130N/A // keylen could be only {11, 13, 15} * 4 = {44, 52, 60}
4056N/A __ movl(keylen, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
4056N/A
4056N/A __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
4056N/A __ movdqu(xmm_result, Address(from, 0));
4056N/A
4056N/A // for decryption java expanded key ordering is rotated one position from what we want
4056N/A // so we start from 0x10 here and hit 0x00 last
4056N/A // we don't know if the key is aligned, hence not using load-execute form
4130N/A load_key(xmm_temp1, key, 0x10, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp2, key, 0x20, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp3, key, 0x30, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp4, key, 0x40, xmm_key_shuf_mask);
4130N/A
4130N/A __ pxor (xmm_result, xmm_temp1);
4130N/A __ aesdec(xmm_result, xmm_temp2);
4130N/A __ aesdec(xmm_result, xmm_temp3);
4130N/A __ aesdec(xmm_result, xmm_temp4);
4130N/A
4130N/A load_key(xmm_temp1, key, 0x50, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp2, key, 0x60, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp3, key, 0x70, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp4, key, 0x80, xmm_key_shuf_mask);
4130N/A
4130N/A __ aesdec(xmm_result, xmm_temp1);
4130N/A __ aesdec(xmm_result, xmm_temp2);
4130N/A __ aesdec(xmm_result, xmm_temp3);
4130N/A __ aesdec(xmm_result, xmm_temp4);
4130N/A
4130N/A load_key(xmm_temp1, key, 0x90, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp2, key, 0xa0, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp3, key, 0x00, xmm_key_shuf_mask);
4130N/A
4130N/A __ cmpl(keylen, 44);
4130N/A __ jccb(Assembler::equal, L_doLast);
4130N/A
4130N/A __ aesdec(xmm_result, xmm_temp1);
4130N/A __ aesdec(xmm_result, xmm_temp2);
4130N/A
4130N/A load_key(xmm_temp1, key, 0xb0, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp2, key, 0xc0, xmm_key_shuf_mask);
4130N/A
4130N/A __ cmpl(keylen, 52);
4130N/A __ jccb(Assembler::equal, L_doLast);
4130N/A
4130N/A __ aesdec(xmm_result, xmm_temp1);
4130N/A __ aesdec(xmm_result, xmm_temp2);
4130N/A
4130N/A load_key(xmm_temp1, key, 0xd0, xmm_key_shuf_mask);
4130N/A load_key(xmm_temp2, key, 0xe0, xmm_key_shuf_mask);
4056N/A
4056N/A __ BIND(L_doLast);
4130N/A __ aesdec(xmm_result, xmm_temp1);
4130N/A __ aesdec(xmm_result, xmm_temp2);
4130N/A
4056N/A // for decryption the aesdeclast operation is always on key+0x00
4130N/A __ aesdeclast(xmm_result, xmm_temp3);
4056N/A __ movdqu(Address(to, 0), xmm_result); // store the result
4056N/A __ xorptr(rax, rax); // return 0
4056N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
4056N/A __ ret(0);
4056N/A
4056N/A return start;
4056N/A }
4056N/A
4056N/A
4056N/A // Arguments:
4056N/A //
4056N/A // Inputs:
4056N/A // c_rarg0 - source byte array address
4056N/A // c_rarg1 - destination byte array address
4056N/A // c_rarg2 - K (key) in little endian int array
4056N/A // c_rarg3 - r vector byte array address
4056N/A // c_rarg4 - input length
4056N/A //
4056N/A address generate_cipherBlockChaining_encryptAESCrypt() {
4130N/A assert(UseAES, "need AES instructions and misaligned SSE support");
4056N/A __ align(CodeEntryAlignment);
4056N/A StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_encryptAESCrypt");
4056N/A address start = __ pc();
4056N/A
4056N/A Label L_exit, L_key_192_256, L_key_256, L_loopTop_128, L_loopTop_192, L_loopTop_256;
4056N/A const Register from = c_rarg0; // source array address
4056N/A const Register to = c_rarg1; // destination array address
4056N/A const Register key = c_rarg2; // key array address
4056N/A const Register rvec = c_rarg3; // r byte array initialized from initvector array address
4056N/A // and left with the results of the last encryption block
4056N/A#ifndef _WIN64
4056N/A const Register len_reg = c_rarg4; // src len (must be multiple of blocksize 16)
4056N/A#else
4056N/A const Address len_mem(rsp, 6 * wordSize); // length is on stack on Win64
4056N/A const Register len_reg = r10; // pick the first volatile windows register
4056N/A#endif
4056N/A const Register pos = rax;
4056N/A
4056N/A // xmm register assignments for the loops below
4056N/A const XMMRegister xmm_result = xmm0;
4056N/A const XMMRegister xmm_temp = xmm1;
4056N/A // keys 0-10 preloaded into xmm2-xmm12
4056N/A const int XMM_REG_NUM_KEY_FIRST = 2;
4130N/A const int XMM_REG_NUM_KEY_LAST = 15;
4056N/A const XMMRegister xmm_key0 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
4130N/A const XMMRegister xmm_key10 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+10);
4130N/A const XMMRegister xmm_key11 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+11);
4130N/A const XMMRegister xmm_key12 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+12);
4130N/A const XMMRegister xmm_key13 = as_XMMRegister(XMM_REG_NUM_KEY_FIRST+13);
4056N/A
4056N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
4056N/A
4056N/A#ifdef _WIN64
4056N/A // on win64, fill len_reg from stack position
4056N/A __ movl(len_reg, len_mem);
4130N/A // save the xmm registers which must be preserved 6-15
4056N/A __ subptr(rsp, -rsp_after_call_off * wordSize);
4056N/A for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
4056N/A __ movdqu(xmm_save(i), as_XMMRegister(i));
4056N/A }
4056N/A#endif
4056N/A
4056N/A const XMMRegister xmm_key_shuf_mask = xmm_temp; // used temporarily to swap key bytes up front
4056N/A __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
4130N/A // load up xmm regs xmm2 thru xmm12 with key 0x00 - 0xa0
4130N/A for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x00; rnum <= XMM_REG_NUM_KEY_FIRST+10; rnum++) {
4056N/A load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
4056N/A offset += 0x10;
4056N/A }
4056N/A __ movdqu(xmm_result, Address(rvec, 0x00)); // initialize xmm_result with r vec
4056N/A
4056N/A // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
4056N/A __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
4056N/A __ cmpl(rax, 44);
4056N/A __ jcc(Assembler::notEqual, L_key_192_256);
4056N/A
4056N/A // 128 bit code follows here
4056N/A __ movptr(pos, 0);
4056N/A __ align(OptoLoopAlignment);
4130N/A
4056N/A __ BIND(L_loopTop_128);
4056N/A __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
4056N/A __ pxor (xmm_result, xmm_temp); // xor with the current r vector
4056N/A __ pxor (xmm_result, xmm_key0); // do the aes rounds
4130N/A for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_FIRST + 9; rnum++) {
4056N/A __ aesenc(xmm_result, as_XMMRegister(rnum));
4056N/A }
4056N/A __ aesenclast(xmm_result, xmm_key10);
4056N/A __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
4056N/A // no need to store r to memory until we exit
4056N/A __ addptr(pos, AESBlockSize);
4056N/A __ subptr(len_reg, AESBlockSize);
4056N/A __ jcc(Assembler::notEqual, L_loopTop_128);
4056N/A
4056N/A __ BIND(L_exit);
4056N/A __ movdqu(Address(rvec, 0), xmm_result); // final value of r stored in rvec of CipherBlockChaining object
4056N/A
4056N/A#ifdef _WIN64
4056N/A // restore xmm regs belonging to calling function
4056N/A for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
4056N/A __ movdqu(as_XMMRegister(i), xmm_save(i));
4056N/A }
4056N/A#endif
4056N/A __ movl(rax, 0); // return 0 (why?)
4056N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
4056N/A __ ret(0);
4056N/A
4056N/A __ BIND(L_key_192_256);
4056N/A // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
4130N/A load_key(xmm_key11, key, 0xb0, xmm_key_shuf_mask);
4130N/A load_key(xmm_key12, key, 0xc0, xmm_key_shuf_mask);
4056N/A __ cmpl(rax, 52);
4056N/A __ jcc(Assembler::notEqual, L_key_256);
4056N/A
4056N/A // 192-bit code follows here (could be changed to use more xmm registers)
4056N/A __ movptr(pos, 0);
4056N/A __ align(OptoLoopAlignment);
4130N/A
4056N/A __ BIND(L_loopTop_192);
4056N/A __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
4056N/A __ pxor (xmm_result, xmm_temp); // xor with the current r vector
4056N/A __ pxor (xmm_result, xmm_key0); // do the aes rounds
4130N/A for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_FIRST + 11; rnum++) {
4056N/A __ aesenc(xmm_result, as_XMMRegister(rnum));
4056N/A }
4130N/A __ aesenclast(xmm_result, xmm_key12);
4056N/A __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
4056N/A // no need to store r to memory until we exit
4056N/A __ addptr(pos, AESBlockSize);
4056N/A __ subptr(len_reg, AESBlockSize);
4056N/A __ jcc(Assembler::notEqual, L_loopTop_192);
4056N/A __ jmp(L_exit);
4056N/A
4056N/A __ BIND(L_key_256);
4056N/A // 256-bit code follows here (could be changed to use more xmm registers)
4130N/A load_key(xmm_key13, key, 0xd0, xmm_key_shuf_mask);
4056N/A __ movptr(pos, 0);
4056N/A __ align(OptoLoopAlignment);
4130N/A
4056N/A __ BIND(L_loopTop_256);
4056N/A __ movdqu(xmm_temp, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of input
4056N/A __ pxor (xmm_result, xmm_temp); // xor with the current r vector
4056N/A __ pxor (xmm_result, xmm_key0); // do the aes rounds
4130N/A for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_FIRST + 13; rnum++) {
4056N/A __ aesenc(xmm_result, as_XMMRegister(rnum));
4056N/A }
4056N/A load_key(xmm_temp, key, 0xe0);
4056N/A __ aesenclast(xmm_result, xmm_temp);
4056N/A __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
4056N/A // no need to store r to memory until we exit
4056N/A __ addptr(pos, AESBlockSize);
4056N/A __ subptr(len_reg, AESBlockSize);
4056N/A __ jcc(Assembler::notEqual, L_loopTop_256);
4056N/A __ jmp(L_exit);
4056N/A
4056N/A return start;
4056N/A }
4056N/A
4056N/A
4056N/A
4056N/A // This is a version of CBC/AES Decrypt which does 4 blocks in a loop at a time
4056N/A // to hide instruction latency
4056N/A //
4056N/A // Arguments:
4056N/A //
4056N/A // Inputs:
4056N/A // c_rarg0 - source byte array address
4056N/A // c_rarg1 - destination byte array address
4056N/A // c_rarg2 - K (key) in little endian int array
4056N/A // c_rarg3 - r vector byte array address
4056N/A // c_rarg4 - input length
4056N/A //
4056N/A
4056N/A address generate_cipherBlockChaining_decryptAESCrypt_Parallel() {
4130N/A assert(UseAES, "need AES instructions and misaligned SSE support");
4056N/A __ align(CodeEntryAlignment);
4056N/A StubCodeMark mark(this, "StubRoutines", "cipherBlockChaining_decryptAESCrypt");
4056N/A address start = __ pc();
4056N/A
4056N/A Label L_exit, L_key_192_256, L_key_256;
4056N/A Label L_singleBlock_loopTop_128, L_multiBlock_loopTop_128;
4056N/A Label L_singleBlock_loopTop_192, L_singleBlock_loopTop_256;
4056N/A const Register from = c_rarg0; // source array address
4056N/A const Register to = c_rarg1; // destination array address
4056N/A const Register key = c_rarg2; // key array address
4056N/A const Register rvec = c_rarg3; // r byte array initialized from initvector array address
4056N/A // and left with the results of the last encryption block
4056N/A#ifndef _WIN64
4056N/A const Register len_reg = c_rarg4; // src len (must be multiple of blocksize 16)
4056N/A#else
4056N/A const Address len_mem(rsp, 6 * wordSize); // length is on stack on Win64
4056N/A const Register len_reg = r10; // pick the first volatile windows register
4056N/A#endif
4056N/A const Register pos = rax;
4056N/A
4056N/A // keys 0-10 preloaded into xmm2-xmm12
4056N/A const int XMM_REG_NUM_KEY_FIRST = 5;
4056N/A const int XMM_REG_NUM_KEY_LAST = 15;
4130N/A const XMMRegister xmm_key_first = as_XMMRegister(XMM_REG_NUM_KEY_FIRST);
4056N/A const XMMRegister xmm_key_last = as_XMMRegister(XMM_REG_NUM_KEY_LAST);
4056N/A
4056N/A __ enter(); // required for proper stackwalking of RuntimeStub frame
4056N/A
4056N/A#ifdef _WIN64
4056N/A // on win64, fill len_reg from stack position
4056N/A __ movl(len_reg, len_mem);
4056N/A // save the xmm registers which must be preserved 6-15
4056N/A __ subptr(rsp, -rsp_after_call_off * wordSize);
4056N/A for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
4056N/A __ movdqu(xmm_save(i), as_XMMRegister(i));
4056N/A }
4056N/A#endif
4056N/A // the java expanded key ordering is rotated one position from what we want
4056N/A // so we start from 0x10 here and hit 0x00 last
4056N/A const XMMRegister xmm_key_shuf_mask = xmm1; // used temporarily to swap key bytes up front
4056N/A __ movdqu(xmm_key_shuf_mask, ExternalAddress(StubRoutines::x86::key_shuffle_mask_addr()));
4056N/A // load up xmm regs 5 thru 15 with key 0x10 - 0xa0 - 0x00
4130N/A for (int rnum = XMM_REG_NUM_KEY_FIRST, offset = 0x10; rnum < XMM_REG_NUM_KEY_LAST; rnum++) {
4056N/A load_key(as_XMMRegister(rnum), key, offset, xmm_key_shuf_mask);
4056N/A offset += 0x10;
4056N/A }
4130N/A load_key(xmm_key_last, key, 0x00, xmm_key_shuf_mask);
4056N/A
4056N/A const XMMRegister xmm_prev_block_cipher = xmm1; // holds cipher of previous block
4130N/A
4056N/A // registers holding the four results in the parallelized loop
4056N/A const XMMRegister xmm_result0 = xmm0;
4056N/A const XMMRegister xmm_result1 = xmm2;
4056N/A const XMMRegister xmm_result2 = xmm3;
4056N/A const XMMRegister xmm_result3 = xmm4;
4056N/A
4056N/A __ movdqu(xmm_prev_block_cipher, Address(rvec, 0x00)); // initialize with initial rvec
4056N/A
4056N/A // now split to different paths depending on the keylen (len in ints of AESCrypt.KLE array (52=192, or 60=256))
4056N/A __ movl(rax, Address(key, arrayOopDesc::length_offset_in_bytes() - arrayOopDesc::base_offset_in_bytes(T_INT)));
4056N/A __ cmpl(rax, 44);
4056N/A __ jcc(Assembler::notEqual, L_key_192_256);
4056N/A
4056N/A
4056N/A // 128-bit code follows here, parallelized
4056N/A __ movptr(pos, 0);
4056N/A __ align(OptoLoopAlignment);
4056N/A __ BIND(L_multiBlock_loopTop_128);
4056N/A __ cmpptr(len_reg, 4*AESBlockSize); // see if at least 4 blocks left
4056N/A __ jcc(Assembler::less, L_singleBlock_loopTop_128);
4056N/A
4056N/A __ movdqu(xmm_result0, Address(from, pos, Address::times_1, 0*AESBlockSize)); // get next 4 blocks into xmmresult registers
4056N/A __ movdqu(xmm_result1, Address(from, pos, Address::times_1, 1*AESBlockSize));
4056N/A __ movdqu(xmm_result2, Address(from, pos, Address::times_1, 2*AESBlockSize));
4056N/A __ movdqu(xmm_result3, Address(from, pos, Address::times_1, 3*AESBlockSize));
4056N/A
4056N/A#define DoFour(opc, src_reg) \
4056N/A __ opc(xmm_result0, src_reg); \
4056N/A __ opc(xmm_result1, src_reg); \
4056N/A __ opc(xmm_result2, src_reg); \
4056N/A __ opc(xmm_result3, src_reg);
4056N/A
4056N/A DoFour(pxor, xmm_key_first);
4056N/A for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
4056N/A DoFour(aesdec, as_XMMRegister(rnum));
4056N/A }
4056N/A DoFour(aesdeclast, xmm_key_last);
4056N/A // for each result, xor with the r vector of previous cipher block
4056N/A __ pxor(xmm_result0, xmm_prev_block_cipher);
4056N/A __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 0*AESBlockSize));
4056N/A __ pxor(xmm_result1, xmm_prev_block_cipher);
4056N/A __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 1*AESBlockSize));
4056N/A __ pxor(xmm_result2, xmm_prev_block_cipher);
4056N/A __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 2*AESBlockSize));
4056N/A __ pxor(xmm_result3, xmm_prev_block_cipher);
4056N/A __ movdqu(xmm_prev_block_cipher, Address(from, pos, Address::times_1, 3*AESBlockSize)); // this will carry over to next set of blocks
4056N/A
4056N/A __ movdqu(Address(to, pos, Address::times_1, 0*AESBlockSize), xmm_result0); // store 4 results into the next 64 bytes of output
4056N/A __ movdqu(Address(to, pos, Address::times_1, 1*AESBlockSize), xmm_result1);
4056N/A __ movdqu(Address(to, pos, Address::times_1, 2*AESBlockSize), xmm_result2);
4056N/A __ movdqu(Address(to, pos, Address::times_1, 3*AESBlockSize), xmm_result3);
4056N/A
4056N/A __ addptr(pos, 4*AESBlockSize);
4056N/A __ subptr(len_reg, 4*AESBlockSize);
4056N/A __ jmp(L_multiBlock_loopTop_128);
4056N/A
4056N/A // registers used in the non-parallelized loops
4130N/A // xmm register assignments for the loops below
4130N/A const XMMRegister xmm_result = xmm0;
4056N/A const XMMRegister xmm_prev_block_cipher_save = xmm2;
4130N/A const XMMRegister xmm_key11 = xmm3;
4130N/A const XMMRegister xmm_key12 = xmm4;
4130N/A const XMMRegister xmm_temp = xmm4;
4056N/A
4056N/A __ align(OptoLoopAlignment);
4056N/A __ BIND(L_singleBlock_loopTop_128);
4056N/A __ cmpptr(len_reg, 0); // any blocks left??
4056N/A __ jcc(Assembler::equal, L_exit);
4056N/A __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of cipher input
4056N/A __ movdqa(xmm_prev_block_cipher_save, xmm_result); // save for next r vector
4056N/A __ pxor (xmm_result, xmm_key_first); // do the aes dec rounds
4056N/A for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
4056N/A __ aesdec(xmm_result, as_XMMRegister(rnum));
4056N/A }
4056N/A __ aesdeclast(xmm_result, xmm_key_last);
4056N/A __ pxor (xmm_result, xmm_prev_block_cipher); // xor with the current r vector
4056N/A __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
4056N/A // no need to store r to memory until we exit
4056N/A __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save); // set up next r vector with cipher input from this block
4056N/A
4056N/A __ addptr(pos, AESBlockSize);
4056N/A __ subptr(len_reg, AESBlockSize);
4056N/A __ jmp(L_singleBlock_loopTop_128);
4056N/A
4056N/A
4056N/A __ BIND(L_exit);
4056N/A __ movdqu(Address(rvec, 0), xmm_prev_block_cipher); // final value of r stored in rvec of CipherBlockChaining object
4056N/A#ifdef _WIN64
4056N/A // restore regs belonging to calling function
4056N/A for (int i = 6; i <= XMM_REG_NUM_KEY_LAST; i++) {
4056N/A __ movdqu(as_XMMRegister(i), xmm_save(i));
4056N/A }
4056N/A#endif
4056N/A __ movl(rax, 0); // return 0 (why?)
4056N/A __ leave(); // required for proper stackwalking of RuntimeStub frame
4056N/A __ ret(0);
4056N/A
4056N/A
4056N/A __ BIND(L_key_192_256);
4056N/A // here rax = len in ints of AESCrypt.KLE array (52=192, or 60=256)
4130N/A load_key(xmm_key11, key, 0xb0);
4056N/A __ cmpl(rax, 52);
4056N/A __ jcc(Assembler::notEqual, L_key_256);
4056N/A
4056N/A // 192-bit code follows here (could be optimized to use parallelism)
4130N/A load_key(xmm_key12, key, 0xc0); // 192-bit key goes up to c0
4056N/A __ movptr(pos, 0);
4056N/A __ align(OptoLoopAlignment);
4130N/A
4056N/A __ BIND(L_singleBlock_loopTop_192);
4056N/A __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of cipher input
4056N/A __ movdqa(xmm_prev_block_cipher_save, xmm_result); // save for next r vector
4056N/A __ pxor (xmm_result, xmm_key_first); // do the aes dec rounds
4056N/A for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
4056N/A __ aesdec(xmm_result, as_XMMRegister(rnum));
4056N/A }
4130N/A __ aesdec(xmm_result, xmm_key11);
4130N/A __ aesdec(xmm_result, xmm_key12);
4056N/A __ aesdeclast(xmm_result, xmm_key_last); // xmm15 always came from key+0
4056N/A __ pxor (xmm_result, xmm_prev_block_cipher); // xor with the current r vector
4130N/A __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
4056N/A // no need to store r to memory until we exit
4130N/A __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save); // set up next r vector with cipher input from this block
4056N/A __ addptr(pos, AESBlockSize);
4056N/A __ subptr(len_reg, AESBlockSize);
4056N/A __ jcc(Assembler::notEqual,L_singleBlock_loopTop_192);
4056N/A __ jmp(L_exit);
4056N/A
4056N/A __ BIND(L_key_256);
4056N/A // 256-bit code follows here (could be optimized to use parallelism)
4056N/A __ movptr(pos, 0);
4056N/A __ align(OptoLoopAlignment);
4130N/A
4056N/A __ BIND(L_singleBlock_loopTop_256);
4130N/A __ movdqu(xmm_result, Address(from, pos, Address::times_1, 0)); // get next 16 bytes of cipher input
4056N/A __ movdqa(xmm_prev_block_cipher_save, xmm_result); // save for next r vector
4056N/A __ pxor (xmm_result, xmm_key_first); // do the aes dec rounds
4056N/A for (int rnum = XMM_REG_NUM_KEY_FIRST + 1; rnum <= XMM_REG_NUM_KEY_LAST - 1; rnum++) {
4056N/A __ aesdec(xmm_result, as_XMMRegister(rnum));
4056N/A }
4130N/A __ aesdec(xmm_result, xmm_key11);
4130N/A load_key(xmm_temp, key, 0xc0);
4130N/A __ aesdec(xmm_result, xmm_temp);
4130N/A load_key(xmm_temp, key, 0xd0);
4130N/A __ aesdec(xmm_result, xmm_temp);
4130N/A load_key(xmm_temp, key, 0xe0); // 256-bit key goes up to e0
4130N/A __ aesdec(xmm_result, xmm_temp);
4130N/A __ aesdeclast(xmm_result, xmm_key_last); // xmm15 came from key+0
4056N/A __ pxor (xmm_result, xmm_prev_block_cipher); // xor with the current r vector
4130N/A __ movdqu(Address(to, pos, Address::times_1, 0), xmm_result); // store into the next 16 bytes of output
4056N/A // no need to store r to memory until we exit
4130N/A __ movdqa(xmm_prev_block_cipher, xmm_prev_block_cipher_save); // set up next r vector with cipher input from this block
4056N/A __ addptr(pos, AESBlockSize);
4056N/A __ subptr(len_reg, AESBlockSize);
4056N/A __ jcc(Assembler::notEqual,L_singleBlock_loopTop_256);
4056N/A __ jmp(L_exit);
4056N/A
4056N/A return start;
4056N/A }
4056N/A
4056N/A
4056N/A
0N/A#undef __
0N/A#define __ masm->
0N/A
0N/A // Continuation point for throwing of implicit exceptions that are
0N/A // not handled in the current activation. Fabricates an exception
Error!

 

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null

java.lang.NullPointerException