/*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*
*/
#include "precompiled.hpp"
#include "asm/assembler.hpp"
#include "assembler_x86.inline.hpp"
#include "code/debugInfoRec.hpp"
#include "code/icBuffer.hpp"
#include "code/vtableStubs.hpp"
#include "interpreter/interpreter.hpp"
#include "oops/compiledICHolderOop.hpp"
#include "prims/jvmtiRedefineClassesTrace.hpp"
#include "runtime/sharedRuntime.hpp"
#include "runtime/vframeArray.hpp"
#include "vmreg_x86.inline.hpp"
#ifdef COMPILER1
#include "c1/c1_Runtime1.hpp"
#endif
#ifdef COMPILER2
#include "opto/runtime.hpp"
#endif
class RegisterSaver {
// Capture info about frame layout
#define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
enum layout {
fpu_state_off = 0,
DEF_XMM_OFFS(0),
// The frame sender code expects that rbp will be in the "natural" place and
// will override any oopMap setting for it. We must therefore force the layout
// so that it agrees with the frame sender code.
public:
// Offsets into the register save area
// Used by deoptimization when it is managing result register
// values on its own
// This really returns a slot in the fp save area, which one is not important
// During deoptimization only the result register need to be restored
// all the other values have already been extracted.
};
int vect_words = 0;
#ifdef COMPILER2
if (save_vectors) {
// Save upper half of YMM registes
}
#else
#endif
// save registers, fpu state, and flags
// We assume caller has already has return address slot on the stack
// We push epb twice in this sequence because we want the real rbp,
// to be under the return like a normal enter and we want to use pusha
// We push by hand instead of pusing push
if (verify_fpu) {
// Some stubs may have non standard FPU control word settings so
// only check and reset the value when it required to be the
// standard value. The safepoint blob in particular can be used
// in methods which are using the 24 bit control word for
// optimized float math.
#ifdef ASSERT
// Make sure the control word has the expected value
#endif
// Reset the control word to guard against exceptions being unmasked
// since fstp_d can cause FPU stack underflow exceptions. Write it
// into the on stack copy and then reload that to make sure that the
// current and future values are correct.
}
if (!verify_fpu) {
// Set the control word so that exceptions are masked for the
// following code.
}
// Save the FPU registers in de-opt-able form
} else if( UseSSE >= 2 ) {
// Save whole 128bit (16 bytes) XMM regiters
}
if (vect_words > 0) {
}
// Set an oopmap for the call site. This oopmap will map all
// oop-registers and debug-info registers as callee-saved. This
// will allow deoptimization at this safepoint to find all possible
// debug-info recordings, as well as let GC find all oops.
// rbp, location is known implicitly, no oopMap
// %%% This is really a waste but we'll keep things as they were for now
if (true) {
}
return map;
}
// Recover XMM & FPU state
int additional_frame_bytes = 0;
#ifdef COMPILER2
if (restore_vectors) {
additional_frame_bytes = 128;
}
#else
#endif
if (UseSSE == 1) {
} else if (UseSSE >= 2) {
}
if (restore_vectors) {
// Restore upper half of YMM registes.
}
__ pop_FPU_state();
// Get the rbp, described implicitly by the frame sender code (no oopMap)
}
// Just restore result register. Only used by deoptimization. By
// now any callee save register that needs to be restore to a c2
// caller of the deoptee has been extracted into the vframeArray
// and will be stuffed into the c2i adapter we create for later
// restoration so only result registers need to be restored here.
//
// Recover XMM & FPU state
if( UseSSE == 1 ) {
} else if( UseSSE >= 2 ) {
}
// Pop all of the register save are off the stack except the return address
}
// Is vector's size (in bytes) bigger than a size saved by default?
// 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
// Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
return size > 16;
}
// The java_calling_convention describes stack locations as ideal slots on
// a frame with no abi restrictions. Since we must observe abi restrictions
// (like the placement of the register window) the slots must be biased by
// the following value.
// Account for saved rbp, and return address
// This should really be in_preserve_stack_slots
}
}
// ---------------------------------------------------------------------------
// Read the array of BasicTypes from a signature, and compute where the
// arguments should go. Values in the VMRegPair regs array refer to 4-byte
// quantities. Values less than SharedInfo::stack0 are registers, those above
// refer to 4-byte stack slots. All stack slots are based off of the stack pointer
// as framesizes are fixed.
// VMRegImpl::stack0 refers to the first slot 0(sp).
// and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
// up to RegisterImpl::number_of_registers) are the 32-bit
// integer registers.
// Doubles have precedence, so if you pass a mix of floats and doubles
// the doubles will grab the registers before the floats will.
// Note: the INPUTS in sig_bt are in units of Java argument words, which are
// either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
// units regardless of build. Of course for i486 there is no 64 bit build
// ---------------------------------------------------------------------------
// The compiled Java calling convention.
// Doubles have precedence, so if you pass a mix of floats and doubles
// the doubles will grab the registers before the floats will.
int total_args_passed,
int is_outgoing) {
// Doubles have precedence, so if you pass a mix of floats and doubles
// the doubles will grab the registers before the floats will.
// CNC - TURNED OFF FOR non-SSE.
// On Intel we have to round all doubles (and most floats) at
// call sites by storing to the stack in any case.
// UseSSE=0 ==> Don't Use ==> 9999+0
// UseSSE=1 ==> Floats only ==> 9999+1
// UseSSE>=2 ==> Floats or doubles ==> 9999+2
// Pass doubles & longs aligned on the stack. First count stack slots for doubles
int i;
for( i = 0; i < total_args_passed; i++) {
// first 2 doubles go in registers
else // Else double is passed low on the stack to be aligned.
stack += 2;
stack += 2;
}
}
// Now pick where all else goes.
for( i = 0; i < total_args_passed; i++) {
// From the type and the argument number (count) compute the location
switch( sig_bt[i] ) {
case T_SHORT:
case T_CHAR:
case T_BYTE:
case T_BOOLEAN:
case T_INT:
case T_ARRAY:
case T_OBJECT:
case T_ADDRESS:
if( reg_arg0 == 9999 ) {
reg_arg0 = i;
} else if( reg_arg1 == 9999 ) {
reg_arg1 = i;
} else {
}
break;
case T_FLOAT:
freg_arg0 = i;
freg_arg1 = i;
} else {
}
break;
case T_LONG:
dstack += 2;
break;
case T_DOUBLE:
} else {
dstack += 2;
}
break;
break;
default:
break;
}
}
// return value can be odd number of VMRegImpl stack slots make multiple of 2
}
// Patch the callers callsite with entry to compiled code if it exists.
Label L;
// Schedule the branch target address early.
// Call into the VM to patch the caller, then jump to compiled callee
// rax, isn't live so capture return address while we easily can
if (UseSSE == 1) {
}
if (UseSSE >= 2) {
}
#ifdef COMPILER2
// C2 may leave the stack dirty if not in SSE2+ mode
if (UseSSE >= 2) {
} else {
}
#endif /* COMPILER2 */
// VM needs caller's callsite
// VM needs target method
if (UseSSE == 1) {
}
if (UseSSE >= 2) {
}
}
}
int total_args_passed,
int comp_args_on_stack,
Label& skip_fixup) {
// Before we get into the guts of the C2I adapter, see if we should be here
// at all. We've come from compiled code and are attempting to jump to the
// interpreter, which means the caller made a static call to get here
// (vcalls always get a compiled target if there is one). Check for a
// compiled target. If there is one, we need to patch the caller's call.
#ifdef COMPILER2
// C2 may leave the stack dirty if not in SSE2+ mode
if (UseSSE >= 2) {
} else {
}
#endif /* COMPILER2 */
// Since all args are passed on the stack, total_args_passed * interpreter_
// stack_element_size is the
// space we need.
// Get return address
// set senderSP value
// Now write the args into the outgoing interpreter space
for (int i = 0; i < total_args_passed; i++) {
continue;
}
// st_off points to lowest address on stack.
// Say 4 args:
// i st_off
// 0 12 T_LONG
// 1 8 T_VOID
// 2 4 T_OBJECT
// 3 0 T_BOOL
continue;
}
// memory to memory use fpu stack top
} else {
// ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
// st_off == MSW, st_off-wordSize == LSW
#ifndef _LP64
#else
#ifdef ASSERT
// Overwrite the unused slot with known junk
#endif /* ASSERT */
#endif // _LP64
}
} else if (r_1->is_Register()) {
} else {
// Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
// T_DOUBLE and T_LONG use two slots in the interpreter
#ifdef ASSERT
// Overwrite the unused slot with known junk
#endif /* ASSERT */
} else {
}
}
} else {
} else {
}
}
}
// Schedule the branch target address early.
// And repush original return address
}
}
}
int total_args_passed,
int comp_args_on_stack,
// Note: rsi contains the senderSP on entry. We must preserve it since
// we may do a i2c -> c2i transition if we lose a race where compiled
// code goes non-entrant while we get args ready.
// Adapters can be frameless because they do not require the caller
// to perform additional cleanup work, such as correcting the stack pointer.
// An i2c adapter is frameless because the *caller* frame, which is interpreted,
// routinely repairs its own stack pointer (from interpreter_frame_last_sp),
// even if a callee has modified the stack pointer.
// A c2i adapter is frameless because the *callee* frame, which is interpreted,
// routinely repairs its caller's stack pointer (from sender_sp, which is set
// up via the senderSP register).
// In other words, if *either* the caller or callee is interpreted, we can
// get the stack pointer repaired after a call.
// This is why c2i and i2c adapters cannot be indefinitely composed.
// In particular, if a c2i adapter were to somehow call an i2c adapter,
// both caller and callee would be compiled methods, and neither would
// clean up the stack pointer changes performed by the two adapters.
// If this happens, control eventually transfers back to the compiled
// caller, but with an uncorrected stack, causing delayed havoc.
// Pick up the return address
if (VerifyAdapterCalls &&
// assert(Interpreter::contains($return_addr) ||
// StubRoutines::contains($return_addr),
// "i2c adapter must return to an interpreter frame");
L_ok);
L_ok);
L_ok);
}
// Must preserve original SP for loading incoming arguments because
// we need to align the outgoing SP for compiled code.
// in registers, we will occasionally have no stack args.
int comp_words_on_stack = 0;
if (comp_args_on_stack) {
// Sig words on the stack are greater-than VMRegImpl::stack0. Those in
// registers are below. By subtracting stack0, we either get a negative
// number (all values in registers) or the maximum stack slot accessed.
// int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
// Convert 4-byte stack slots to words.
// Round up to miminum stack alignment, in wordSize
}
// Align the outgoing SP
// push the return address on the stack (note that pushing, rather
// than storing it, yields the correct frame alignment for the callee)
// Put saved SP in another register
// Will jump to the compiled code just as if compiled code was doing it.
// Pre-load the register-jump target early, to schedule it better.
// Now generate the shuffle code. Pick up all register args and move the
// rest through the floating point stack top.
for (int i = 0; i < total_args_passed; i++) {
// Longs and doubles are passed in native word order, but misaligned
// in the 32-bit build.
continue;
}
// Pick up 0, 1 or 2 words from SP+offset.
"scrambled load targets?");
// Load in argument order going down.
// Point to interpreter value (vs. tag)
//
//
//
continue;
}
// Convert stack slot to an SP offset (+ wordSize to account for return address )
// We can use rsi as a temp here because compiled code doesn't need rsi as an input
// and if we end up going thru a c2i because of a miss a reasonable value of rsi
// we be generated.
// __ fld_s(Address(saved_sp, ld_off));
// __ fstp_s(Address(rsp, st_off));
} else {
// Interpreter local[n] == MSW, local[n+1] == LSW however locals
// are accessed as negative so LSW is at LOW address
// ld_off is MSW so get LSW
// st_off is LSW (i.e. reg.first())
// __ fld_d(Address(saved_sp, next_off));
// __ fstp_d(Address(rsp, st_off));
//
// We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
// the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
// So we must adjust where to pick up the data to match the interpreter.
//
// Interpreter local[n] == MSW, local[n+1] == LSW however locals
// are accessed as negative so LSW is at LOW address
// ld_off is MSW so get LSW
#ifndef _LP64
#endif // _LP64
}
//
// We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
// the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
// So we must adjust where to pick up the data to match the interpreter.
// this can be a misaligned move
#ifndef _LP64
// Remember r_1 is low address (and LSB on x86)
// So r_2 gets loaded from high address regardless of the platform
#endif // _LP64
} else {
}
} else {
} else {
}
}
}
// 6243940 We might end up in handle_wrong_method if
// the callee is deoptimized as we race thru here. If that
// happens we don't want to take a safepoint because the
// caller frame will look interpreted and arguments are now
// "compiled" so it is much better to make this transition
// invisible to the stack walking code. Unfortunately if
// we try and find the callee by normal means a safepoint
// is possible. So we stash the desired callee in the thread
// and the vm will find there should this case occur.
// move methodOop to rax, in case we end up in an c2i adapter.
// the c2i adapters expect methodOop in rax, (c2) because c2's
// resolve stubs return the result (the method) in rax,.
// I'd love to fix this.
}
// ---------------------------------------------------------------
int total_args_passed,
int comp_args_on_stack,
// -------------------------------------------------------------------------
// Generate a C2I adapter. On entry we know rbx, holds the methodOop during calls
// to the interpreter. The args start out packed in the compiled layout. They
// need to be unpacked into the interpreter layout. This will almost always
// require some stack space. We grow the current (compiled) stack, then repack
// the args. We finally end in a jump to the generic interpreter entry point.
// On exit from the interpreter, the interpreter will restore our SP (lest the
// compiled code, which relys solely on SP and not EBP, get sick).
{
// Method might have been compiled since the call site was patched to
// interpreted if that is the case treat it as a miss so we can get
// the call site corrected.
}
}
int total_args_passed) {
// We return the amount of VMRegImpl stack slots we need to reserve for all
// the arguments NOT counting out_preserve_stack_slots.
for( int i = 0; i < total_args_passed; i++) {
// From the type and the argument number (count) compute the location
switch( sig_bt[i] ) {
case T_BOOLEAN:
case T_CHAR:
case T_FLOAT:
case T_BYTE:
case T_SHORT:
case T_INT:
case T_OBJECT:
case T_ARRAY:
case T_ADDRESS:
break;
case T_LONG:
case T_DOUBLE: // The stack numbering is reversed from Java
// Since C arguments do not get reversed, the ordering for
// doubles on the stack must be opposite the Java convention
stack += 2;
break;
default:
break;
}
}
return stack;
}
// A simple move of integer like type
// stack to stack
// __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
// __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
} else {
// stack to reg
}
// reg to stack
// no need to sign extend on 64bit
} else {
}
}
}
// An oop arg. Must pass a handle not the oop itself
int oop_handle_offset,
int framesize_in_slots,
bool is_receiver,
int* receiver_offset) {
// Because of the calling conventions we know that src can be a
// register or a stack location. dst can only be a stack location.
// must pass a handle. First figure out the location we use as a handle
// Oop is already on the stack as an argument
if (is_receiver) {
}
} else {
// Oop is in an a register we must store it to the space we reserve
// on the stack for oop_handles
// Store the handle parameter
if (is_receiver) {
}
}
}
// A float arg may have to do float reg int reg conversion
// Because of the calling convention we know that src is either a stack location
// or an xmm register. dst can only be a stack location.
assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
} else {
// reg to stack
}
}
// A long move
// The only legal possibility for a long_move VMRegPair is:
// 1: two stack slots (possibly unaligned)
// as neither the java or C calling convention will use registers
// for longs.
} else {
}
}
// A double move
// The only legal possibilities for a double_move VMRegPair are:
// The painful thing here is that like long_move a VMRegPair might be
// Because of the calling convention we know that src is either
// 1: a single physical register (xmm registers only)
// 2: two stack slots (possibly unaligned)
// dst can only be a pair of stack slots.
assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
// source is all stack
} else {
// reg to stack
// No worries about stack alignment
}
}
// We always ignore the frame_slots arg and just use the space just below frame pointer
// which by this time is free to use
switch (ret_type) {
case T_FLOAT:
break;
case T_DOUBLE:
break;
case T_VOID: break;
case T_LONG:
break;
default: {
}
}
}
void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
// We always ignore the frame_slots arg and just use the space just below frame pointer
// which by this time is free to use
switch (ret_type) {
case T_FLOAT:
break;
case T_DOUBLE:
break;
case T_LONG:
break;
case T_VOID: break;
default: {
}
}
}
const int stack_slots,
const int total_in_args,
const int arg_save_area,
// if map is non-NULL then the code should store the values,
// otherwise it should load them.
int handle_index = 0;
// Save down double word first
for ( int i = 0; i < total_in_args; i++) {
handle_index += 2;
} else {
}
}
handle_index += 2;
}
} else {
}
}
}
}
// Save or restore single word registers
for ( int i = 0; i < total_in_args; i++) {
}
// Value is in an input register pass we must flush it to the stack
switch (in_sig_bt[i]) {
case T_ARRAY:
} else {
}
break;
case T_BOOLEAN:
case T_CHAR:
case T_BYTE:
case T_SHORT:
case T_INT:
} else {
}
break;
case T_OBJECT:
default: ShouldNotReachHere();
}
} else {
}
}
int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
}
}
}
}
// Check GC_locker::needs_gc and enter the runtime if it's true. This
// keeps a new JNI critical region from starting until a GC has been
// forced. Save down any oops in registers and describe them in an
// OopMap.
int stack_slots,
int total_c_args,
int total_in_args,
int arg_save_area,
// Save down any incoming oops and call into the runtime to halt for a GC
#ifdef ASSERT
if (StressCriticalJNINatives) {
// Stress register saving
// Destroy argument registers
for (int i = 0; i < total_in_args - 1; i++) {
// Nothing to do
} else {
}
i++;
}
}
}
#endif
}
// Unpack an array argument into a pointer to the body and the length
// if the array is non-null, otherwise pass 0 for both.
static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
"possible collision");
"possible collision");
// Pass the length, ptr pair
// Load the arg up from the stack
}
__ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
// load the length relative to the body.
// Pass zeros
}
if (VerifyOops) {
for (int i = 0; i < method->size_of_parameters(); i++) {
if (r->is_stack()) {
} else {
}
}
}
}
}
// Now write the args into the outgoing interpreter space
bool has_receiver = false;
if (ref_kind != 0) {
has_receiver = true;
} else {
}
if (member_reg != noreg) {
// Load the member_arg into register, if necessary.
if (r->is_stack()) {
} else {
// no data motion is needed
member_reg = r->as_Register();
}
}
if (has_receiver) {
// Make sure the receiver is loaded into a register.
if (r->is_stack()) {
// Porting note: This assumes that compiled calling conventions always
// pass the receiver oop in a register. If this is not true on some
// platform, pick a temp and load the receiver from stack.
fatal("receiver always in a register");
} else {
// no data motion is needed
receiver_reg = r->as_Register();
}
}
// Figure out which address we are really jumping to:
}
// ---------------------------------------------------------------------------
// Generate a native wrapper for a given method. The method takes arguments
// in the Java compiled code convention, marshals them to the native
// convention (handlizes oops, etc), transitions to native, makes the call,
// returns to java state (possibly blocking), unhandlizes any result and
// returns.
//
// Critical native functions are a shorthand for the use of
// GetPrimtiveArrayCritical and disallow the use of any other JNI
// functions. The wrapper is expected to unpack the arguments before
// passing them to the callee and perform checks before and after the
// native call to ensure that they GC_locker
// lock_critical/unlock_critical semantics are followed. Some other
// parts of JNI setup are skipped like the tear down of the JNI handle
// block and the check for pending exceptions it's impossible for them
// to be thrown.
//
// They are roughly structured like this:
// if (GC_locker::needs_gc())
// SharedRuntime::block_for_jni_critical();
// tranistion to thread_in_native
// unpack arrray arguments and call native entry point
// check for safepoint in progress
// check if any thread suspend flags are set
// call into JVM and possible unlock the JNI critical
// if a GC was suppressed while in the critical native.
// transition back to thread_in_Java
// return to caller
//
int compile_id,
if (method->is_method_handle_intrinsic()) {
in_regs);
in_ByteSize(-1),
in_ByteSize(-1),
}
bool is_critical_native = true;
if (native_func == NULL) {
is_critical_native = false;
}
// An OopMap for lock (and class if static)
// We have received a description of where all the java arg are located
// on entry to the wrapper. We need to convert these args to where
// the jni function will expect them. To figure out where they go
// we convert the java signature to a C signature by inserting
// the hidden arguments as arg[0] and possibly arg[1] (static method)
if (!is_critical_native) {
total_c_args += 1;
total_c_args++;
}
} else {
for (int i = 0; i < total_in_args; i++) {
total_c_args++;
}
}
}
int argc = 0;
if (!is_critical_native) {
}
for (int i = 0; i < total_in_args ; i++ ) {
}
} else {
for (int i = 0; i < total_in_args ; i++ ) {
// Arrays are passed as int, elem* pair
switch (at[1]) {
default: ShouldNotReachHere();
}
}
} else {
in_elem_bt[i] = T_VOID;
}
}
}
}
// Now figure out where the args must be stored and how much stack space
// they require.
int out_arg_slots;
// Compute framesize for the wrapper. We need to handlize all oops in
// registers a max of 2 on x86.
// Calculate the total number of stack slots we will need.
// First count the abi requirement plus all of the outgoing args
// Now the space for the inbound oop handle area
if (is_critical_native) {
// Critical natives may have to call out so they need a save area
// for register arguments.
int double_slots = 0;
int single_slots = 0;
for ( int i = 0; i < total_in_args; i++) {
switch (in_sig_bt[i]) {
case T_ARRAY: // critical array (uses 2 slots on LP64)
case T_BOOLEAN:
case T_BYTE:
case T_SHORT:
case T_CHAR:
case T_INT: single_slots++; break;
case T_LONG: double_slots++; break;
default: ShouldNotReachHere();
}
switch (in_sig_bt[i]) {
case T_FLOAT: single_slots++; break;
case T_DOUBLE: double_slots++; break;
default: ShouldNotReachHere();
}
}
}
// align the save area
if (double_slots != 0) {
}
}
// Now any space we need for handlizing a klass if static method
int klass_slot_offset = 0;
int lock_slot_offset = 0;
bool is_static = false;
is_static = true;
}
// Plus a lock if needed
if (method->is_synchronized()) {
}
// Now a place (+2) to save return values or temp during shuffling
// + 2 for return address (which we own) and saved rbp,
stack_slots += 4;
// Ok The space we have allocated will look like:
//
//
// FP-> | |
// |---------------------|
// | 2 slots for moves |
// |---------------------|
// | lock box (if sync) |
// |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
// | klass (if static) |
// |---------------------| <- klass_slot_offset
// | oopHandle area |
// |---------------------| <- oop_handle_offset (a max of 2 registers)
// | outbound memory |
// | based arguments |
// | |
// |---------------------|
// | |
// SP-> | out_preserved_slots |
//
//
// ****************************************************************************
// WARNING - on Windows Java Natives use pascal calling convention and pop the
// arguments off of the stack after the jni call. Before the call we can use
// instructions that are SP relative. After the jni call we switch to FP
// relative instructions instead of re-adjusting the stack on windows.
// ****************************************************************************
// Now compute actual number of stack words we need rounding to make
// stack properly aligned.
// First thing make an ic check to see if we should even be here
// We are free to use all registers as temps without saving them and
// restoring them except rbp. rbp is the only callee save register
// as far as the interpreter and the compiler(s) are concerned.
// verified entry must be aligned for code patching.
// and the first 5 bytes must be in the same cache line
// if we align at 8 then we will be sure 5 bytes are in the same line
#ifdef COMPILER1
// Object.hashCode can pull the hashCode from the header word
// instead of doing a full VM transition once it's been computed.
// Since hashCode is usually polymorphic at call sites we can't do
// this optimization at the call site without a lot of work.
// check if locked
if (UseBiasedLocking) {
// Check if biased and fall through to runtime if so
}
// get hash
// test if hashCode exists
}
#endif // COMPILER1
// The instruction at the verified entry point must be 5 bytes or longer
// because it can be patched on the fly by make_non_entrant. The stack bang
// instruction fits that requirement.
// Generate stack overflow check
if (UseStackBanging) {
} else {
// need a 5 byte instruction to allow MT safe patching to non-entrant
}
// Generate a new frame for the wrapper.
// -2 because return address is already present and so is saved rbp
// Frame is now completed as far as size and linkage.
// Calculate the difference between rsp and rbp,. We need to know it
// after the native call because on windows Java Natives will pop
// the arguments and it is painful to do rsp relative addressing
// in a platform independent way. So after the call we switch to
// rbp, relative addressing.
#ifdef COMPILER2
// C2 may leave the stack dirty if not in SSE2+ mode
if (UseSSE >= 2) {
} else {
}
#endif /* COMPILER2 */
// Compute the rbp, offset for any slots used after the jni call
// We use rdi as a thread pointer because it is callee save and
// if we load it once it is usable thru the entire wrapper
// It is callee save so it survives the call to native
if (is_critical_native) {
}
//
// We immediately shuffle the arguments so that any vm call we have to
// make from here on out (sync slow path, jvmti, etc.) we will have
// captured the oops from our caller and have a valid oopMap for
// them.
// -----------------
// The Grand Shuffle
//
// Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
// and, if static, the class mirror instead of a receiver. This pretty much
// guarantees that register layout will not match (and x86 doesn't use reg
// parms though amd does). Since the native abi doesn't use register args
// and the java conventions does we don't have to worry about collisions.
// All of our moved are reg->stack or stack->stack.
// We ignore the extra arguments during the shuffle and handle them at the
// last moment. The shuffle is described by the two calling convention
// vectors we have in our possession. We simply walk the java vector to
// get the source locations and the c vector to get the destinations.
// Record rsp-based slot for receiver on stack for non-static methods
// This is a trick. We double the stack slots so we can claim
// the oops in the caller's frame. Since we are sure to have
// more args than the caller doubling is enough to make
// sure we can capture all the incoming oop args from the
// caller.
//
// Mark location of rbp,
// map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
// We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
// Are free to temporaries if we have to do stack to steck moves.
// All inbound args are referenced based on rbp, and all outbound args via rsp.
for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
switch (in_sig_bt[i]) {
case T_ARRAY:
if (is_critical_native) {
c_arg++;
break;
}
case T_OBJECT:
((i == 0) && (!is_static)),
break;
case T_VOID:
break;
case T_FLOAT:
break;
case T_DOUBLE:
break;
case T_LONG :
break;
default:
}
}
// Pre-load a static method's oop into rsi. Used both by locking code and
// the normal JNI call code.
// load opp into a register
__ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror()));
// Now handlize the static class mirror it's known not-null.
// Now get the handle
// store the klass handle as second argument
}
// Change state to native (we save the return address in the thread, since it might not
// be pushed on the stack when we do a a stack traversal). It is enough that the pc()
// points into the right code segment. It does not have to be the correct return pc.
// We have all of the arguments setup at this point. We must not touch any register
{
}
// RedefineClasses() tracing support for obsolete method entry
}
// Lock a synchronized method
if (method->is_synchronized()) {
// Get the handle (the 2nd argument)
// Get address of the box
// Load the oop from the handle
if (UseBiasedLocking) {
// Note that oop_handle_reg is trashed during this call
__ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
}
// Load immediate 1 into swap_reg %rax,
// Load (object->mark() | 1) into swap_reg %rax,
// Save (object->mark() | 1) into BasicLock's displaced header
}
// src -> dest iff dest == rax, else rax, <- dest
// *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
// Test if the oopMark is an obvious stack pointer, i.e.,
// 1) (mark & 3) == 0, and
// 2) rsp <= mark < mark + os::pagesize()
// These 3 tests can be done by evaluating the following
// expression: ((mark - rsp) & (3 - os::vm_page_size())),
// assuming both stack pointer and pagesize have their
// least significant 2 bits clear.
// NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
// Save the test result, for recursive case, the result is zero
// Slow path will re-enter here
if (UseBiasedLocking) {
// Re-fetch oop_handle_reg as we trashed it above
}
}
// Finally just about ready to make the JNI call
// get JNIEnv* which is first argument to native
if (!is_critical_native) {
}
// Now set thread in native
// Verify or restore cpu control state after JNI call
// WARNING - on Windows Java Natives use pascal calling convention and pop the
// arguments off of the stack. We could just re-adjust the stack pointer here
// and continue to do SP relative addressing but we instead switch to FP
// relative addressing.
// Unpack native results.
switch (ret_type) {
case T_INT : /* nothing to do */ break;
case T_DOUBLE :
case T_FLOAT :
// Result is in st0 we'll save as needed
break;
case T_ARRAY: // Really a handle
case T_OBJECT: // Really a handle
break; // can't de-handlize until after safepoint check
case T_VOID: break;
case T_LONG: break;
default : ShouldNotReachHere();
}
// Switch thread to "native transition" state before reading the synchronization state.
// This additional state is necessary because reading and testing the synchronization
// state is not atomic w.r.t. GC, as this scenario demonstrates:
// Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
// VM thread changes sync state to synchronizing and suspends threads for GC.
// Thread A is resumed to finish this native method, but doesn't block here since it
// didn't see any synchronization is progress, and escapes.
if (UseMembar) {
// Force this write out before the read below
} else {
// Write serialization page so VM thread can do a pseudo remote membar.
// We use the current thread pointer to calculate a thread specific
// offset to write to within the page. This minimizes bus traffic
// due to cache line collision.
}
}
if (AlwaysRestoreFPU) {
// Make sure the control word is correct.
}
Label L;
// Don't use call_VM as it will see a possible pending exception and forward it
// and never return here preventing us from clearing _last_native_pc down below.
// Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
// by hand.
//
if (!is_critical_native) {
} else {
}
// Restore any method result value
if (is_critical_native) {
// The call above performed the transition to thread_in_Java so
// skip the transition logic below.
}
}
// change thread state
__ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
// slow path reguard re-enters here
// Handle possible exception (will unlock if necessary)
// native result if any is live
// Unlock
if (method->is_synchronized()) {
// Get locked oop from the handle we passed to jni
if (UseBiasedLocking) {
}
// Simple recursive lock?
// Must save rax, if if it is live now because cmpxchg must use it
}
// get old displaced header
// get address of the stack lock
// Atomic swap old header if oop still contains the stack lock
}
// src -> dest iff dest == rax, else rax, <- dest
// *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
// slow path re-enters here
}
}
{
// Tell dtrace about this method exit
}
// We can finally stop using that last_Java_frame we setup ages ago
// Unpack oop result
Label L;
}
if (!is_critical_native) {
// reset handle block
// Any exception pending?
}
// no exception, we're almost done
// check that only result value is on FPU stack
// Fixup floating pointer results so that result looks like a return from a compiled method
if (UseSSE >= 1) {
// Pop st0 and store as float and reload into xmm register
}
if (UseSSE >= 2) {
// Pop st0 and store as double and reload into xmm register
}
}
// Return
// Unexpected paths are out of line and go here
// Slow path locking & unlocking
if (method->is_synchronized()) {
// BEGIN Slow path lock
// has last_Java_frame setup. No exceptions so do vanilla call not call_VM
// args are (oop obj, BasicLock* lock, JavaThread* thread)
#ifdef ASSERT
{ Label L;
}
#endif
// END Slow path lock
// BEGIN Slow path unlock
// Slow path unlock
}
// Save pending exception around call to VM (which contains an EXCEPTION_MARK)
// should be a peal
// +wordSize because of the push above
#ifdef ASSERT
{
Label L;
}
#endif /* ASSERT */
}
// END Slow path unlock
}
// SLOW PATH Reguard the stack if needed
{
}
// BEGIN EXCEPTION PROCESSING
if (!is_critical_native) {
// Forward the exception
// remove possible return value from FPU register stack
// pop our frame
// and forward the exception
}
oop_maps);
if (is_critical_native) {
nm->set_lazy_critical_native(true);
}
return nm;
}
#ifdef HAVE_DTRACE_H
// ---------------------------------------------------------------------------
// Generate a dtrace nmethod for a given signature. The method takes arguments
// in the Java compiled code convention, marshals them to the native
// abi and then leaves nops at the position you would expect to call a native
// function. When the probe is enabled the nops are replaced with a trap
// instruction that dtrace inserts and the trace will cause a notification
// to dtrace.
//
// arguments. No other java types are allowed. Strings are converted to utf8
// strings so that from dtrace point of view java strings are converted to C
// strings. There is an arbitrary fixed limit on the total space that a method
// can use for converting the strings. (256 chars per string in the signature).
// So any java string larger then this is truncated.
// generate_dtrace_nmethod is guarded by a mutex so we are sure to
// be single threaded in this method.
// Fill in the signature array, for the calling-convention call.
// The signature we are going to use for the trap that dtrace will see
// is converted to a two-slot long, which is why we double the allocation).
int i=0;
int total_strings = 0;
int first_arg_to_pass = 0;
int total_c_args = 0;
first_arg_to_pass = 1;
}
// We need to convert the java args to where a native (non-jni) function
// would expect them. To figure out where they go we convert the java
// signature to a C signature.
if (s == vmSymbols::java_lang_String()) {
} else if (s == vmSymbols::java_lang_Boolean() ||
s == vmSymbols::java_lang_Character() ||
s == vmSymbols::java_lang_Byte() ||
s == vmSymbols::java_lang_Short() ||
s == vmSymbols::java_lang_Integer() ||
s == vmSymbols::java_lang_Float()) {
} else if (s == vmSymbols::java_lang_Long() ||
s == vmSymbols::java_lang_Double()) {
}
}
}
// Now get the compiled-Java layout as input arguments
int comp_args_on_stack;
// Now figure out where the args must be stored and how much stack space
// they require (neglecting out_preserve_stack_slots).
int out_arg_slots;
// Calculate the total number of stack slots we will need.
// First count the abi requirement plus all of the outgoing args
// Now space for the string(s) we must convert
for (i = 0; i < total_strings ; i++) {
string_locs[i] = stack_slots;
}
// + 2 for return address (which we own) and saved rbp,
stack_slots += 2;
// Ok The space we have allocated will look like:
//
//
// FP-> | |
// |---------------------|
// | string[n] |
// |---------------------| <- string_locs[n]
// | string[n-1] |
// |---------------------| <- string_locs[n-1]
// | ... |
// | ... |
// |---------------------| <- string_locs[1]
// | string[0] |
// |---------------------| <- string_locs[0]
// | outbound memory |
// | based arguments |
// | |
// |---------------------|
// | |
// SP-> | out_preserved_slots |
//
//
// Now compute actual number of stack words we need rounding to make
// stack properly aligned.
// First thing make an ic check to see if we should even be here
// We are free to use all registers as temps without saving them and
// restoring them except rbp. rbp, is the only callee save register
// as far as the interpreter and the compiler(s) are concerned.
// verified entry must be aligned for code patching.
// and the first 5 bytes must be in the same cache line
// if we align at 8 then we will be sure 5 bytes are in the same line
// The instruction at the verified entry point must be 5 bytes or longer
// because it can be patched on the fly by make_non_entrant. The stack bang
// instruction fits that requirement.
// Generate stack overflow check
if (UseStackBanging) {
} else {
}
} else {
// need a 5 byte instruction to allow MT safe patching to non-entrant
}
"valid size for make_non_entrant");
// Generate a new frame for the wrapper.
// -2 because return address is already present and so is saved rbp,
}
// Frame is now completed as far a size and linkage.
// First thing we do store all the args as if we are doing the call.
// Since the C calling convention is stack based that ensures that
// all the Java register args are stored before we need to convert any
// string we might have.
int sid = 0;
int string_reg = 0;
"stack based abi assumed");
case T_ARRAY:
case T_OBJECT:
// Any register based arg for a java string after the first
// will be destroyed by the call to get_utf so we store
// the original value in the location the utf string address
// will eventually be stored.
if (string_reg++ != 0) {
}
}
// need to unbox a one-word value
} else {
}
}
"value(s) must go into stack slots");
}
} else {
// Convert the arg to NULL
}
++c_arg; // Move over the T_VOID To keep the loop indices in sync
}
break;
case T_VOID:
break;
case T_FLOAT:
break;
case T_DOUBLE:
break;
case T_LONG :
break;
default:
}
}
// Now we must convert any string we have to utf8
//
// The first string we find might still be in the original java arg
// register
// This is where the argument will eventually reside
} else {
// Get the copy of the jls object
} else {
// arg is still in the original location
}
string_oop = rcx;
}
// Now we can store the address of the utf string as the argument
// And do the conversion
}
++c_arg; // Move over the T_VOID To keep the loop indices in sync
}
}
// Ok now we are done. Need to place the nop that dtrace wants in order to
// patch in the trap
// Return
return nm;
}
#endif // HAVE_DTRACE_H
// this function returns the adjust size (in number of words) to a c2i adapter
// activation for use during deoptimization
}
return 0;
}
//------------------------------generate_deopt_blob----------------------------
// allocate space for the code
// setup code generation tools
int frame_size_in_words;
// Account for the extra args we place on the stack
// by the time we call fetch_unroll_info
// -------------
// This code enters when returning to a de-optimized nmethod. A return
// address has been pushed on the the stack, and return values are in
// registers.
// If we are doing a normal deopt then we were called from the patched
// nmethod from the point we returned to the nmethod. So the return
// address on the stack is wrong by NativeCall::instruction_size
// We will adjust the value to it looks like we have the original return
// address on the stack (like when we eagerly deoptimized).
// In the case of an exception pending with deoptimized then we enter
// with a return address on the stack that points after the call we patched
// into the exception handler. We have the following register state:
// rax,: exception
// rbx,: exception handler
// rdx: throwing pc
// So in this case we simply jam rdx into the useless return address and
// the stack looks just like we want.
//
// At this point we need to de-opt. We save the argument return
// registers. We call the first C routine, fetch_unroll_info(). This
// routine captures the return values and returns a structure which
// describes the current frame size and the sizes of all replacement frames.
// The current frame is compiled code and may contain many inlined
// functions, each with their own JVM state. We pop the current frame, then
// push all the new frames. Then we call the C routine unpack_frames() to
// populate these frames. Finally unpack_frames() returns us the new target
// address. Notice that callee-save registers are BLOWN here; they have
// already been captured in the vframeArray at the time the return PC was
// patched.
// Prolog for non exception case!
// Save everything in sight.
// Normal deoptimization
// Reexecute case
// return address is the pc describes what bci to do re-execute at
// No need to update map as each call to save_live_registers will produce identical oopmap
// Prolog for exception case
// all registers are dead at this entry point, except for rax, and
// rdx which contain the exception oop and exception pc
// respectively. Set them in TLS and fall thru to the
// unpack_with_exception_in_tls entry point.
// new implementation because exception oop is now passed in JavaThread
// Prolog for exception case
// All registers must be preserved because they might be used by LinearScan
// Exceptiop oop and throwing PC are passed in JavaThread
// tos: stack at point of call to method that threw the exception (i.e. only
// args are on the stack, no return address)
// make room on stack for the return address
// It will be patched later with the throwing pc. The correct value is not
// available now because loading it from memory would destroy registers.
// Save everything in sight.
// No need to update map as each call to save_live_registers will produce identical oopmap
// Now it is safe to overwrite any register
// store the correct deoptimization type
// load throwing pc from JavaThread and patch it as the return address
// of the current frame. Then clear the field in JavaThread
#ifdef ASSERT
// verify that there is really an exception oop in JavaThread
// verify that there is no pending exception
#endif
// Compiled code leaves the floating point stack dirty, empty it.
// Call C code. Need thread and this frame, but NOT official VM entry
// crud. We cannot block on this call, no GC can happen.
// fetch_unroll_info needs to call last_java_frame()
// Need to have an oopmap that tells fetch_unroll_info where to
// find any register it might need.
// Discard arg to fetch_unroll_info
// Load UnrollBlock into EDI
// Move the unpack kind to a safe place in the UnrollBlock because
// we are very short of registers
// retrieve the deopt kind from where we left it.
// Overwrite the result registers with the exception results.
// Stack is back to only having register save data on the stack.
// Now restore the result registers. Everything else is either dead or captured
// in the vframeArray.
// Non standard control word may be leaked out through a safepoint blob, and we can
// deopt at a poll point with the non standard control word. However, we should make
// sure the control word is correct after restore_result_registers.
// All of the register save area has been popped of the stack. Only the
// return address remains.
//
// Frame picture (youngest to oldest)
// 1: self-frame (no frame link)
// 2: deopting frame (no frame link)
// 3: caller of deopting frame (could be compiled/interpreted).
//
// Note: by leaving the return address of self-frame on the stack
// and using the size of frame 2 to adjust the stack
// when we are done the return to frame 3 will still be on the stack.
// Pop deoptimized frame
__ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
// sp should be pointing at the return address to the caller (3)
// Stack bang to make sure there's enough room for these interpreter frames.
if (UseStackBanging) {
}
// Load array of frame pcs into ECX
// Load array of frame sizes into ESI
// Pick up the initial fp we should save
// Now adjust the caller's stack to make up for the extra locals
// but record the original sp so that we can save it in the skeletal interpreter
// frame and the stack walking of interpreter_sender will get the unextended sp
// value and not the "real" sp value.
// Push interpreter frames in a loop
#ifdef CC_INTERP
#ifdef ASSERT
#else /* ASSERT */
#endif /* ASSERT */
#else /* CC_INTERP */
#endif /* CC_INTERP */
#ifdef CC_INTERP
#else /* CC_INTERP */
// This value is corrected by layout_activation_impl
__ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
#endif /* CC_INTERP */
// Re-push self-frame
// Return address and rbp, are in place
// We'll push additional args later. Just allocate a full sized
// register save area
// Restore frame locals after moving the frame
__ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
// Set up the args to unpack_frame
// set last_Java_sp, last_Java_fp
// Call C code. Need thread but NOT official VM entry
// crud. We cannot block on this call, no GC can happen. Call should
// restore return values to their stack-slots with the new SP.
// Set an oopmap for the call site
// rax, contains the return result type
// Collect return values
// Clear floating point stack before returning to interpreter
// Check if we should push the float or double return value.
// return float value as expected by interpreter
if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
// return double value as expected by interpreter
if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
// Pop self-frame.
// Jump to interpreter
// -------------
// make sure all code is generated
_deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
}
#ifdef COMPILER2
//------------------------------generate_uncommon_trap_blob--------------------
// allocate space for the code
// setup code generation tools
enum frame_layout {
// The frame sender code expects that rbp will be in the "natural" place and
// will override any oopMap setting for it. We must therefore force the layout
// so that it agrees with the frame sender code.
};
// Push self-frame.
// rbp, is an implicitly saved callee saved register (i.e. the calling
// there are no callee save registers no that adapter frames are gone.
// Clear the floating point exception stack
// set last_Java_sp
// Call C code. Need thread but NOT official VM entry
// crud. We cannot block on this call, no GC can happen. Call should
// capture callee-saved registers as well as return values.
// argument already in ECX
// Set an oopmap for the call site
// No oopMap for rbp, it is known implicitly
// Load UnrollBlock into EDI
//
// Frame picture (youngest to oldest)
// 1: self-frame (no frame link)
// 2: deopting frame (no frame link)
// 3: caller of deopting frame (could be compiled/interpreted).
// Pop self-frame. We have no frame, and must rely only on EAX and ESP.
// Pop deoptimized frame
__ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
// sp should be pointing at the return address to the caller (3)
// Stack bang to make sure there's enough room for these interpreter frames.
if (UseStackBanging) {
}
// Load array of frame pcs into ECX
// Load array of frame sizes into ESI
// Pick up the initial fp we should save
// Now adjust the caller's stack to make up for the extra locals
// but record the original sp so that we can save it in the skeletal interpreter
// frame and the stack walking of interpreter_sender will get the unextended sp
// value and not the "real" sp value.
// Push interpreter frames in a loop
#ifdef CC_INTERP
#ifdef ASSERT
#else /* ASSERT */
#endif /* ASSERT */
#else /* CC_INTERP */
#endif /* CC_INTERP */
#ifdef CC_INTERP
#else /* CC_INTERP */
// This value is corrected by layout_activation_impl
__ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
#endif /* CC_INTERP */
// Re-push self-frame
// set last_Java_sp, last_Java_fp
// Call C code. Need thread but NOT official VM entry
// crud. We cannot block on this call, no GC can happen. Call should
// restore return values to their stack-slots with the new SP.
// Set an oopmap for the call site
// Pop self-frame.
// Jump to interpreter
// -------------
// make sure all code is generated
}
#endif // COMPILER2
//------------------------------generate_handler_blob------
//
// Generate a special Compile2Runtime blob that saves all registers,
// setup oopmap, and calls safepoint code to stop the compiled code for
// a safepoint.
//
// Account for thread arg in our frame
int frame_size_in_words;
// allocate space for the code
// setup code generation tools
// If cause_return is true we are at a poll_return and there is
// the return address on the stack to the caller on the nmethod
// that is safepoint. We can leave this return on the stack and
// effectively complete the return and safepoint in the caller.
// Otherwise we push space for a return address that the safepoint
// handler will install later to make the stack walking sensible.
if (!cause_return)
map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
// The following is basically a call_VM. However, we need the precise
// address of the call in order to generate an oopmap. Hence, we do all the
// work ourselves.
// Push thread argument and setup last_Java_sp
// if this was not a poll_return then we need to correct the return address now.
if (!cause_return) {
}
// do the call
// Set an oopmap for the call site. This oopmap will map all
// oop-registers and debug-info registers as callee-saved. This
// will allow deoptimization at this safepoint to find all possible
// debug-info recordings, as well as let GC find all oops.
// Discard arg
// Clear last_Java_sp again
// Exception pending
// Normal exit, register restoring and exit
// make sure all code is generated
// Fill-out other meta info
}
//
// generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
//
// Generate a stub that calls into vm to find out the proper destination
// of a java call. All the argument registers are live at this point
// but since this is generic code we don't know what they are and the caller
// must do any gc of the args.
//
// allocate space for the code
int frame_size_words;
enum frame_layout {
extra_words };
// Set an oopmap for the call site.
// We need this not only for callee-saved registers, but also for volatile
// registers that the compiler might be keeping live across a safepoint.
// rax, contains the address we are going to jump to assuming no exception got installed
// clear last_Java_sp
// check for pending exceptions
// get the returned methodOop
// We are back the the original state on entry and ready to go.
// Pending exception after the safepoint
// exception pending => remove activation and forward to exception handler
// -------------
// make sure all code is generated
// return the blob
// frame_size_words or bytes??
return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
}