0N/A/*
3677N/A * Copyright (c) 2005, 2012, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
0N/A *
0N/A */
0N/A
1879N/A#include "precompiled.hpp"
1879N/A#include "c1/c1_Compilation.hpp"
1879N/A#include "c1/c1_FrameMap.hpp"
1879N/A#include "c1/c1_Instruction.hpp"
1879N/A#include "c1/c1_LIRAssembler.hpp"
1879N/A#include "c1/c1_LIRGenerator.hpp"
1879N/A#include "c1/c1_ValueStack.hpp"
1879N/A#include "ci/ciArrayKlass.hpp"
1879N/A#include "ci/ciCPCache.hpp"
1879N/A#include "ci/ciInstance.hpp"
1879N/A#include "runtime/sharedRuntime.hpp"
1879N/A#include "runtime/stubRoutines.hpp"
1879N/A#include "utilities/bitMap.inline.hpp"
1879N/A#ifndef SERIALGC
1879N/A#include "gc_implementation/g1/heapRegion.hpp"
1879N/A#endif
0N/A
0N/A#ifdef ASSERT
0N/A#define __ gen()->lir(__FILE__, __LINE__)->
0N/A#else
0N/A#define __ gen()->lir()->
0N/A#endif
0N/A
1601N/A// TODO: ARM - Use some recognizable constant which still fits architectural constraints
1601N/A#ifdef ARM
1601N/A#define PATCHED_ADDR (204)
1601N/A#else
1601N/A#define PATCHED_ADDR (max_jint)
1601N/A#endif
0N/A
0N/Avoid PhiResolverState::reset(int max_vregs) {
0N/A // Initialize array sizes
0N/A _virtual_operands.at_put_grow(max_vregs - 1, NULL, NULL);
0N/A _virtual_operands.trunc_to(0);
0N/A _other_operands.at_put_grow(max_vregs - 1, NULL, NULL);
0N/A _other_operands.trunc_to(0);
0N/A _vreg_table.at_put_grow(max_vregs - 1, NULL, NULL);
0N/A _vreg_table.trunc_to(0);
0N/A}
0N/A
0N/A
0N/A
0N/A//--------------------------------------------------------------
0N/A// PhiResolver
0N/A
0N/A// Resolves cycles:
0N/A//
0N/A// r1 := r2 becomes temp := r1
0N/A// r2 := r1 r1 := r2
0N/A// r2 := temp
0N/A// and orders moves:
0N/A//
0N/A// r2 := r3 becomes r1 := r2
0N/A// r1 := r2 r2 := r3
0N/A
0N/APhiResolver::PhiResolver(LIRGenerator* gen, int max_vregs)
0N/A : _gen(gen)
0N/A , _state(gen->resolver_state())
0N/A , _temp(LIR_OprFact::illegalOpr)
0N/A{
0N/A // reinitialize the shared state arrays
0N/A _state.reset(max_vregs);
0N/A}
0N/A
0N/A
0N/Avoid PhiResolver::emit_move(LIR_Opr src, LIR_Opr dest) {
0N/A assert(src->is_valid(), "");
0N/A assert(dest->is_valid(), "");
0N/A __ move(src, dest);
0N/A}
0N/A
0N/A
0N/Avoid PhiResolver::move_temp_to(LIR_Opr dest) {
0N/A assert(_temp->is_valid(), "");
0N/A emit_move(_temp, dest);
0N/A NOT_PRODUCT(_temp = LIR_OprFact::illegalOpr);
0N/A}
0N/A
0N/A
0N/Avoid PhiResolver::move_to_temp(LIR_Opr src) {
0N/A assert(_temp->is_illegal(), "");
0N/A _temp = _gen->new_register(src->type());
0N/A emit_move(src, _temp);
0N/A}
0N/A
0N/A
0N/A// Traverse assignment graph in depth first order and generate moves in post order
0N/A// ie. two assignments: b := c, a := b start with node c:
0N/A// Call graph: move(NULL, c) -> move(c, b) -> move(b, a)
0N/A// Generates moves in this order: move b to a and move c to b
0N/A// ie. cycle a := b, b := a start with node a
0N/A// Call graph: move(NULL, a) -> move(a, b) -> move(b, a)
0N/A// Generates moves in this order: move b to temp, move a to b, move temp to a
0N/Avoid PhiResolver::move(ResolveNode* src, ResolveNode* dest) {
0N/A if (!dest->visited()) {
0N/A dest->set_visited();
0N/A for (int i = dest->no_of_destinations()-1; i >= 0; i --) {
0N/A move(dest, dest->destination_at(i));
0N/A }
0N/A } else if (!dest->start_node()) {
0N/A // cylce in graph detected
0N/A assert(_loop == NULL, "only one loop valid!");
0N/A _loop = dest;
0N/A move_to_temp(src->operand());
0N/A return;
0N/A } // else dest is a start node
0N/A
0N/A if (!dest->assigned()) {
0N/A if (_loop == dest) {
0N/A move_temp_to(dest->operand());
0N/A dest->set_assigned();
0N/A } else if (src != NULL) {
0N/A emit_move(src->operand(), dest->operand());
0N/A dest->set_assigned();
0N/A }
0N/A }
0N/A}
0N/A
0N/A
0N/APhiResolver::~PhiResolver() {
0N/A int i;
0N/A // resolve any cycles in moves from and to virtual registers
0N/A for (i = virtual_operands().length() - 1; i >= 0; i --) {
0N/A ResolveNode* node = virtual_operands()[i];
0N/A if (!node->visited()) {
0N/A _loop = NULL;
0N/A move(NULL, node);
0N/A node->set_start_node();
0N/A assert(_temp->is_illegal(), "move_temp_to() call missing");
0N/A }
0N/A }
0N/A
0N/A // generate move for move from non virtual register to abitrary destination
0N/A for (i = other_operands().length() - 1; i >= 0; i --) {
0N/A ResolveNode* node = other_operands()[i];
0N/A for (int j = node->no_of_destinations() - 1; j >= 0; j --) {
0N/A emit_move(node->operand(), node->destination_at(j)->operand());
0N/A }
0N/A }
0N/A}
0N/A
0N/A
0N/AResolveNode* PhiResolver::create_node(LIR_Opr opr, bool source) {
0N/A ResolveNode* node;
0N/A if (opr->is_virtual()) {
0N/A int vreg_num = opr->vreg_number();
0N/A node = vreg_table().at_grow(vreg_num, NULL);
0N/A assert(node == NULL || node->operand() == opr, "");
0N/A if (node == NULL) {
0N/A node = new ResolveNode(opr);
0N/A vreg_table()[vreg_num] = node;
0N/A }
0N/A // Make sure that all virtual operands show up in the list when
0N/A // they are used as the source of a move.
0N/A if (source && !virtual_operands().contains(node)) {
0N/A virtual_operands().append(node);
0N/A }
0N/A } else {
0N/A assert(source, "");
0N/A node = new ResolveNode(opr);
0N/A other_operands().append(node);
0N/A }
0N/A return node;
0N/A}
0N/A
0N/A
0N/Avoid PhiResolver::move(LIR_Opr src, LIR_Opr dest) {
0N/A assert(dest->is_virtual(), "");
0N/A // tty->print("move "); src->print(); tty->print(" to "); dest->print(); tty->cr();
0N/A assert(src->is_valid(), "");
0N/A assert(dest->is_valid(), "");
0N/A ResolveNode* source = source_node(src);
0N/A source->append(destination_node(dest));
0N/A}
0N/A
0N/A
0N/A//--------------------------------------------------------------
0N/A// LIRItem
0N/A
0N/Avoid LIRItem::set_result(LIR_Opr opr) {
0N/A assert(value()->operand()->is_illegal() || value()->operand()->is_constant(), "operand should never change");
0N/A value()->set_operand(opr);
0N/A
0N/A if (opr->is_virtual()) {
0N/A _gen->_instruction_for_operand.at_put_grow(opr->vreg_number(), value(), NULL);
0N/A }
0N/A
0N/A _result = opr;
0N/A}
0N/A
0N/Avoid LIRItem::load_item() {
0N/A if (result()->is_illegal()) {
0N/A // update the items result
0N/A _result = value()->operand();
0N/A }
0N/A if (!result()->is_register()) {
0N/A LIR_Opr reg = _gen->new_register(value()->type());
0N/A __ move(result(), reg);
0N/A if (result()->is_constant()) {
0N/A _result = reg;
0N/A } else {
0N/A set_result(reg);
0N/A }
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRItem::load_for_store(BasicType type) {
0N/A if (_gen->can_store_as_constant(value(), type)) {
0N/A _result = value()->operand();
0N/A if (!_result->is_constant()) {
0N/A _result = LIR_OprFact::value_type(value()->type());
0N/A }
0N/A } else if (type == T_BYTE || type == T_BOOLEAN) {
0N/A load_byte_item();
0N/A } else {
0N/A load_item();
0N/A }
0N/A}
0N/A
0N/Avoid LIRItem::load_item_force(LIR_Opr reg) {
0N/A LIR_Opr r = result();
0N/A if (r != reg) {
1601N/A#if !defined(ARM) && !defined(E500V2)
0N/A if (r->type() != reg->type()) {
0N/A // moves between different types need an intervening spill slot
1601N/A r = _gen->force_to_spill(r, reg->type());
0N/A }
1601N/A#endif
1601N/A __ move(r, reg);
0N/A _result = reg;
0N/A }
0N/A}
0N/A
0N/AciObject* LIRItem::get_jobject_constant() const {
0N/A ObjectType* oc = type()->as_ObjectType();
0N/A if (oc) {
0N/A return oc->constant_value();
0N/A }
0N/A return NULL;
0N/A}
0N/A
0N/A
0N/Ajint LIRItem::get_jint_constant() const {
0N/A assert(is_constant() && value() != NULL, "");
0N/A assert(type()->as_IntConstant() != NULL, "type check");
0N/A return type()->as_IntConstant()->value();
0N/A}
0N/A
0N/A
0N/Ajint LIRItem::get_address_constant() const {
0N/A assert(is_constant() && value() != NULL, "");
0N/A assert(type()->as_AddressConstant() != NULL, "type check");
0N/A return type()->as_AddressConstant()->value();
0N/A}
0N/A
0N/A
0N/Ajfloat LIRItem::get_jfloat_constant() const {
0N/A assert(is_constant() && value() != NULL, "");
0N/A assert(type()->as_FloatConstant() != NULL, "type check");
0N/A return type()->as_FloatConstant()->value();
0N/A}
0N/A
0N/A
0N/Ajdouble LIRItem::get_jdouble_constant() const {
0N/A assert(is_constant() && value() != NULL, "");
0N/A assert(type()->as_DoubleConstant() != NULL, "type check");
0N/A return type()->as_DoubleConstant()->value();
0N/A}
0N/A
0N/A
0N/Ajlong LIRItem::get_jlong_constant() const {
0N/A assert(is_constant() && value() != NULL, "");
0N/A assert(type()->as_LongConstant() != NULL, "type check");
0N/A return type()->as_LongConstant()->value();
0N/A}
0N/A
0N/A
0N/A
0N/A//--------------------------------------------------------------
0N/A
0N/A
0N/Avoid LIRGenerator::init() {
342N/A _bs = Universe::heap()->barrier_set();
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::block_do_prolog(BlockBegin* block) {
0N/A#ifndef PRODUCT
0N/A if (PrintIRWithLIR) {
0N/A block->print();
0N/A }
0N/A#endif
0N/A
0N/A // set up the list of LIR instructions
0N/A assert(block->lir() == NULL, "LIR list already computed for this block");
0N/A _lir = new LIR_List(compilation(), block);
0N/A block->set_lir(_lir);
0N/A
0N/A __ branch_destination(block->label());
0N/A
0N/A if (LIRTraceExecution &&
1504N/A Compilation::current()->hir()->start()->block_id() != block->block_id() &&
0N/A !block->is_set(BlockBegin::exception_entry_flag)) {
0N/A assert(block->lir()->instructions_list()->length() == 1, "should come right after br_dst");
0N/A trace_block_entry(block);
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::block_do_epilog(BlockBegin* block) {
0N/A#ifndef PRODUCT
0N/A if (PrintIRWithLIR) {
0N/A tty->cr();
0N/A }
0N/A#endif
0N/A
0N/A // LIR_Opr for unpinned constants shouldn't be referenced by other
0N/A // blocks so clear them out after processing the block.
0N/A for (int i = 0; i < _unpinned_constants.length(); i++) {
0N/A _unpinned_constants.at(i)->clear_operand();
0N/A }
0N/A _unpinned_constants.trunc_to(0);
0N/A
0N/A // clear our any registers for other local constants
0N/A _constants.trunc_to(0);
0N/A _reg_for_constants.trunc_to(0);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::block_do(BlockBegin* block) {
0N/A CHECK_BAILOUT();
0N/A
0N/A block_do_prolog(block);
0N/A set_block(block);
0N/A
0N/A for (Instruction* instr = block; instr != NULL; instr = instr->next()) {
0N/A if (instr->is_pinned()) do_root(instr);
0N/A }
0N/A
0N/A set_block(NULL);
0N/A block_do_epilog(block);
0N/A}
0N/A
0N/A
0N/A//-------------------------LIRGenerator-----------------------------
0N/A
0N/A// This is where the tree-walk starts; instr must be root;
0N/Avoid LIRGenerator::do_root(Value instr) {
0N/A CHECK_BAILOUT();
0N/A
0N/A InstructionMark im(compilation(), instr);
0N/A
0N/A assert(instr->is_pinned(), "use only with roots");
0N/A assert(instr->subst() == instr, "shouldn't have missed substitution");
0N/A
0N/A instr->visit(this);
0N/A
0N/A assert(!instr->has_uses() || instr->operand()->is_valid() ||
0N/A instr->as_Constant() != NULL || bailed_out(), "invalid item set");
0N/A}
0N/A
0N/A
0N/A// This is called for each node in tree; the walk stops if a root is reached
0N/Avoid LIRGenerator::walk(Value instr) {
0N/A InstructionMark im(compilation(), instr);
0N/A //stop walk when encounter a root
0N/A if (instr->is_pinned() && instr->as_Phi() == NULL || instr->operand()->is_valid()) {
0N/A assert(instr->operand() != LIR_OprFact::illegalOpr || instr->as_Constant() != NULL, "this root has not yet been visited");
0N/A } else {
0N/A assert(instr->subst() == instr, "shouldn't have missed substitution");
0N/A instr->visit(this);
0N/A // assert(instr->use_count() > 0 || instr->as_Phi() != NULL, "leaf instruction must have a use");
0N/A }
0N/A}
0N/A
0N/A
0N/ACodeEmitInfo* LIRGenerator::state_for(Instruction* x, ValueStack* state, bool ignore_xhandler) {
1739N/A assert(state != NULL, "state must be defined");
1739N/A
1739N/A ValueStack* s = state;
1739N/A for_each_state(s) {
1739N/A if (s->kind() == ValueStack::EmptyExceptionState) {
1739N/A assert(s->stack_size() == 0 && s->locals_size() == 0 && (s->locks_size() == 0 || s->locks_size() == 1), "state must be empty");
1739N/A continue;
0N/A }
1739N/A
1739N/A int index;
1739N/A Value value;
1739N/A for_each_stack_value(s, index, value) {
1739N/A assert(value->subst() == value, "missed substitution");
1739N/A if (!value->is_pinned() && value->as_Constant() == NULL && value->as_Local() == NULL) {
1739N/A walk(value);
1739N/A assert(value->operand()->is_valid(), "must be evaluated now");
1739N/A }
1739N/A }
1739N/A
1739N/A int bci = s->bci();
0N/A IRScope* scope = s->scope();
0N/A ciMethod* method = scope->method();
0N/A
0N/A MethodLivenessResult liveness = method->liveness_at_bci(bci);
0N/A if (bci == SynchronizationEntryBCI) {
0N/A if (x->as_ExceptionObject() || x->as_Throw()) {
0N/A // all locals are dead on exit from the synthetic unlocker
0N/A liveness.clear();
0N/A } else {
2959N/A assert(x->as_MonitorEnter() || x->as_ProfileInvoke(), "only other cases are MonitorEnter and ProfileInvoke");
0N/A }
0N/A }
0N/A if (!liveness.is_valid()) {
0N/A // Degenerate or breakpointed method.
0N/A bailout("Degenerate or breakpointed method");
0N/A } else {
0N/A assert((int)liveness.size() == s->locals_size(), "error in use of liveness");
0N/A for_each_local_value(s, index, value) {
0N/A assert(value->subst() == value, "missed substition");
0N/A if (liveness.at(index) && !value->type()->is_illegal()) {
0N/A if (!value->is_pinned() && value->as_Constant() == NULL && value->as_Local() == NULL) {
0N/A walk(value);
0N/A assert(value->operand()->is_valid(), "must be evaluated now");
0N/A }
0N/A } else {
0N/A // NULL out this local so that linear scan can assume that all non-NULL values are live.
0N/A s->invalidate_local(index);
0N/A }
0N/A }
0N/A }
0N/A }
0N/A
1739N/A return new CodeEmitInfo(state, ignore_xhandler ? NULL : x->exception_handlers());
0N/A}
0N/A
0N/A
0N/ACodeEmitInfo* LIRGenerator::state_for(Instruction* x) {
1739N/A return state_for(x, x->exception_state());
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::jobject2reg_with_patching(LIR_Opr r, ciObject* obj, CodeEmitInfo* info) {
0N/A if (!obj->is_loaded() || PatchALot) {
0N/A assert(info != NULL, "info must be set if class is not loaded");
0N/A __ oop2reg_patch(NULL, r, info);
0N/A } else {
0N/A // no patching needed
989N/A __ oop2reg(obj->constant_encoding(), r);
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::array_range_check(LIR_Opr array, LIR_Opr index,
0N/A CodeEmitInfo* null_check_info, CodeEmitInfo* range_check_info) {
0N/A CodeStub* stub = new RangeCheckStub(range_check_info, index);
0N/A if (index->is_constant()) {
0N/A cmp_mem_int(lir_cond_belowEqual, array, arrayOopDesc::length_offset_in_bytes(),
0N/A index->as_jint(), null_check_info);
0N/A __ branch(lir_cond_belowEqual, T_INT, stub); // forward branch
0N/A } else {
0N/A cmp_reg_mem(lir_cond_aboveEqual, index, array,
0N/A arrayOopDesc::length_offset_in_bytes(), T_INT, null_check_info);
0N/A __ branch(lir_cond_aboveEqual, T_INT, stub); // forward branch
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::nio_range_check(LIR_Opr buffer, LIR_Opr index, LIR_Opr result, CodeEmitInfo* info) {
0N/A CodeStub* stub = new RangeCheckStub(info, index, true);
0N/A if (index->is_constant()) {
0N/A cmp_mem_int(lir_cond_belowEqual, buffer, java_nio_Buffer::limit_offset(), index->as_jint(), info);
0N/A __ branch(lir_cond_belowEqual, T_INT, stub); // forward branch
0N/A } else {
0N/A cmp_reg_mem(lir_cond_aboveEqual, index, buffer,
0N/A java_nio_Buffer::limit_offset(), T_INT, info);
0N/A __ branch(lir_cond_aboveEqual, T_INT, stub); // forward branch
0N/A }
0N/A __ move(index, result);
0N/A}
0N/A
0N/A
0N/A
0N/Avoid LIRGenerator::arithmetic_op(Bytecodes::Code code, LIR_Opr result, LIR_Opr left, LIR_Opr right, bool is_strictfp, LIR_Opr tmp_op, CodeEmitInfo* info) {
0N/A LIR_Opr result_op = result;
0N/A LIR_Opr left_op = left;
0N/A LIR_Opr right_op = right;
0N/A
0N/A if (TwoOperandLIRForm && left_op != result_op) {
0N/A assert(right_op != result_op, "malformed");
0N/A __ move(left_op, result_op);
0N/A left_op = result_op;
0N/A }
0N/A
0N/A switch(code) {
0N/A case Bytecodes::_dadd:
0N/A case Bytecodes::_fadd:
0N/A case Bytecodes::_ladd:
0N/A case Bytecodes::_iadd: __ add(left_op, right_op, result_op); break;
0N/A case Bytecodes::_fmul:
0N/A case Bytecodes::_lmul: __ mul(left_op, right_op, result_op); break;
0N/A
0N/A case Bytecodes::_dmul:
0N/A {
0N/A if (is_strictfp) {
0N/A __ mul_strictfp(left_op, right_op, result_op, tmp_op); break;
0N/A } else {
0N/A __ mul(left_op, right_op, result_op); break;
0N/A }
0N/A }
0N/A break;
0N/A
0N/A case Bytecodes::_imul:
0N/A {
0N/A bool did_strength_reduce = false;
0N/A
0N/A if (right->is_constant()) {
0N/A int c = right->as_jint();
0N/A if (is_power_of_2(c)) {
0N/A // do not need tmp here
0N/A __ shift_left(left_op, exact_log2(c), result_op);
0N/A did_strength_reduce = true;
0N/A } else {
0N/A did_strength_reduce = strength_reduce_multiply(left_op, c, result_op, tmp_op);
0N/A }
0N/A }
0N/A // we couldn't strength reduce so just emit the multiply
0N/A if (!did_strength_reduce) {
0N/A __ mul(left_op, right_op, result_op);
0N/A }
0N/A }
0N/A break;
0N/A
0N/A case Bytecodes::_dsub:
0N/A case Bytecodes::_fsub:
0N/A case Bytecodes::_lsub:
0N/A case Bytecodes::_isub: __ sub(left_op, right_op, result_op); break;
0N/A
0N/A case Bytecodes::_fdiv: __ div (left_op, right_op, result_op); break;
0N/A // ldiv and lrem are implemented with a direct runtime call
0N/A
0N/A case Bytecodes::_ddiv:
0N/A {
0N/A if (is_strictfp) {
0N/A __ div_strictfp (left_op, right_op, result_op, tmp_op); break;
0N/A } else {
0N/A __ div (left_op, right_op, result_op); break;
0N/A }
0N/A }
0N/A break;
0N/A
0N/A case Bytecodes::_drem:
0N/A case Bytecodes::_frem: __ rem (left_op, right_op, result_op); break;
0N/A
0N/A default: ShouldNotReachHere();
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::arithmetic_op_int(Bytecodes::Code code, LIR_Opr result, LIR_Opr left, LIR_Opr right, LIR_Opr tmp) {
0N/A arithmetic_op(code, result, left, right, false, tmp);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::arithmetic_op_long(Bytecodes::Code code, LIR_Opr result, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info) {
0N/A arithmetic_op(code, result, left, right, false, LIR_OprFact::illegalOpr, info);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::arithmetic_op_fpu(Bytecodes::Code code, LIR_Opr result, LIR_Opr left, LIR_Opr right, bool is_strictfp, LIR_Opr tmp) {
0N/A arithmetic_op(code, result, left, right, is_strictfp, tmp);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::shift_op(Bytecodes::Code code, LIR_Opr result_op, LIR_Opr value, LIR_Opr count, LIR_Opr tmp) {
0N/A if (TwoOperandLIRForm && value != result_op) {
0N/A assert(count != result_op, "malformed");
0N/A __ move(value, result_op);
0N/A value = result_op;
0N/A }
0N/A
0N/A assert(count->is_constant() || count->is_register(), "must be");
0N/A switch(code) {
0N/A case Bytecodes::_ishl:
0N/A case Bytecodes::_lshl: __ shift_left(value, count, result_op, tmp); break;
0N/A case Bytecodes::_ishr:
0N/A case Bytecodes::_lshr: __ shift_right(value, count, result_op, tmp); break;
0N/A case Bytecodes::_iushr:
0N/A case Bytecodes::_lushr: __ unsigned_shift_right(value, count, result_op, tmp); break;
0N/A default: ShouldNotReachHere();
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::logic_op (Bytecodes::Code code, LIR_Opr result_op, LIR_Opr left_op, LIR_Opr right_op) {
0N/A if (TwoOperandLIRForm && left_op != result_op) {
0N/A assert(right_op != result_op, "malformed");
0N/A __ move(left_op, result_op);
0N/A left_op = result_op;
0N/A }
0N/A
0N/A switch(code) {
0N/A case Bytecodes::_iand:
0N/A case Bytecodes::_land: __ logical_and(left_op, right_op, result_op); break;
0N/A
0N/A case Bytecodes::_ior:
0N/A case Bytecodes::_lor: __ logical_or(left_op, right_op, result_op); break;
0N/A
0N/A case Bytecodes::_ixor:
0N/A case Bytecodes::_lxor: __ logical_xor(left_op, right_op, result_op); break;
0N/A
0N/A default: ShouldNotReachHere();
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::monitor_enter(LIR_Opr object, LIR_Opr lock, LIR_Opr hdr, LIR_Opr scratch, int monitor_no, CodeEmitInfo* info_for_exception, CodeEmitInfo* info) {
0N/A if (!GenerateSynchronizationCode) return;
0N/A // for slow path, use debug info for state after successful locking
0N/A CodeStub* slow_path = new MonitorEnterStub(object, lock, info);
0N/A __ load_stack_address_monitor(monitor_no, lock);
0N/A // for handling NullPointerException, use debug info representing just the lock stack before this monitorenter
0N/A __ lock_object(hdr, object, lock, scratch, slow_path, info_for_exception);
0N/A}
0N/A
0N/A
1601N/Avoid LIRGenerator::monitor_exit(LIR_Opr object, LIR_Opr lock, LIR_Opr new_hdr, LIR_Opr scratch, int monitor_no) {
0N/A if (!GenerateSynchronizationCode) return;
0N/A // setup registers
0N/A LIR_Opr hdr = lock;
0N/A lock = new_hdr;
0N/A CodeStub* slow_path = new MonitorExitStub(lock, UseFastLocking, monitor_no);
0N/A __ load_stack_address_monitor(monitor_no, lock);
1601N/A __ unlock_object(hdr, object, lock, scratch, slow_path);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::new_instance(LIR_Opr dst, ciInstanceKlass* klass, LIR_Opr scratch1, LIR_Opr scratch2, LIR_Opr scratch3, LIR_Opr scratch4, LIR_Opr klass_reg, CodeEmitInfo* info) {
0N/A jobject2reg_with_patching(klass_reg, klass, info);
0N/A // If klass is not loaded we do not know if the klass has finalizers:
0N/A if (UseFastNewInstance && klass->is_loaded()
0N/A && !Klass::layout_helper_needs_slow_path(klass->layout_helper())) {
0N/A
0N/A Runtime1::StubID stub_id = klass->is_initialized() ? Runtime1::fast_new_instance_id : Runtime1::fast_new_instance_init_check_id;
0N/A
0N/A CodeStub* slow_path = new NewInstanceStub(klass_reg, dst, klass, info, stub_id);
0N/A
0N/A assert(klass->is_loaded(), "must be loaded");
0N/A // allocate space for instance
0N/A assert(klass->size_helper() >= 0, "illegal instance size");
0N/A const int instance_size = align_object_size(klass->size_helper());
0N/A __ allocate_object(dst, scratch1, scratch2, scratch3, scratch4,
0N/A oopDesc::header_size(), instance_size, klass_reg, !klass->is_initialized(), slow_path);
0N/A } else {
0N/A CodeStub* slow_path = new NewInstanceStub(klass_reg, dst, klass, info, Runtime1::new_instance_id);
0N/A __ branch(lir_cond_always, T_ILLEGAL, slow_path);
0N/A __ branch_destination(slow_path->continuation());
0N/A }
0N/A}
0N/A
0N/A
0N/Astatic bool is_constant_zero(Instruction* inst) {
0N/A IntConstant* c = inst->type()->as_IntConstant();
0N/A if (c) {
0N/A return (c->value() == 0);
0N/A }
0N/A return false;
0N/A}
0N/A
0N/A
0N/Astatic bool positive_constant(Instruction* inst) {
0N/A IntConstant* c = inst->type()->as_IntConstant();
0N/A if (c) {
0N/A return (c->value() >= 0);
0N/A }
0N/A return false;
0N/A}
0N/A
0N/A
0N/Astatic ciArrayKlass* as_array_klass(ciType* type) {
0N/A if (type != NULL && type->is_array_klass() && type->is_loaded()) {
0N/A return (ciArrayKlass*)type;
0N/A } else {
0N/A return NULL;
0N/A }
0N/A}
0N/A
2293N/Astatic Value maxvalue(IfOp* ifop) {
2293N/A switch (ifop->cond()) {
2293N/A case If::eql: return NULL;
2293N/A case If::neq: return NULL;
2293N/A case If::lss: // x < y ? x : y
2293N/A case If::leq: // x <= y ? x : y
2293N/A if (ifop->x() == ifop->tval() &&
2293N/A ifop->y() == ifop->fval()) return ifop->y();
2293N/A return NULL;
2293N/A
2293N/A case If::gtr: // x > y ? y : x
2293N/A case If::geq: // x >= y ? y : x
2293N/A if (ifop->x() == ifop->tval() &&
2293N/A ifop->y() == ifop->fval()) return ifop->y();
2293N/A return NULL;
2293N/A
2293N/A }
2293N/A}
2293N/A
2293N/Astatic ciType* phi_declared_type(Phi* phi) {
2293N/A ciType* t = phi->operand_at(0)->declared_type();
2293N/A if (t == NULL) {
2293N/A return NULL;
2293N/A }
2293N/A for(int i = 1; i < phi->operand_count(); i++) {
2293N/A if (t != phi->operand_at(i)->declared_type()) {
2293N/A return NULL;
2293N/A }
2293N/A }
2293N/A return t;
2293N/A}
2293N/A
0N/Avoid LIRGenerator::arraycopy_helper(Intrinsic* x, int* flagsp, ciArrayKlass** expected_typep) {
0N/A Instruction* src = x->argument_at(0);
0N/A Instruction* src_pos = x->argument_at(1);
0N/A Instruction* dst = x->argument_at(2);
0N/A Instruction* dst_pos = x->argument_at(3);
0N/A Instruction* length = x->argument_at(4);
0N/A
0N/A // first try to identify the likely type of the arrays involved
0N/A ciArrayKlass* expected_type = NULL;
2293N/A bool is_exact = false, src_objarray = false, dst_objarray = false;
0N/A {
0N/A ciArrayKlass* src_exact_type = as_array_klass(src->exact_type());
0N/A ciArrayKlass* src_declared_type = as_array_klass(src->declared_type());
2293N/A Phi* phi;
2293N/A if (src_declared_type == NULL && (phi = src->as_Phi()) != NULL) {
2293N/A src_declared_type = as_array_klass(phi_declared_type(phi));
2293N/A }
0N/A ciArrayKlass* dst_exact_type = as_array_klass(dst->exact_type());
0N/A ciArrayKlass* dst_declared_type = as_array_klass(dst->declared_type());
2293N/A if (dst_declared_type == NULL && (phi = dst->as_Phi()) != NULL) {
2293N/A dst_declared_type = as_array_klass(phi_declared_type(phi));
2293N/A }
2293N/A
0N/A if (src_exact_type != NULL && src_exact_type == dst_exact_type) {
0N/A // the types exactly match so the type is fully known
0N/A is_exact = true;
0N/A expected_type = src_exact_type;
0N/A } else if (dst_exact_type != NULL && dst_exact_type->is_obj_array_klass()) {
0N/A ciArrayKlass* dst_type = (ciArrayKlass*) dst_exact_type;
0N/A ciArrayKlass* src_type = NULL;
0N/A if (src_exact_type != NULL && src_exact_type->is_obj_array_klass()) {
0N/A src_type = (ciArrayKlass*) src_exact_type;
0N/A } else if (src_declared_type != NULL && src_declared_type->is_obj_array_klass()) {
0N/A src_type = (ciArrayKlass*) src_declared_type;
0N/A }
0N/A if (src_type != NULL) {
0N/A if (src_type->element_type()->is_subtype_of(dst_type->element_type())) {
0N/A is_exact = true;
0N/A expected_type = dst_type;
0N/A }
0N/A }
0N/A }
0N/A // at least pass along a good guess
0N/A if (expected_type == NULL) expected_type = dst_exact_type;
0N/A if (expected_type == NULL) expected_type = src_declared_type;
0N/A if (expected_type == NULL) expected_type = dst_declared_type;
2293N/A
2293N/A src_objarray = (src_exact_type && src_exact_type->is_obj_array_klass()) || (src_declared_type && src_declared_type->is_obj_array_klass());
2293N/A dst_objarray = (dst_exact_type && dst_exact_type->is_obj_array_klass()) || (dst_declared_type && dst_declared_type->is_obj_array_klass());
0N/A }
0N/A
0N/A // if a probable array type has been identified, figure out if any
0N/A // of the required checks for a fast case can be elided.
0N/A int flags = LIR_OpArrayCopy::all_flags;
2293N/A
2293N/A if (!src_objarray)
2293N/A flags &= ~LIR_OpArrayCopy::src_objarray;
2293N/A if (!dst_objarray)
2293N/A flags &= ~LIR_OpArrayCopy::dst_objarray;
2293N/A
2293N/A if (!x->arg_needs_null_check(0))
2293N/A flags &= ~LIR_OpArrayCopy::src_null_check;
2293N/A if (!x->arg_needs_null_check(2))
2293N/A flags &= ~LIR_OpArrayCopy::dst_null_check;
2293N/A
2293N/A
0N/A if (expected_type != NULL) {
2293N/A Value length_limit = NULL;
2293N/A
2293N/A IfOp* ifop = length->as_IfOp();
2293N/A if (ifop != NULL) {
2293N/A // look for expressions like min(v, a.length) which ends up as
2293N/A // x > y ? y : x or x >= y ? y : x
2293N/A if ((ifop->cond() == If::gtr || ifop->cond() == If::geq) &&
2293N/A ifop->x() == ifop->fval() &&
2293N/A ifop->y() == ifop->tval()) {
2293N/A length_limit = ifop->y();
2293N/A }
2293N/A }
2293N/A
2293N/A // try to skip null checks and range checks
2293N/A NewArray* src_array = src->as_NewArray();
2293N/A if (src_array != NULL) {
0N/A flags &= ~LIR_OpArrayCopy::src_null_check;
2293N/A if (length_limit != NULL &&
2293N/A src_array->length() == length_limit &&
2293N/A is_constant_zero(src_pos)) {
2293N/A flags &= ~LIR_OpArrayCopy::src_range_check;
2293N/A }
2293N/A }
2293N/A
2293N/A NewArray* dst_array = dst->as_NewArray();
2293N/A if (dst_array != NULL) {
0N/A flags &= ~LIR_OpArrayCopy::dst_null_check;
2293N/A if (length_limit != NULL &&
2293N/A dst_array->length() == length_limit &&
2293N/A is_constant_zero(dst_pos)) {
2293N/A flags &= ~LIR_OpArrayCopy::dst_range_check;
2293N/A }
2293N/A }
0N/A
0N/A // check from incoming constant values
0N/A if (positive_constant(src_pos))
0N/A flags &= ~LIR_OpArrayCopy::src_pos_positive_check;
0N/A if (positive_constant(dst_pos))
0N/A flags &= ~LIR_OpArrayCopy::dst_pos_positive_check;
0N/A if (positive_constant(length))
0N/A flags &= ~LIR_OpArrayCopy::length_positive_check;
0N/A
0N/A // see if the range check can be elided, which might also imply
0N/A // that src or dst is non-null.
0N/A ArrayLength* al = length->as_ArrayLength();
0N/A if (al != NULL) {
0N/A if (al->array() == src) {
0N/A // it's the length of the source array
0N/A flags &= ~LIR_OpArrayCopy::length_positive_check;
0N/A flags &= ~LIR_OpArrayCopy::src_null_check;
0N/A if (is_constant_zero(src_pos))
0N/A flags &= ~LIR_OpArrayCopy::src_range_check;
0N/A }
0N/A if (al->array() == dst) {
0N/A // it's the length of the destination array
0N/A flags &= ~LIR_OpArrayCopy::length_positive_check;
0N/A flags &= ~LIR_OpArrayCopy::dst_null_check;
0N/A if (is_constant_zero(dst_pos))
0N/A flags &= ~LIR_OpArrayCopy::dst_range_check;
0N/A }
0N/A }
0N/A if (is_exact) {
0N/A flags &= ~LIR_OpArrayCopy::type_check;
0N/A }
0N/A }
0N/A
2293N/A IntConstant* src_int = src_pos->type()->as_IntConstant();
2293N/A IntConstant* dst_int = dst_pos->type()->as_IntConstant();
2293N/A if (src_int && dst_int) {
2293N/A int s_offs = src_int->value();
2293N/A int d_offs = dst_int->value();
2293N/A if (src_int->value() >= dst_int->value()) {
2293N/A flags &= ~LIR_OpArrayCopy::overlapping;
2293N/A }
2293N/A if (expected_type != NULL) {
2293N/A BasicType t = expected_type->element_type()->basic_type();
2293N/A int element_size = type2aelembytes(t);
2293N/A if (((arrayOopDesc::base_offset_in_bytes(t) + s_offs * element_size) % HeapWordSize == 0) &&
2293N/A ((arrayOopDesc::base_offset_in_bytes(t) + d_offs * element_size) % HeapWordSize == 0)) {
2293N/A flags &= ~LIR_OpArrayCopy::unaligned;
2293N/A }
2293N/A }
2293N/A } else if (src_pos == dst_pos || is_constant_zero(dst_pos)) {
2293N/A // src and dest positions are the same, or dst is zero so assume
2293N/A // nonoverlapping copy.
2293N/A flags &= ~LIR_OpArrayCopy::overlapping;
2293N/A }
2293N/A
0N/A if (src == dst) {
0N/A // moving within a single array so no type checks are needed
0N/A if (flags & LIR_OpArrayCopy::type_check) {
0N/A flags &= ~LIR_OpArrayCopy::type_check;
0N/A }
0N/A }
0N/A *flagsp = flags;
0N/A *expected_typep = (ciArrayKlass*)expected_type;
0N/A}
0N/A
0N/A
0N/ALIR_Opr LIRGenerator::round_item(LIR_Opr opr) {
0N/A assert(opr->is_register(), "why spill if item is not register?");
0N/A
0N/A if (RoundFPResults && UseSSE < 1 && opr->is_single_fpu()) {
0N/A LIR_Opr result = new_register(T_FLOAT);
0N/A set_vreg_flag(result, must_start_in_memory);
0N/A assert(opr->is_register(), "only a register can be spilled");
0N/A assert(opr->value_type()->is_float(), "rounding only for floats available");
0N/A __ roundfp(opr, LIR_OprFact::illegalOpr, result);
0N/A return result;
0N/A }
0N/A return opr;
0N/A}
0N/A
0N/A
0N/ALIR_Opr LIRGenerator::force_to_spill(LIR_Opr value, BasicType t) {
3966N/A assert(type2size[t] == type2size[value->type()],
3966N/A err_msg_res("size mismatch: t=%s, value->type()=%s", type2name(t), type2name(value->type())));
0N/A if (!value->is_register()) {
0N/A // force into a register
0N/A LIR_Opr r = new_register(value->type());
0N/A __ move(value, r);
0N/A value = r;
0N/A }
0N/A
0N/A // create a spill location
0N/A LIR_Opr tmp = new_register(t);
0N/A set_vreg_flag(tmp, LIRGenerator::must_start_in_memory);
0N/A
0N/A // move from register to spill
0N/A __ move(value, tmp);
0N/A return tmp;
0N/A}
0N/A
0N/Avoid LIRGenerator::profile_branch(If* if_instr, If::Condition cond) {
0N/A if (if_instr->should_profile()) {
0N/A ciMethod* method = if_instr->profiled_method();
0N/A assert(method != NULL, "method should be set if branch is profiled");
1914N/A ciMethodData* md = method->method_data_or_null();
1914N/A assert(md != NULL, "Sanity");
0N/A ciProfileData* data = md->bci_to_data(if_instr->profiled_bci());
0N/A assert(data != NULL, "must have profiling data");
0N/A assert(data->is_BranchData(), "need BranchData for two-way branches");
0N/A int taken_count_offset = md->byte_offset_of_slot(data, BranchData::taken_offset());
0N/A int not_taken_count_offset = md->byte_offset_of_slot(data, BranchData::not_taken_offset());
1703N/A if (if_instr->is_swapped()) {
1703N/A int t = taken_count_offset;
1703N/A taken_count_offset = not_taken_count_offset;
1703N/A not_taken_count_offset = t;
1703N/A }
1703N/A
0N/A LIR_Opr md_reg = new_register(T_OBJECT);
1703N/A __ oop2reg(md->constant_encoding(), md_reg);
1703N/A
1703N/A LIR_Opr data_offset_reg = new_pointer_register();
0N/A __ cmove(lir_cond(cond),
1703N/A LIR_OprFact::intptrConst(taken_count_offset),
1703N/A LIR_OprFact::intptrConst(not_taken_count_offset),
1977N/A data_offset_reg, as_BasicType(if_instr->x()->type()));
1703N/A
1703N/A // MDO cells are intptr_t, so the data_reg width is arch-dependent.
1703N/A LIR_Opr data_reg = new_pointer_register();
1703N/A LIR_Address* data_addr = new LIR_Address(md_reg, data_offset_reg, data_reg->type());
1909N/A __ move(data_addr, data_reg);
1703N/A // Use leal instead of add to avoid destroying condition codes on x86
0N/A LIR_Address* fake_incr_value = new LIR_Address(data_reg, DataLayout::counter_increment, T_INT);
0N/A __ leal(LIR_OprFact::address(fake_incr_value), data_reg);
1909N/A __ move(data_reg, data_addr);
0N/A }
0N/A}
0N/A
0N/A// Phi technique:
0N/A// This is about passing live values from one basic block to the other.
0N/A// In code generated with Java it is rather rare that more than one
0N/A// value is on the stack from one basic block to the other.
0N/A// We optimize our technique for efficient passing of one value
0N/A// (of type long, int, double..) but it can be extended.
0N/A// When entering or leaving a basic block, all registers and all spill
0N/A// slots are release and empty. We use the released registers
0N/A// and spill slots to pass the live values from one block
0N/A// to the other. The topmost value, i.e., the value on TOS of expression
0N/A// stack is passed in registers. All other values are stored in spilling
0N/A// area. Every Phi has an index which designates its spill slot
0N/A// At exit of a basic block, we fill the register(s) and spill slots.
0N/A// At entry of a basic block, the block_prolog sets up the content of phi nodes
0N/A// and locks necessary registers and spilling slots.
0N/A
0N/A
0N/A// move current value to referenced phi function
0N/Avoid LIRGenerator::move_to_phi(PhiResolver* resolver, Value cur_val, Value sux_val) {
0N/A Phi* phi = sux_val->as_Phi();
0N/A // cur_val can be null without phi being null in conjunction with inlining
0N/A if (phi != NULL && cur_val != NULL && cur_val != phi && !phi->is_illegal()) {
0N/A LIR_Opr operand = cur_val->operand();
0N/A if (cur_val->operand()->is_illegal()) {
0N/A assert(cur_val->as_Constant() != NULL || cur_val->as_Local() != NULL,
0N/A "these can be produced lazily");
0N/A operand = operand_for_instruction(cur_val);
0N/A }
0N/A resolver->move(operand, operand_for_instruction(phi));
0N/A }
0N/A}
0N/A
0N/A
0N/A// Moves all stack values into their PHI position
0N/Avoid LIRGenerator::move_to_phi(ValueStack* cur_state) {
0N/A BlockBegin* bb = block();
0N/A if (bb->number_of_sux() == 1) {
0N/A BlockBegin* sux = bb->sux_at(0);
0N/A assert(sux->number_of_preds() > 0, "invalid CFG");
0N/A
0N/A // a block with only one predecessor never has phi functions
0N/A if (sux->number_of_preds() > 1) {
0N/A int max_phis = cur_state->stack_size() + cur_state->locals_size();
0N/A PhiResolver resolver(this, _virtual_register_number + max_phis * 2);
0N/A
0N/A ValueStack* sux_state = sux->state();
0N/A Value sux_value;
0N/A int index;
0N/A
1739N/A assert(cur_state->scope() == sux_state->scope(), "not matching");
1739N/A assert(cur_state->locals_size() == sux_state->locals_size(), "not matching");
1739N/A assert(cur_state->stack_size() == sux_state->stack_size(), "not matching");
1739N/A
0N/A for_each_stack_value(sux_state, index, sux_value) {
0N/A move_to_phi(&resolver, cur_state->stack_at(index), sux_value);
0N/A }
0N/A
0N/A for_each_local_value(sux_state, index, sux_value) {
0N/A move_to_phi(&resolver, cur_state->local_at(index), sux_value);
0N/A }
0N/A
0N/A assert(cur_state->caller_state() == sux_state->caller_state(), "caller states must be equal");
0N/A }
0N/A }
0N/A}
0N/A
0N/A
0N/ALIR_Opr LIRGenerator::new_register(BasicType type) {
0N/A int vreg = _virtual_register_number;
0N/A // add a little fudge factor for the bailout, since the bailout is
0N/A // only checked periodically. This gives a few extra registers to
0N/A // hand out before we really run out, which helps us keep from
0N/A // tripping over assertions.
0N/A if (vreg + 20 >= LIR_OprDesc::vreg_max) {
0N/A bailout("out of virtual registers");
0N/A if (vreg + 2 >= LIR_OprDesc::vreg_max) {
0N/A // wrap it around
0N/A _virtual_register_number = LIR_OprDesc::vreg_base;
0N/A }
0N/A }
0N/A _virtual_register_number += 1;
0N/A return LIR_OprFact::virtual_register(vreg, type);
0N/A}
0N/A
0N/A
0N/A// Try to lock using register in hint
0N/ALIR_Opr LIRGenerator::rlock(Value instr) {
0N/A return new_register(instr->type());
0N/A}
0N/A
0N/A
0N/A// does an rlock and sets result
0N/ALIR_Opr LIRGenerator::rlock_result(Value x) {
0N/A LIR_Opr reg = rlock(x);
0N/A set_result(x, reg);
0N/A return reg;
0N/A}
0N/A
0N/A
0N/A// does an rlock and sets result
0N/ALIR_Opr LIRGenerator::rlock_result(Value x, BasicType type) {
0N/A LIR_Opr reg;
0N/A switch (type) {
0N/A case T_BYTE:
0N/A case T_BOOLEAN:
0N/A reg = rlock_byte(type);
0N/A break;
0N/A default:
0N/A reg = rlock(x);
0N/A break;
0N/A }
0N/A
0N/A set_result(x, reg);
0N/A return reg;
0N/A}
0N/A
0N/A
0N/A//---------------------------------------------------------------------
0N/AciObject* LIRGenerator::get_jobject_constant(Value value) {
0N/A ObjectType* oc = value->type()->as_ObjectType();
0N/A if (oc) {
0N/A return oc->constant_value();
0N/A }
0N/A return NULL;
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_ExceptionObject(ExceptionObject* x) {
0N/A assert(block()->is_set(BlockBegin::exception_entry_flag), "ExceptionObject only allowed in exception handler block");
0N/A assert(block()->next() == x, "ExceptionObject must be first instruction of block");
0N/A
0N/A // no moves are created for phi functions at the begin of exception
0N/A // handlers, so assign operands manually here
0N/A for_each_phi_fun(block(), phi,
0N/A operand_for_instruction(phi));
0N/A
0N/A LIR_Opr thread_reg = getThreadPointer();
1909N/A __ move_wide(new LIR_Address(thread_reg, in_bytes(JavaThread::exception_oop_offset()), T_OBJECT),
1909N/A exceptionOopOpr());
1909N/A __ move_wide(LIR_OprFact::oopConst(NULL),
1909N/A new LIR_Address(thread_reg, in_bytes(JavaThread::exception_oop_offset()), T_OBJECT));
1909N/A __ move_wide(LIR_OprFact::oopConst(NULL),
1909N/A new LIR_Address(thread_reg, in_bytes(JavaThread::exception_pc_offset()), T_OBJECT));
0N/A
0N/A LIR_Opr result = new_register(T_OBJECT);
0N/A __ move(exceptionOopOpr(), result);
0N/A set_result(x, result);
0N/A}
0N/A
0N/A
0N/A//----------------------------------------------------------------------
0N/A//----------------------------------------------------------------------
0N/A//----------------------------------------------------------------------
0N/A//----------------------------------------------------------------------
0N/A// visitor functions
0N/A//----------------------------------------------------------------------
0N/A//----------------------------------------------------------------------
0N/A//----------------------------------------------------------------------
0N/A//----------------------------------------------------------------------
0N/A
0N/Avoid LIRGenerator::do_Phi(Phi* x) {
0N/A // phi functions are never visited directly
0N/A ShouldNotReachHere();
0N/A}
0N/A
0N/A
0N/A// Code for a constant is generated lazily unless the constant is frequently used and can't be inlined.
0N/Avoid LIRGenerator::do_Constant(Constant* x) {
1739N/A if (x->state_before() != NULL) {
0N/A // Any constant with a ValueStack requires patching so emit the patch here
0N/A LIR_Opr reg = rlock_result(x);
1739N/A CodeEmitInfo* info = state_for(x, x->state_before());
0N/A __ oop2reg_patch(NULL, reg, info);
0N/A } else if (x->use_count() > 1 && !can_inline_as_constant(x)) {
0N/A if (!x->is_pinned()) {
0N/A // unpinned constants are handled specially so that they can be
0N/A // put into registers when they are used multiple times within a
0N/A // block. After the block completes their operand will be
0N/A // cleared so that other blocks can't refer to that register.
0N/A set_result(x, load_constant(x));
0N/A } else {
0N/A LIR_Opr res = x->operand();
0N/A if (!res->is_valid()) {
0N/A res = LIR_OprFact::value_type(x->type());
0N/A }
0N/A if (res->is_constant()) {
0N/A LIR_Opr reg = rlock_result(x);
0N/A __ move(res, reg);
0N/A } else {
0N/A set_result(x, res);
0N/A }
0N/A }
0N/A } else {
0N/A set_result(x, LIR_OprFact::value_type(x->type()));
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_Local(Local* x) {
0N/A // operand_for_instruction has the side effect of setting the result
0N/A // so there's no need to do it here.
0N/A operand_for_instruction(x);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_IfInstanceOf(IfInstanceOf* x) {
0N/A Unimplemented();
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_Return(Return* x) {
780N/A if (compilation()->env()->dtrace_method_probes()) {
0N/A BasicTypeList signature;
1909N/A signature.append(LP64_ONLY(T_LONG) NOT_LP64(T_INT)); // thread
0N/A signature.append(T_OBJECT); // methodOop
0N/A LIR_OprList* args = new LIR_OprList();
0N/A args->append(getThreadPointer());
0N/A LIR_Opr meth = new_register(T_OBJECT);
989N/A __ oop2reg(method()->constant_encoding(), meth);
0N/A args->append(meth);
0N/A call_runtime(&signature, args, CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), voidType, NULL);
0N/A }
0N/A
0N/A if (x->type()->is_void()) {
0N/A __ return_op(LIR_OprFact::illegalOpr);
0N/A } else {
0N/A LIR_Opr reg = result_register_for(x->type(), /*callee=*/true);
0N/A LIRItem result(x->result(), this);
0N/A
0N/A result.load_item_force(reg);
0N/A __ return_op(result.result());
0N/A }
0N/A set_no_result(x);
0N/A}
0N/A
2346N/A// Examble: ref.get()
2346N/A// Combination of LoadField and g1 pre-write barrier
2346N/Avoid LIRGenerator::do_Reference_get(Intrinsic* x) {
2346N/A
2346N/A const int referent_offset = java_lang_ref_Reference::referent_offset;
2346N/A guarantee(referent_offset > 0, "referent offset not initialized");
2346N/A
2346N/A assert(x->number_of_arguments() == 1, "wrong type");
2346N/A
2346N/A LIRItem reference(x->argument_at(0), this);
2346N/A reference.load_item();
2346N/A
2346N/A // need to perform the null check on the reference objecy
2346N/A CodeEmitInfo* info = NULL;
2346N/A if (x->needs_null_check()) {
2346N/A info = state_for(x);
2346N/A }
2346N/A
2346N/A LIR_Address* referent_field_adr =
2346N/A new LIR_Address(reference.result(), referent_offset, T_OBJECT);
2346N/A
2346N/A LIR_Opr result = rlock_result(x);
2346N/A
2346N/A __ load(referent_field_adr, result, info);
2346N/A
2346N/A // Register the value in the referent field with the pre-barrier
2346N/A pre_barrier(LIR_OprFact::illegalOpr /* addr_opr */,
2346N/A result /* pre_val */,
2346N/A false /* do_load */,
2346N/A false /* patch */,
2346N/A NULL /* info */);
2346N/A}
0N/A
3802N/A// Example: clazz.isInstance(object)
3802N/Avoid LIRGenerator::do_isInstance(Intrinsic* x) {
3802N/A assert(x->number_of_arguments() == 2, "wrong type");
3802N/A
3802N/A // TODO could try to substitute this node with an equivalent InstanceOf
3802N/A // if clazz is known to be a constant Class. This will pick up newly found
3802N/A // constants after HIR construction. I'll leave this to a future change.
3802N/A
3802N/A // as a first cut, make a simple leaf call to runtime to stay platform independent.
3802N/A // could follow the aastore example in a future change.
3802N/A
3802N/A LIRItem clazz(x->argument_at(0), this);
3802N/A LIRItem object(x->argument_at(1), this);
3802N/A clazz.load_item();
3802N/A object.load_item();
3802N/A LIR_Opr result = rlock_result(x);
3802N/A
3802N/A // need to perform null check on clazz
3802N/A if (x->needs_null_check()) {
3802N/A CodeEmitInfo* info = state_for(x);
3802N/A __ null_check(clazz.result(), info);
3802N/A }
3802N/A
3802N/A LIR_Opr call_result = call_runtime(clazz.value(), object.value(),
3802N/A CAST_FROM_FN_PTR(address, Runtime1::is_instance_of),
3802N/A x->type(),
3802N/A NULL); // NULL CodeEmitInfo results in a leaf call
3802N/A __ move(call_result, result);
3802N/A}
3802N/A
0N/A// Example: object.getClass ()
0N/Avoid LIRGenerator::do_getClass(Intrinsic* x) {
0N/A assert(x->number_of_arguments() == 1, "wrong type");
0N/A
0N/A LIRItem rcvr(x->argument_at(0), this);
0N/A rcvr.load_item();
0N/A LIR_Opr result = rlock_result(x);
0N/A
0N/A // need to perform the null check on the rcvr
0N/A CodeEmitInfo* info = NULL;
0N/A if (x->needs_null_check()) {
1739N/A info = state_for(x);
0N/A }
0N/A __ move(new LIR_Address(rcvr.result(), oopDesc::klass_offset_in_bytes(), T_OBJECT), result, info);
3042N/A __ move_wide(new LIR_Address(result, in_bytes(Klass::java_mirror_offset()), T_OBJECT), result);
0N/A}
0N/A
0N/A
0N/A// Example: Thread.currentThread()
0N/Avoid LIRGenerator::do_currentThread(Intrinsic* x) {
0N/A assert(x->number_of_arguments() == 0, "wrong type");
0N/A LIR_Opr reg = rlock_result(x);
1909N/A __ move_wide(new LIR_Address(getThreadPointer(), in_bytes(JavaThread::threadObj_offset()), T_OBJECT), reg);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_RegisterFinalizer(Intrinsic* x) {
0N/A assert(x->number_of_arguments() == 1, "wrong type");
0N/A LIRItem receiver(x->argument_at(0), this);
0N/A
0N/A receiver.load_item();
0N/A BasicTypeList signature;
0N/A signature.append(T_OBJECT); // receiver
0N/A LIR_OprList* args = new LIR_OprList();
0N/A args->append(receiver.result());
0N/A CodeEmitInfo* info = state_for(x, x->state());
0N/A call_runtime(&signature, args,
0N/A CAST_FROM_FN_PTR(address, Runtime1::entry_for(Runtime1::register_finalizer_id)),
0N/A voidType, info);
0N/A
0N/A set_no_result(x);
0N/A}
0N/A
0N/A
0N/A//------------------------local access--------------------------------------
0N/A
0N/ALIR_Opr LIRGenerator::operand_for_instruction(Instruction* x) {
0N/A if (x->operand()->is_illegal()) {
0N/A Constant* c = x->as_Constant();
0N/A if (c != NULL) {
0N/A x->set_operand(LIR_OprFact::value_type(c->type()));
0N/A } else {
0N/A assert(x->as_Phi() || x->as_Local() != NULL, "only for Phi and Local");
0N/A // allocate a virtual register for this local or phi
0N/A x->set_operand(rlock(x));
0N/A _instruction_for_operand.at_put_grow(x->operand()->vreg_number(), x, NULL);
0N/A }
0N/A }
0N/A return x->operand();
0N/A}
0N/A
0N/A
0N/AInstruction* LIRGenerator::instruction_for_opr(LIR_Opr opr) {
0N/A if (opr->is_virtual()) {
0N/A return instruction_for_vreg(opr->vreg_number());
0N/A }
0N/A return NULL;
0N/A}
0N/A
0N/A
0N/AInstruction* LIRGenerator::instruction_for_vreg(int reg_num) {
0N/A if (reg_num < _instruction_for_operand.length()) {
0N/A return _instruction_for_operand.at(reg_num);
0N/A }
0N/A return NULL;
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::set_vreg_flag(int vreg_num, VregFlag f) {
0N/A if (_vreg_flags.size_in_bits() == 0) {
0N/A BitMap2D temp(100, num_vreg_flags);
0N/A temp.clear();
0N/A _vreg_flags = temp;
0N/A }
0N/A _vreg_flags.at_put_grow(vreg_num, f, true);
0N/A}
0N/A
0N/Abool LIRGenerator::is_vreg_flag_set(int vreg_num, VregFlag f) {
0N/A if (!_vreg_flags.is_valid_index(vreg_num, f)) {
0N/A return false;
0N/A }
0N/A return _vreg_flags.at(vreg_num, f);
0N/A}
0N/A
0N/A
0N/A// Block local constant handling. This code is useful for keeping
0N/A// unpinned constants and constants which aren't exposed in the IR in
0N/A// registers. Unpinned Constant instructions have their operands
0N/A// cleared when the block is finished so that other blocks can't end
0N/A// up referring to their registers.
0N/A
0N/ALIR_Opr LIRGenerator::load_constant(Constant* x) {
0N/A assert(!x->is_pinned(), "only for unpinned constants");
0N/A _unpinned_constants.append(x);
0N/A return load_constant(LIR_OprFact::value_type(x->type())->as_constant_ptr());
0N/A}
0N/A
0N/A
0N/ALIR_Opr LIRGenerator::load_constant(LIR_Const* c) {
0N/A BasicType t = c->type();
0N/A for (int i = 0; i < _constants.length(); i++) {
0N/A LIR_Const* other = _constants.at(i);
0N/A if (t == other->type()) {
0N/A switch (t) {
0N/A case T_INT:
0N/A case T_FLOAT:
0N/A if (c->as_jint_bits() != other->as_jint_bits()) continue;
0N/A break;
0N/A case T_LONG:
0N/A case T_DOUBLE:
486N/A if (c->as_jint_hi_bits() != other->as_jint_hi_bits()) continue;
486N/A if (c->as_jint_lo_bits() != other->as_jint_lo_bits()) continue;
0N/A break;
0N/A case T_OBJECT:
0N/A if (c->as_jobject() != other->as_jobject()) continue;
0N/A break;
0N/A }
0N/A return _reg_for_constants.at(i);
0N/A }
0N/A }
0N/A
0N/A LIR_Opr result = new_register(t);
0N/A __ move((LIR_Opr)c, result);
0N/A _constants.append(c);
0N/A _reg_for_constants.append(result);
0N/A return result;
0N/A}
0N/A
0N/A// Various barriers
0N/A
2346N/Avoid LIRGenerator::pre_barrier(LIR_Opr addr_opr, LIR_Opr pre_val,
2346N/A bool do_load, bool patch, CodeEmitInfo* info) {
342N/A // Do the pre-write barrier, if any.
342N/A switch (_bs->kind()) {
342N/A#ifndef SERIALGC
342N/A case BarrierSet::G1SATBCT:
342N/A case BarrierSet::G1SATBCTLogging:
2346N/A G1SATBCardTableModRef_pre_barrier(addr_opr, pre_val, do_load, patch, info);
342N/A break;
342N/A#endif // SERIALGC
342N/A case BarrierSet::CardTableModRef:
342N/A case BarrierSet::CardTableExtension:
342N/A // No pre barriers
342N/A break;
342N/A case BarrierSet::ModRef:
342N/A case BarrierSet::Other:
342N/A // No pre barriers
342N/A break;
342N/A default :
342N/A ShouldNotReachHere();
342N/A
342N/A }
342N/A}
342N/A
0N/Avoid LIRGenerator::post_barrier(LIR_OprDesc* addr, LIR_OprDesc* new_val) {
342N/A switch (_bs->kind()) {
342N/A#ifndef SERIALGC
342N/A case BarrierSet::G1SATBCT:
342N/A case BarrierSet::G1SATBCTLogging:
342N/A G1SATBCardTableModRef_post_barrier(addr, new_val);
342N/A break;
342N/A#endif // SERIALGC
0N/A case BarrierSet::CardTableModRef:
0N/A case BarrierSet::CardTableExtension:
0N/A CardTableModRef_post_barrier(addr, new_val);
0N/A break;
0N/A case BarrierSet::ModRef:
0N/A case BarrierSet::Other:
0N/A // No post barriers
0N/A break;
0N/A default :
0N/A ShouldNotReachHere();
0N/A }
0N/A}
0N/A
342N/A////////////////////////////////////////////////////////////////////////
342N/A#ifndef SERIALGC
342N/A
2346N/Avoid LIRGenerator::G1SATBCardTableModRef_pre_barrier(LIR_Opr addr_opr, LIR_Opr pre_val,
2346N/A bool do_load, bool patch, CodeEmitInfo* info) {
342N/A // First we test whether marking is in progress.
342N/A BasicType flag_type;
342N/A if (in_bytes(PtrQueue::byte_width_of_active()) == 4) {
342N/A flag_type = T_INT;
342N/A } else {
342N/A guarantee(in_bytes(PtrQueue::byte_width_of_active()) == 1,
342N/A "Assumption");
342N/A flag_type = T_BYTE;
342N/A }
342N/A LIR_Opr thrd = getThreadPointer();
342N/A LIR_Address* mark_active_flag_addr =
342N/A new LIR_Address(thrd,
342N/A in_bytes(JavaThread::satb_mark_queue_offset() +
342N/A PtrQueue::byte_offset_of_active()),
342N/A flag_type);
342N/A // Read the marking-in-progress flag.
342N/A LIR_Opr flag_val = new_register(T_INT);
342N/A __ load(mark_active_flag_addr, flag_val);
342N/A __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0));
2346N/A
2346N/A LIR_PatchCode pre_val_patch_code = lir_patch_none;
2346N/A
2346N/A CodeStub* slow;
2346N/A
2346N/A if (do_load) {
2346N/A assert(pre_val == LIR_OprFact::illegalOpr, "sanity");
2346N/A assert(addr_opr != LIR_OprFact::illegalOpr, "sanity");
2346N/A
2346N/A if (patch)
2346N/A pre_val_patch_code = lir_patch_normal;
2346N/A
2346N/A pre_val = new_register(T_OBJECT);
2346N/A
2346N/A if (!addr_opr->is_address()) {
2346N/A assert(addr_opr->is_register(), "must be");
2346N/A addr_opr = LIR_OprFact::address(new LIR_Address(addr_opr, T_OBJECT));
2346N/A }
2346N/A slow = new G1PreBarrierStub(addr_opr, pre_val, pre_val_patch_code, info);
2346N/A } else {
2346N/A assert(addr_opr == LIR_OprFact::illegalOpr, "sanity");
2346N/A assert(pre_val->is_register(), "must be");
2346N/A assert(pre_val->type() == T_OBJECT, "must be an object");
2346N/A assert(info == NULL, "sanity");
2346N/A
2346N/A slow = new G1PreBarrierStub(pre_val);
342N/A }
2346N/A
342N/A __ branch(lir_cond_notEqual, T_INT, slow);
342N/A __ branch_destination(slow->continuation());
342N/A}
342N/A
342N/Avoid LIRGenerator::G1SATBCardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_OprDesc* new_val) {
342N/A // If the "new_val" is a constant NULL, no barrier is necessary.
342N/A if (new_val->is_constant() &&
342N/A new_val->as_constant_ptr()->as_jobject() == NULL) return;
342N/A
342N/A if (!new_val->is_register()) {
1492N/A LIR_Opr new_val_reg = new_register(T_OBJECT);
342N/A if (new_val->is_constant()) {
342N/A __ move(new_val, new_val_reg);
342N/A } else {
342N/A __ leal(new_val, new_val_reg);
342N/A }
342N/A new_val = new_val_reg;
342N/A }
342N/A assert(new_val->is_register(), "must be a register at this point");
342N/A
342N/A if (addr->is_address()) {
342N/A LIR_Address* address = addr->as_address_ptr();
2311N/A LIR_Opr ptr = new_pointer_register();
342N/A if (!address->index()->is_valid() && address->disp() == 0) {
342N/A __ move(address->base(), ptr);
342N/A } else {
342N/A assert(address->disp() != max_jint, "lea doesn't support patched addresses!");
342N/A __ leal(addr, ptr);
342N/A }
342N/A addr = ptr;
342N/A }
342N/A assert(addr->is_register(), "must be a register at this point");
342N/A
342N/A LIR_Opr xor_res = new_pointer_register();
342N/A LIR_Opr xor_shift_res = new_pointer_register();
342N/A if (TwoOperandLIRForm ) {
342N/A __ move(addr, xor_res);
342N/A __ logical_xor(xor_res, new_val, xor_res);
342N/A __ move(xor_res, xor_shift_res);
342N/A __ unsigned_shift_right(xor_shift_res,
342N/A LIR_OprFact::intConst(HeapRegion::LogOfHRGrainBytes),
342N/A xor_shift_res,
342N/A LIR_OprDesc::illegalOpr());
342N/A } else {
342N/A __ logical_xor(addr, new_val, xor_res);
342N/A __ unsigned_shift_right(xor_res,
342N/A LIR_OprFact::intConst(HeapRegion::LogOfHRGrainBytes),
342N/A xor_shift_res,
342N/A LIR_OprDesc::illegalOpr());
342N/A }
342N/A
342N/A if (!new_val->is_register()) {
1492N/A LIR_Opr new_val_reg = new_register(T_OBJECT);
342N/A __ leal(new_val, new_val_reg);
342N/A new_val = new_val_reg;
342N/A }
342N/A assert(new_val->is_register(), "must be a register at this point");
342N/A
342N/A __ cmp(lir_cond_notEqual, xor_shift_res, LIR_OprFact::intptrConst(NULL_WORD));
342N/A
342N/A CodeStub* slow = new G1PostBarrierStub(addr, new_val);
1492N/A __ branch(lir_cond_notEqual, LP64_ONLY(T_LONG) NOT_LP64(T_INT), slow);
342N/A __ branch_destination(slow->continuation());
342N/A}
342N/A
342N/A#endif // SERIALGC
342N/A////////////////////////////////////////////////////////////////////////
342N/A
0N/Avoid LIRGenerator::CardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_OprDesc* new_val) {
0N/A
342N/A assert(sizeof(*((CardTableModRefBS*)_bs)->byte_map_base) == sizeof(jbyte), "adjust this code");
342N/A LIR_Const* card_table_base = new LIR_Const(((CardTableModRefBS*)_bs)->byte_map_base);
0N/A if (addr->is_address()) {
0N/A LIR_Address* address = addr->as_address_ptr();
2311N/A // ptr cannot be an object because we use this barrier for array card marks
2311N/A // and addr can point in the middle of an array.
2311N/A LIR_Opr ptr = new_pointer_register();
0N/A if (!address->index()->is_valid() && address->disp() == 0) {
0N/A __ move(address->base(), ptr);
0N/A } else {
0N/A assert(address->disp() != max_jint, "lea doesn't support patched addresses!");
0N/A __ leal(addr, ptr);
0N/A }
0N/A addr = ptr;
0N/A }
0N/A assert(addr->is_register(), "must be a register at this point");
0N/A
1601N/A#ifdef ARM
1601N/A // TODO: ARM - move to platform-dependent code
1601N/A LIR_Opr tmp = FrameMap::R14_opr;
1601N/A if (VM_Version::supports_movw()) {
1601N/A __ move((LIR_Opr)card_table_base, tmp);
1601N/A } else {
1601N/A __ move(new LIR_Address(FrameMap::Rthread_opr, in_bytes(JavaThread::card_table_base_offset()), T_ADDRESS), tmp);
1601N/A }
1601N/A
1601N/A CardTableModRefBS* ct = (CardTableModRefBS*)_bs;
1601N/A LIR_Address *card_addr = new LIR_Address(tmp, addr, (LIR_Address::Scale) -CardTableModRefBS::card_shift, 0, T_BYTE);
1601N/A if(((int)ct->byte_map_base & 0xff) == 0) {
1601N/A __ move(tmp, card_addr);
1601N/A } else {
1601N/A LIR_Opr tmp_zero = new_register(T_INT);
1601N/A __ move(LIR_OprFact::intConst(0), tmp_zero);
1601N/A __ move(tmp_zero, card_addr);
1601N/A }
1601N/A#else // ARM
0N/A LIR_Opr tmp = new_pointer_register();
0N/A if (TwoOperandLIRForm) {
0N/A __ move(addr, tmp);
0N/A __ unsigned_shift_right(tmp, CardTableModRefBS::card_shift, tmp);
0N/A } else {
0N/A __ unsigned_shift_right(addr, CardTableModRefBS::card_shift, tmp);
0N/A }
0N/A if (can_inline_as_constant(card_table_base)) {
0N/A __ move(LIR_OprFact::intConst(0),
0N/A new LIR_Address(tmp, card_table_base->as_jint(), T_BYTE));
0N/A } else {
0N/A __ move(LIR_OprFact::intConst(0),
0N/A new LIR_Address(tmp, load_constant(card_table_base),
0N/A T_BYTE));
0N/A }
1601N/A#endif // ARM
0N/A}
0N/A
0N/A
0N/A//------------------------field access--------------------------------------
0N/A
0N/A// Comment copied form templateTable_i486.cpp
0N/A// ----------------------------------------------------------------------------
0N/A// Volatile variables demand their effects be made known to all CPU's in
0N/A// order. Store buffers on most chips allow reads & writes to reorder; the
0N/A// JMM's ReadAfterWrite.java test fails in -Xint mode without some kind of
0N/A// memory barrier (i.e., it's not sufficient that the interpreter does not
0N/A// reorder volatile references, the hardware also must not reorder them).
0N/A//
0N/A// According to the new Java Memory Model (JMM):
0N/A// (1) All volatiles are serialized wrt to each other.
0N/A// ALSO reads & writes act as aquire & release, so:
0N/A// (2) A read cannot let unrelated NON-volatile memory refs that happen after
0N/A// the read float up to before the read. It's OK for non-volatile memory refs
0N/A// that happen before the volatile read to float down below it.
0N/A// (3) Similar a volatile write cannot let unrelated NON-volatile memory refs
0N/A// that happen BEFORE the write float down to after the write. It's OK for
0N/A// non-volatile memory refs that happen after the volatile write to float up
0N/A// before it.
0N/A//
0N/A// We only put in barriers around volatile refs (they are expensive), not
0N/A// _between_ memory refs (that would require us to track the flavor of the
0N/A// previous memory refs). Requirements (2) and (3) require some barriers
0N/A// before volatile stores and after volatile loads. These nearly cover
0N/A// requirement (1) but miss the volatile-store-volatile-load case. This final
0N/A// case is placed after volatile-stores although it could just as well go
0N/A// before volatile-loads.
0N/A
0N/A
0N/Avoid LIRGenerator::do_StoreField(StoreField* x) {
0N/A bool needs_patching = x->needs_patching();
0N/A bool is_volatile = x->field()->is_volatile();
0N/A BasicType field_type = x->field_type();
0N/A bool is_oop = (field_type == T_ARRAY || field_type == T_OBJECT);
0N/A
0N/A CodeEmitInfo* info = NULL;
0N/A if (needs_patching) {
0N/A assert(x->explicit_null_check() == NULL, "can't fold null check into patching field access");
0N/A info = state_for(x, x->state_before());
0N/A } else if (x->needs_null_check()) {
0N/A NullCheck* nc = x->explicit_null_check();
0N/A if (nc == NULL) {
1739N/A info = state_for(x);
0N/A } else {
0N/A info = state_for(nc);
0N/A }
0N/A }
0N/A
0N/A
0N/A LIRItem object(x->obj(), this);
0N/A LIRItem value(x->value(), this);
0N/A
0N/A object.load_item();
0N/A
0N/A if (is_volatile || needs_patching) {
0N/A // load item if field is volatile (fewer special cases for volatiles)
0N/A // load item if field not initialized
0N/A // load item if field not constant
0N/A // because of code patching we cannot inline constants
0N/A if (field_type == T_BYTE || field_type == T_BOOLEAN) {
0N/A value.load_byte_item();
0N/A } else {
0N/A value.load_item();
0N/A }
0N/A } else {
0N/A value.load_for_store(field_type);
0N/A }
0N/A
0N/A set_no_result(x);
0N/A
1739N/A#ifndef PRODUCT
0N/A if (PrintNotLoaded && needs_patching) {
0N/A tty->print_cr(" ###class not loaded at store_%s bci %d",
1739N/A x->is_static() ? "static" : "field", x->printable_bci());
0N/A }
1739N/A#endif
0N/A
0N/A if (x->needs_null_check() &&
0N/A (needs_patching ||
0N/A MacroAssembler::needs_explicit_null_check(x->offset()))) {
0N/A // emit an explicit null check because the offset is too large
0N/A __ null_check(object.result(), new CodeEmitInfo(info));
0N/A }
0N/A
0N/A LIR_Address* address;
0N/A if (needs_patching) {
0N/A // we need to patch the offset in the instruction so don't allow
0N/A // generate_address to try to be smart about emitting the -1.
0N/A // Otherwise the patching code won't know how to find the
0N/A // instruction to patch.
1601N/A address = new LIR_Address(object.result(), PATCHED_ADDR, field_type);
0N/A } else {
0N/A address = generate_address(object.result(), x->offset(), field_type);
0N/A }
0N/A
0N/A if (is_volatile && os::is_MP()) {
0N/A __ membar_release();
0N/A }
0N/A
342N/A if (is_oop) {
342N/A // Do the pre-write barrier, if any.
342N/A pre_barrier(LIR_OprFact::address(address),
2346N/A LIR_OprFact::illegalOpr /* pre_val */,
2346N/A true /* do_load*/,
342N/A needs_patching,
342N/A (info ? new CodeEmitInfo(info) : NULL));
342N/A }
342N/A
2199N/A if (is_volatile && !needs_patching) {
0N/A volatile_field_store(value.result(), address, info);
0N/A } else {
0N/A LIR_PatchCode patch_code = needs_patching ? lir_patch_normal : lir_patch_none;
0N/A __ store(value.result(), address, info, patch_code);
0N/A }
0N/A
0N/A if (is_oop) {
819N/A // Store to object so mark the card of the header
0N/A post_barrier(object.result(), value.result());
0N/A }
0N/A
0N/A if (is_volatile && os::is_MP()) {
0N/A __ membar();
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_LoadField(LoadField* x) {
0N/A bool needs_patching = x->needs_patching();
0N/A bool is_volatile = x->field()->is_volatile();
0N/A BasicType field_type = x->field_type();
0N/A
0N/A CodeEmitInfo* info = NULL;
0N/A if (needs_patching) {
0N/A assert(x->explicit_null_check() == NULL, "can't fold null check into patching field access");
0N/A info = state_for(x, x->state_before());
0N/A } else if (x->needs_null_check()) {
0N/A NullCheck* nc = x->explicit_null_check();
0N/A if (nc == NULL) {
1739N/A info = state_for(x);
0N/A } else {
0N/A info = state_for(nc);
0N/A }
0N/A }
0N/A
0N/A LIRItem object(x->obj(), this);
0N/A
0N/A object.load_item();
0N/A
1739N/A#ifndef PRODUCT
0N/A if (PrintNotLoaded && needs_patching) {
0N/A tty->print_cr(" ###class not loaded at load_%s bci %d",
1739N/A x->is_static() ? "static" : "field", x->printable_bci());
0N/A }
1739N/A#endif
0N/A
0N/A if (x->needs_null_check() &&
0N/A (needs_patching ||
0N/A MacroAssembler::needs_explicit_null_check(x->offset()))) {
0N/A // emit an explicit null check because the offset is too large
0N/A __ null_check(object.result(), new CodeEmitInfo(info));
0N/A }
0N/A
0N/A LIR_Opr reg = rlock_result(x, field_type);
0N/A LIR_Address* address;
0N/A if (needs_patching) {
0N/A // we need to patch the offset in the instruction so don't allow
0N/A // generate_address to try to be smart about emitting the -1.
0N/A // Otherwise the patching code won't know how to find the
0N/A // instruction to patch.
1601N/A address = new LIR_Address(object.result(), PATCHED_ADDR, field_type);
0N/A } else {
0N/A address = generate_address(object.result(), x->offset(), field_type);
0N/A }
0N/A
2199N/A if (is_volatile && !needs_patching) {
0N/A volatile_field_load(address, reg, info);
0N/A } else {
0N/A LIR_PatchCode patch_code = needs_patching ? lir_patch_normal : lir_patch_none;
0N/A __ load(address, reg, info, patch_code);
0N/A }
0N/A
0N/A if (is_volatile && os::is_MP()) {
0N/A __ membar_acquire();
0N/A }
0N/A}
0N/A
0N/A
0N/A//------------------------java.nio.Buffer.checkIndex------------------------
0N/A
0N/A// int java.nio.Buffer.checkIndex(int)
0N/Avoid LIRGenerator::do_NIOCheckIndex(Intrinsic* x) {
0N/A // NOTE: by the time we are in checkIndex() we are guaranteed that
0N/A // the buffer is non-null (because checkIndex is package-private and
0N/A // only called from within other methods in the buffer).
0N/A assert(x->number_of_arguments() == 2, "wrong type");
0N/A LIRItem buf (x->argument_at(0), this);
0N/A LIRItem index(x->argument_at(1), this);
0N/A buf.load_item();
0N/A index.load_item();
0N/A
0N/A LIR_Opr result = rlock_result(x);
0N/A if (GenerateRangeChecks) {
0N/A CodeEmitInfo* info = state_for(x);
0N/A CodeStub* stub = new RangeCheckStub(info, index.result(), true);
0N/A if (index.result()->is_constant()) {
0N/A cmp_mem_int(lir_cond_belowEqual, buf.result(), java_nio_Buffer::limit_offset(), index.result()->as_jint(), info);
0N/A __ branch(lir_cond_belowEqual, T_INT, stub);
0N/A } else {
0N/A cmp_reg_mem(lir_cond_aboveEqual, index.result(), buf.result(),
0N/A java_nio_Buffer::limit_offset(), T_INT, info);
0N/A __ branch(lir_cond_aboveEqual, T_INT, stub);
0N/A }
0N/A __ move(index.result(), result);
0N/A } else {
0N/A // Just load the index into the result register
0N/A __ move(index.result(), result);
0N/A }
0N/A}
0N/A
0N/A
0N/A//------------------------array access--------------------------------------
0N/A
0N/A
0N/Avoid LIRGenerator::do_ArrayLength(ArrayLength* x) {
0N/A LIRItem array(x->array(), this);
0N/A array.load_item();
0N/A LIR_Opr reg = rlock_result(x);
0N/A
0N/A CodeEmitInfo* info = NULL;
0N/A if (x->needs_null_check()) {
0N/A NullCheck* nc = x->explicit_null_check();
0N/A if (nc == NULL) {
0N/A info = state_for(x);
0N/A } else {
0N/A info = state_for(nc);
0N/A }
0N/A }
0N/A __ load(new LIR_Address(array.result(), arrayOopDesc::length_offset_in_bytes(), T_INT), reg, info, lir_patch_none);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_LoadIndexed(LoadIndexed* x) {
0N/A bool use_length = x->length() != NULL;
0N/A LIRItem array(x->array(), this);
0N/A LIRItem index(x->index(), this);
0N/A LIRItem length(this);
0N/A bool needs_range_check = true;
0N/A
0N/A if (use_length) {
0N/A needs_range_check = x->compute_needs_range_check();
0N/A if (needs_range_check) {
0N/A length.set_instruction(x->length());
0N/A length.load_item();
0N/A }
0N/A }
0N/A
0N/A array.load_item();
0N/A if (index.is_constant() && can_inline_as_constant(x->index())) {
0N/A // let it be a constant
0N/A index.dont_load_item();
0N/A } else {
0N/A index.load_item();
0N/A }
0N/A
0N/A CodeEmitInfo* range_check_info = state_for(x);
0N/A CodeEmitInfo* null_check_info = NULL;
0N/A if (x->needs_null_check()) {
0N/A NullCheck* nc = x->explicit_null_check();
0N/A if (nc != NULL) {
0N/A null_check_info = state_for(nc);
0N/A } else {
0N/A null_check_info = range_check_info;
0N/A }
0N/A }
0N/A
0N/A // emit array address setup early so it schedules better
0N/A LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), false);
0N/A
0N/A if (GenerateRangeChecks && needs_range_check) {
0N/A if (use_length) {
0N/A // TODO: use a (modified) version of array_range_check that does not require a
0N/A // constant length to be loaded to a register
0N/A __ cmp(lir_cond_belowEqual, length.result(), index.result());
0N/A __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
0N/A } else {
0N/A array_range_check(array.result(), index.result(), null_check_info, range_check_info);
0N/A // The range check performs the null check, so clear it out for the load
0N/A null_check_info = NULL;
0N/A }
0N/A }
0N/A
0N/A __ move(array_addr, rlock_result(x, x->elt_type()), null_check_info);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_NullCheck(NullCheck* x) {
0N/A if (x->can_trap()) {
0N/A LIRItem value(x->obj(), this);
0N/A value.load_item();
0N/A CodeEmitInfo* info = state_for(x);
0N/A __ null_check(value.result(), info);
0N/A }
0N/A}
0N/A
0N/A
3932N/Avoid LIRGenerator::do_TypeCast(TypeCast* x) {
3932N/A LIRItem value(x->obj(), this);
3932N/A value.load_item();
3932N/A // the result is the same as from the node we are casting
3932N/A set_result(x, value.result());
3932N/A}
3932N/A
3932N/A
0N/Avoid LIRGenerator::do_Throw(Throw* x) {
0N/A LIRItem exception(x->exception(), this);
0N/A exception.load_item();
0N/A set_no_result(x);
0N/A LIR_Opr exception_opr = exception.result();
0N/A CodeEmitInfo* info = state_for(x, x->state());
0N/A
0N/A#ifndef PRODUCT
0N/A if (PrintC1Statistics) {
1703N/A increment_counter(Runtime1::throw_count_address(), T_INT);
0N/A }
0N/A#endif
0N/A
0N/A // check if the instruction has an xhandler in any of the nested scopes
0N/A bool unwind = false;
0N/A if (info->exception_handlers()->length() == 0) {
0N/A // this throw is not inside an xhandler
0N/A unwind = true;
0N/A } else {
0N/A // get some idea of the throw type
0N/A bool type_is_exact = true;
0N/A ciType* throw_type = x->exception()->exact_type();
0N/A if (throw_type == NULL) {
0N/A type_is_exact = false;
0N/A throw_type = x->exception()->declared_type();
0N/A }
0N/A if (throw_type != NULL && throw_type->is_instance_klass()) {
0N/A ciInstanceKlass* throw_klass = (ciInstanceKlass*)throw_type;
0N/A unwind = !x->exception_handlers()->could_catch(throw_klass, type_is_exact);
0N/A }
0N/A }
0N/A
0N/A // do null check before moving exception oop into fixed register
0N/A // to avoid a fixed interval with an oop during the null check.
0N/A // Use a copy of the CodeEmitInfo because debug information is
0N/A // different for null_check and throw.
0N/A if (GenerateCompilerNullChecks &&
0N/A (x->exception()->as_NewInstance() == NULL && x->exception()->as_ExceptionObject() == NULL)) {
0N/A // if the exception object wasn't created using new then it might be null.
1739N/A __ null_check(exception_opr, new CodeEmitInfo(info, x->state()->copy(ValueStack::ExceptionState, x->state()->bci())));
0N/A }
0N/A
1378N/A if (compilation()->env()->jvmti_can_post_on_exceptions()) {
0N/A // we need to go through the exception lookup path to get JVMTI
0N/A // notification done
0N/A unwind = false;
0N/A }
0N/A
0N/A // move exception oop into fixed register
0N/A __ move(exception_opr, exceptionOopOpr());
0N/A
0N/A if (unwind) {
1378N/A __ unwind_exception(exceptionOopOpr());
0N/A } else {
0N/A __ throw_exception(exceptionPcOpr(), exceptionOopOpr(), info);
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_RoundFP(RoundFP* x) {
0N/A LIRItem input(x->input(), this);
0N/A input.load_item();
0N/A LIR_Opr input_opr = input.result();
0N/A assert(input_opr->is_register(), "why round if value is not in a register?");
0N/A assert(input_opr->is_single_fpu() || input_opr->is_double_fpu(), "input should be floating-point value");
0N/A if (input_opr->is_single_fpu()) {
0N/A set_result(x, round_item(input_opr)); // This code path not currently taken
0N/A } else {
0N/A LIR_Opr result = new_register(T_DOUBLE);
0N/A set_vreg_flag(result, must_start_in_memory);
0N/A __ roundfp(input_opr, LIR_OprFact::illegalOpr, result);
0N/A set_result(x, result);
0N/A }
0N/A}
0N/A
0N/Avoid LIRGenerator::do_UnsafeGetRaw(UnsafeGetRaw* x) {
0N/A LIRItem base(x->base(), this);
0N/A LIRItem idx(this);
0N/A
0N/A base.load_item();
0N/A if (x->has_index()) {
0N/A idx.set_instruction(x->index());
0N/A idx.load_nonconstant();
0N/A }
0N/A
0N/A LIR_Opr reg = rlock_result(x, x->basic_type());
0N/A
0N/A int log2_scale = 0;
0N/A if (x->has_index()) {
0N/A assert(x->index()->type()->tag() == intTag, "should not find non-int index");
0N/A log2_scale = x->log2_scale();
0N/A }
0N/A
0N/A assert(!x->has_index() || idx.value() == x->index(), "should match");
0N/A
0N/A LIR_Opr base_op = base.result();
0N/A#ifndef _LP64
0N/A if (x->base()->type()->tag() == longTag) {
0N/A base_op = new_register(T_INT);
0N/A __ convert(Bytecodes::_l2i, base.result(), base_op);
0N/A } else {
0N/A assert(x->base()->type()->tag() == intTag, "must be");
0N/A }
0N/A#endif
0N/A
0N/A BasicType dst_type = x->basic_type();
0N/A LIR_Opr index_op = idx.result();
0N/A
0N/A LIR_Address* addr;
0N/A if (index_op->is_constant()) {
0N/A assert(log2_scale == 0, "must not have a scale");
0N/A addr = new LIR_Address(base_op, index_op->as_jint(), dst_type);
0N/A } else {
304N/A#ifdef X86
1060N/A#ifdef _LP64
1060N/A if (!index_op->is_illegal() && index_op->type() == T_INT) {
1060N/A LIR_Opr tmp = new_pointer_register();
1060N/A __ convert(Bytecodes::_i2l, index_op, tmp);
1060N/A index_op = tmp;
1060N/A }
1060N/A#endif
0N/A addr = new LIR_Address(base_op, index_op, LIR_Address::Scale(log2_scale), 0, dst_type);
1601N/A#elif defined(ARM)
1601N/A addr = generate_address(base_op, index_op, log2_scale, 0, dst_type);
0N/A#else
0N/A if (index_op->is_illegal() || log2_scale == 0) {
1060N/A#ifdef _LP64
1060N/A if (!index_op->is_illegal() && index_op->type() == T_INT) {
1060N/A LIR_Opr tmp = new_pointer_register();
1060N/A __ convert(Bytecodes::_i2l, index_op, tmp);
1060N/A index_op = tmp;
1060N/A }
1060N/A#endif
0N/A addr = new LIR_Address(base_op, index_op, dst_type);
0N/A } else {
1060N/A LIR_Opr tmp = new_pointer_register();
0N/A __ shift_left(index_op, log2_scale, tmp);
0N/A addr = new LIR_Address(base_op, tmp, dst_type);
0N/A }
0N/A#endif
0N/A }
0N/A
0N/A if (x->may_be_unaligned() && (dst_type == T_LONG || dst_type == T_DOUBLE)) {
0N/A __ unaligned_move(addr, reg);
0N/A } else {
1909N/A if (dst_type == T_OBJECT && x->is_wide()) {
1909N/A __ move_wide(addr, reg);
1909N/A } else {
1909N/A __ move(addr, reg);
1909N/A }
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_UnsafePutRaw(UnsafePutRaw* x) {
0N/A int log2_scale = 0;
0N/A BasicType type = x->basic_type();
0N/A
0N/A if (x->has_index()) {
0N/A assert(x->index()->type()->tag() == intTag, "should not find non-int index");
0N/A log2_scale = x->log2_scale();
0N/A }
0N/A
0N/A LIRItem base(x->base(), this);
0N/A LIRItem value(x->value(), this);
0N/A LIRItem idx(this);
0N/A
0N/A base.load_item();
0N/A if (x->has_index()) {
0N/A idx.set_instruction(x->index());
0N/A idx.load_item();
0N/A }
0N/A
0N/A if (type == T_BYTE || type == T_BOOLEAN) {
0N/A value.load_byte_item();
0N/A } else {
0N/A value.load_item();
0N/A }
0N/A
0N/A set_no_result(x);
0N/A
0N/A LIR_Opr base_op = base.result();
0N/A#ifndef _LP64
0N/A if (x->base()->type()->tag() == longTag) {
0N/A base_op = new_register(T_INT);
0N/A __ convert(Bytecodes::_l2i, base.result(), base_op);
0N/A } else {
0N/A assert(x->base()->type()->tag() == intTag, "must be");
0N/A }
0N/A#endif
0N/A
0N/A LIR_Opr index_op = idx.result();
0N/A if (log2_scale != 0) {
0N/A // temporary fix (platform dependent code without shift on Intel would be better)
1060N/A index_op = new_pointer_register();
1060N/A#ifdef _LP64
1060N/A if(idx.result()->type() == T_INT) {
1060N/A __ convert(Bytecodes::_i2l, idx.result(), index_op);
1060N/A } else {
1060N/A#endif
1601N/A // TODO: ARM also allows embedded shift in the address
1060N/A __ move(idx.result(), index_op);
1060N/A#ifdef _LP64
1060N/A }
1060N/A#endif
0N/A __ shift_left(index_op, log2_scale, index_op);
0N/A }
1060N/A#ifdef _LP64
1060N/A else if(!index_op->is_illegal() && index_op->type() == T_INT) {
1060N/A LIR_Opr tmp = new_pointer_register();
1060N/A __ convert(Bytecodes::_i2l, index_op, tmp);
1060N/A index_op = tmp;
1060N/A }
1060N/A#endif
0N/A
0N/A LIR_Address* addr = new LIR_Address(base_op, index_op, x->basic_type());
0N/A __ move(value.result(), addr);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_UnsafeGetObject(UnsafeGetObject* x) {
0N/A BasicType type = x->basic_type();
0N/A LIRItem src(x->object(), this);
0N/A LIRItem off(x->offset(), this);
0N/A
0N/A off.load_item();
0N/A src.load_item();
0N/A
3965N/A LIR_Opr value = rlock_result(x, x->basic_type());
3965N/A
3965N/A get_Object_unsafe(value, src.result(), off.result(), type, x->is_volatile());
2346N/A
2346N/A#ifndef SERIALGC
2346N/A // We might be reading the value of the referent field of a
2346N/A // Reference object in order to attach it back to the live
2346N/A // object graph. If G1 is enabled then we need to record
2346N/A // the value that is being returned in an SATB log buffer.
2346N/A //
2346N/A // We need to generate code similar to the following...
2346N/A //
2346N/A // if (offset == java_lang_ref_Reference::referent_offset) {
2346N/A // if (src != NULL) {
2346N/A // if (klass(src)->reference_type() != REF_NONE) {
3965N/A // pre_barrier(..., value, ...);
2346N/A // }
2346N/A // }
2346N/A // }
2346N/A
2346N/A if (UseG1GC && type == T_OBJECT) {
3965N/A bool gen_pre_barrier = true; // Assume we need to generate pre_barrier.
3965N/A bool gen_offset_check = true; // Assume we need to generate the offset guard.
3965N/A bool gen_source_check = true; // Assume we need to check the src object for null.
3965N/A bool gen_type_check = true; // Assume we need to check the reference_type.
2346N/A
2346N/A if (off.is_constant()) {
2351N/A jlong off_con = (off.type()->is_int() ?
2351N/A (jlong) off.get_jint_constant() :
2351N/A off.get_jlong_constant());
2351N/A
2351N/A
2351N/A if (off_con != (jlong) java_lang_ref_Reference::referent_offset) {
2346N/A // The constant offset is something other than referent_offset.
2346N/A // We can skip generating/checking the remaining guards and
2346N/A // skip generation of the code stub.
3965N/A gen_pre_barrier = false;
2346N/A } else {
2346N/A // The constant offset is the same as referent_offset -
2346N/A // we do not need to generate a runtime offset check.
2346N/A gen_offset_check = false;
2346N/A }
2346N/A }
2346N/A
2346N/A // We don't need to generate stub if the source object is an array
3965N/A if (gen_pre_barrier && src.type()->is_array()) {
3965N/A gen_pre_barrier = false;
2346N/A }
2346N/A
3965N/A if (gen_pre_barrier) {
2346N/A // We still need to continue with the checks.
2346N/A if (src.is_constant()) {
2346N/A ciObject* src_con = src.get_jobject_constant();
2346N/A
2346N/A if (src_con->is_null_object()) {
2346N/A // The constant src object is null - We can skip
2346N/A // generating the code stub.
3965N/A gen_pre_barrier = false;
2346N/A } else {
2346N/A // Non-null constant source object. We still have to generate
2346N/A // the slow stub - but we don't need to generate the runtime
2346N/A // null object check.
2346N/A gen_source_check = false;
2346N/A }
2346N/A }
2346N/A }
3965N/A if (gen_pre_barrier && !PatchALot) {
3965N/A // Can the klass of object be statically determined to be
3965N/A // a sub-class of Reference?
3965N/A ciType* type = src.value()->declared_type();
3965N/A if ((type != NULL) && type->is_loaded()) {
3965N/A if (type->is_subtype_of(compilation()->env()->Reference_klass())) {
3965N/A gen_type_check = false;
3965N/A } else if (type->is_klass() &&
3965N/A !compilation()->env()->Object_klass()->is_subtype_of(type->as_klass())) {
3965N/A // Not Reference and not Object klass.
3965N/A gen_pre_barrier = false;
3965N/A }
3965N/A }
3965N/A }
3965N/A
3965N/A if (gen_pre_barrier) {
3965N/A LabelObj* Lcont = new LabelObj();
2346N/A
2346N/A // We can have generate one runtime check here. Let's start with
2346N/A // the offset check.
2346N/A if (gen_offset_check) {
3965N/A // if (offset != referent_offset) -> continue
2351N/A // If offset is an int then we can do the comparison with the
2351N/A // referent_offset constant; otherwise we need to move
2351N/A // referent_offset into a temporary register and generate
2351N/A // a reg-reg compare.
2351N/A
2351N/A LIR_Opr referent_off;
2351N/A
2351N/A if (off.type()->is_int()) {
2351N/A referent_off = LIR_OprFact::intConst(java_lang_ref_Reference::referent_offset);
2351N/A } else {
2351N/A assert(off.type()->is_long(), "what else?");
2351N/A referent_off = new_register(T_LONG);
2351N/A __ move(LIR_OprFact::longConst(java_lang_ref_Reference::referent_offset), referent_off);
2351N/A }
3965N/A __ cmp(lir_cond_notEqual, off.result(), referent_off);
3965N/A __ branch(lir_cond_notEqual, as_BasicType(off.type()), Lcont->label());
3965N/A }
3965N/A if (gen_source_check) {
3965N/A // offset is a const and equals referent offset
3965N/A // if (source == null) -> continue
3965N/A __ cmp(lir_cond_equal, src.result(), LIR_OprFact::oopConst(NULL));
3965N/A __ branch(lir_cond_equal, T_OBJECT, Lcont->label());
2346N/A }
3965N/A LIR_Opr src_klass = new_register(T_OBJECT);
3965N/A if (gen_type_check) {
3965N/A // We have determined that offset == referent_offset && src != null.
3965N/A // if (src->_klass->_reference_type == REF_NONE) -> continue
3965N/A __ move(new LIR_Address(src.result(), oopDesc::klass_offset_in_bytes(), T_OBJECT), src_klass);
3965N/A LIR_Address* reference_type_addr = new LIR_Address(src_klass, in_bytes(instanceKlass::reference_type_offset()), T_BYTE);
3965N/A LIR_Opr reference_type = new_register(T_INT);
3965N/A __ move(reference_type_addr, reference_type);
3965N/A __ cmp(lir_cond_equal, reference_type, LIR_OprFact::intConst(REF_NONE));
3965N/A __ branch(lir_cond_equal, T_INT, Lcont->label());
3965N/A }
3965N/A {
3965N/A // We have determined that src->_klass->_reference_type != REF_NONE
3965N/A // so register the value in the referent field with the pre-barrier.
3965N/A pre_barrier(LIR_OprFact::illegalOpr /* addr_opr */,
3965N/A value /* pre_val */,
3965N/A false /* do_load */,
3965N/A false /* patch */,
3965N/A NULL /* info */);
3965N/A }
3965N/A __ branch_destination(Lcont->label());
2346N/A }
2346N/A }
2346N/A#endif // SERIALGC
2346N/A
0N/A if (x->is_volatile() && os::is_MP()) __ membar_acquire();
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_UnsafePutObject(UnsafePutObject* x) {
0N/A BasicType type = x->basic_type();
0N/A LIRItem src(x->object(), this);
0N/A LIRItem off(x->offset(), this);
0N/A LIRItem data(x->value(), this);
0N/A
0N/A src.load_item();
0N/A if (type == T_BOOLEAN || type == T_BYTE) {
0N/A data.load_byte_item();
0N/A } else {
0N/A data.load_item();
0N/A }
0N/A off.load_item();
0N/A
0N/A set_no_result(x);
0N/A
0N/A if (x->is_volatile() && os::is_MP()) __ membar_release();
0N/A put_Object_unsafe(src.result(), off.result(), data.result(), type, x->is_volatile());
2008N/A if (x->is_volatile() && os::is_MP()) __ membar();
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_UnsafePrefetch(UnsafePrefetch* x, bool is_store) {
0N/A LIRItem src(x->object(), this);
0N/A LIRItem off(x->offset(), this);
0N/A
0N/A src.load_item();
0N/A if (off.is_constant() && can_inline_as_constant(x->offset())) {
0N/A // let it be a constant
0N/A off.dont_load_item();
0N/A } else {
0N/A off.load_item();
0N/A }
0N/A
0N/A set_no_result(x);
0N/A
0N/A LIR_Address* addr = generate_address(src.result(), off.result(), 0, 0, T_BYTE);
0N/A __ prefetch(addr, is_store);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_UnsafePrefetchRead(UnsafePrefetchRead* x) {
0N/A do_UnsafePrefetch(x, false);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_UnsafePrefetchWrite(UnsafePrefetchWrite* x) {
0N/A do_UnsafePrefetch(x, true);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_SwitchRanges(SwitchRangeArray* x, LIR_Opr value, BlockBegin* default_sux) {
0N/A int lng = x->length();
0N/A
0N/A for (int i = 0; i < lng; i++) {
0N/A SwitchRange* one_range = x->at(i);
0N/A int low_key = one_range->low_key();
0N/A int high_key = one_range->high_key();
0N/A BlockBegin* dest = one_range->sux();
0N/A if (low_key == high_key) {
0N/A __ cmp(lir_cond_equal, value, low_key);
0N/A __ branch(lir_cond_equal, T_INT, dest);
0N/A } else if (high_key - low_key == 1) {
0N/A __ cmp(lir_cond_equal, value, low_key);
0N/A __ branch(lir_cond_equal, T_INT, dest);
0N/A __ cmp(lir_cond_equal, value, high_key);
0N/A __ branch(lir_cond_equal, T_INT, dest);
0N/A } else {
0N/A LabelObj* L = new LabelObj();
0N/A __ cmp(lir_cond_less, value, low_key);
3099N/A __ branch(lir_cond_less, T_INT, L->label());
0N/A __ cmp(lir_cond_lessEqual, value, high_key);
0N/A __ branch(lir_cond_lessEqual, T_INT, dest);
0N/A __ branch_destination(L->label());
0N/A }
0N/A }
0N/A __ jump(default_sux);
0N/A}
0N/A
0N/A
0N/ASwitchRangeArray* LIRGenerator::create_lookup_ranges(TableSwitch* x) {
0N/A SwitchRangeList* res = new SwitchRangeList();
0N/A int len = x->length();
0N/A if (len > 0) {
0N/A BlockBegin* sux = x->sux_at(0);
0N/A int key = x->lo_key();
0N/A BlockBegin* default_sux = x->default_sux();
0N/A SwitchRange* range = new SwitchRange(key, sux);
0N/A for (int i = 0; i < len; i++, key++) {
0N/A BlockBegin* new_sux = x->sux_at(i);
0N/A if (sux == new_sux) {
0N/A // still in same range
0N/A range->set_high_key(key);
0N/A } else {
0N/A // skip tests which explicitly dispatch to the default
0N/A if (sux != default_sux) {
0N/A res->append(range);
0N/A }
0N/A range = new SwitchRange(key, new_sux);
0N/A }
0N/A sux = new_sux;
0N/A }
0N/A if (res->length() == 0 || res->last() != range) res->append(range);
0N/A }
0N/A return res;
0N/A}
0N/A
0N/A
0N/A// we expect the keys to be sorted by increasing value
0N/ASwitchRangeArray* LIRGenerator::create_lookup_ranges(LookupSwitch* x) {
0N/A SwitchRangeList* res = new SwitchRangeList();
0N/A int len = x->length();
0N/A if (len > 0) {
0N/A BlockBegin* default_sux = x->default_sux();
0N/A int key = x->key_at(0);
0N/A BlockBegin* sux = x->sux_at(0);
0N/A SwitchRange* range = new SwitchRange(key, sux);
0N/A for (int i = 1; i < len; i++) {
0N/A int new_key = x->key_at(i);
0N/A BlockBegin* new_sux = x->sux_at(i);
0N/A if (key+1 == new_key && sux == new_sux) {
0N/A // still in same range
0N/A range->set_high_key(new_key);
0N/A } else {
0N/A // skip tests which explicitly dispatch to the default
0N/A if (range->sux() != default_sux) {
0N/A res->append(range);
0N/A }
0N/A range = new SwitchRange(new_key, new_sux);
0N/A }
0N/A key = new_key;
0N/A sux = new_sux;
0N/A }
0N/A if (res->length() == 0 || res->last() != range) res->append(range);
0N/A }
0N/A return res;
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_TableSwitch(TableSwitch* x) {
0N/A LIRItem tag(x->tag(), this);
0N/A tag.load_item();
0N/A set_no_result(x);
0N/A
0N/A if (x->is_safepoint()) {
0N/A __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
0N/A }
0N/A
0N/A // move values into phi locations
0N/A move_to_phi(x->state());
0N/A
0N/A int lo_key = x->lo_key();
0N/A int hi_key = x->hi_key();
0N/A int len = x->length();
0N/A LIR_Opr value = tag.result();
0N/A if (UseTableRanges) {
0N/A do_SwitchRanges(create_lookup_ranges(x), value, x->default_sux());
0N/A } else {
0N/A for (int i = 0; i < len; i++) {
0N/A __ cmp(lir_cond_equal, value, i + lo_key);
0N/A __ branch(lir_cond_equal, T_INT, x->sux_at(i));
0N/A }
0N/A __ jump(x->default_sux());
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_LookupSwitch(LookupSwitch* x) {
0N/A LIRItem tag(x->tag(), this);
0N/A tag.load_item();
0N/A set_no_result(x);
0N/A
0N/A if (x->is_safepoint()) {
0N/A __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
0N/A }
0N/A
0N/A // move values into phi locations
0N/A move_to_phi(x->state());
0N/A
0N/A LIR_Opr value = tag.result();
0N/A if (UseTableRanges) {
0N/A do_SwitchRanges(create_lookup_ranges(x), value, x->default_sux());
0N/A } else {
0N/A int len = x->length();
0N/A for (int i = 0; i < len; i++) {
0N/A __ cmp(lir_cond_equal, value, x->key_at(i));
0N/A __ branch(lir_cond_equal, T_INT, x->sux_at(i));
0N/A }
0N/A __ jump(x->default_sux());
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_Goto(Goto* x) {
0N/A set_no_result(x);
0N/A
0N/A if (block()->next()->as_OsrEntry()) {
0N/A // need to free up storage used for OSR entry point
0N/A LIR_Opr osrBuffer = block()->next()->operand();
0N/A BasicTypeList signature;
0N/A signature.append(T_INT);
0N/A CallingConvention* cc = frame_map()->c_calling_convention(&signature);
0N/A __ move(osrBuffer, cc->args()->at(0));
0N/A __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::OSR_migration_end),
0N/A getThreadTemp(), LIR_OprFact::illegalOpr, cc->args());
0N/A }
0N/A
0N/A if (x->is_safepoint()) {
0N/A ValueStack* state = x->state_before() ? x->state_before() : x->state();
0N/A
0N/A // increment backedge counter if needed
1703N/A CodeEmitInfo* info = state_for(x, state);
2833N/A increment_backedge_counter(info, x->profiled_bci());
0N/A CodeEmitInfo* safepoint_info = state_for(x, state);
0N/A __ safepoint(safepoint_poll_register(), safepoint_info);
0N/A }
0N/A
1703N/A // Gotos can be folded Ifs, handle this case.
1703N/A if (x->should_profile()) {
1703N/A ciMethod* method = x->profiled_method();
1703N/A assert(method != NULL, "method should be set if branch is profiled");
1914N/A ciMethodData* md = method->method_data_or_null();
1914N/A assert(md != NULL, "Sanity");
1703N/A ciProfileData* data = md->bci_to_data(x->profiled_bci());
1703N/A assert(data != NULL, "must have profiling data");
1703N/A int offset;
1703N/A if (x->direction() == Goto::taken) {
1703N/A assert(data->is_BranchData(), "need BranchData for two-way branches");
1703N/A offset = md->byte_offset_of_slot(data, BranchData::taken_offset());
1703N/A } else if (x->direction() == Goto::not_taken) {
1703N/A assert(data->is_BranchData(), "need BranchData for two-way branches");
1703N/A offset = md->byte_offset_of_slot(data, BranchData::not_taken_offset());
1703N/A } else {
1703N/A assert(data->is_JumpData(), "need JumpData for branches");
1703N/A offset = md->byte_offset_of_slot(data, JumpData::taken_offset());
1703N/A }
1703N/A LIR_Opr md_reg = new_register(T_OBJECT);
1703N/A __ oop2reg(md->constant_encoding(), md_reg);
1703N/A
1703N/A increment_counter(new LIR_Address(md_reg, offset,
1703N/A NOT_LP64(T_INT) LP64_ONLY(T_LONG)), DataLayout::counter_increment);
1703N/A }
1703N/A
0N/A // emit phi-instruction move after safepoint since this simplifies
0N/A // describing the state as the safepoint.
0N/A move_to_phi(x->state());
0N/A
0N/A __ jump(x->default_sux());
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_Base(Base* x) {
0N/A __ std_entry(LIR_OprFact::illegalOpr);
0N/A // Emit moves from physical registers / stack slots to virtual registers
0N/A CallingConvention* args = compilation()->frame_map()->incoming_arguments();
0N/A IRScope* irScope = compilation()->hir()->top_scope();
0N/A int java_index = 0;
0N/A for (int i = 0; i < args->length(); i++) {
0N/A LIR_Opr src = args->at(i);
0N/A assert(!src->is_illegal(), "check");
0N/A BasicType t = src->type();
0N/A
0N/A // Types which are smaller than int are passed as int, so
0N/A // correct the type which passed.
0N/A switch (t) {
0N/A case T_BYTE:
0N/A case T_BOOLEAN:
0N/A case T_SHORT:
0N/A case T_CHAR:
0N/A t = T_INT;
0N/A break;
0N/A }
0N/A
0N/A LIR_Opr dest = new_register(t);
0N/A __ move(src, dest);
0N/A
0N/A // Assign new location to Local instruction for this local
0N/A Local* local = x->state()->local_at(java_index)->as_Local();
0N/A assert(local != NULL, "Locals for incoming arguments must have been created");
1601N/A#ifndef __SOFTFP__
1601N/A // The java calling convention passes double as long and float as int.
0N/A assert(as_ValueType(t)->tag() == local->type()->tag(), "check");
1601N/A#endif // __SOFTFP__
0N/A local->set_operand(dest);
0N/A _instruction_for_operand.at_put_grow(dest->vreg_number(), local, NULL);
0N/A java_index += type2size[t];
0N/A }
0N/A
780N/A if (compilation()->env()->dtrace_method_probes()) {
0N/A BasicTypeList signature;
1909N/A signature.append(LP64_ONLY(T_LONG) NOT_LP64(T_INT)); // thread
0N/A signature.append(T_OBJECT); // methodOop
0N/A LIR_OprList* args = new LIR_OprList();
0N/A args->append(getThreadPointer());
0N/A LIR_Opr meth = new_register(T_OBJECT);
989N/A __ oop2reg(method()->constant_encoding(), meth);
0N/A args->append(meth);
0N/A call_runtime(&signature, args, CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), voidType, NULL);
0N/A }
0N/A
0N/A if (method()->is_synchronized()) {
0N/A LIR_Opr obj;
0N/A if (method()->is_static()) {
0N/A obj = new_register(T_OBJECT);
989N/A __ oop2reg(method()->holder()->java_mirror()->constant_encoding(), obj);
0N/A } else {
0N/A Local* receiver = x->state()->local_at(0)->as_Local();
0N/A assert(receiver != NULL, "must already exist");
0N/A obj = receiver->operand();
0N/A }
0N/A assert(obj->is_valid(), "must be valid");
0N/A
0N/A if (method()->is_synchronized() && GenerateSynchronizationCode) {
0N/A LIR_Opr lock = new_register(T_INT);
0N/A __ load_stack_address_monitor(0, lock);
0N/A
1739N/A CodeEmitInfo* info = new CodeEmitInfo(scope()->start()->state()->copy(ValueStack::StateBefore, SynchronizationEntryBCI), NULL);
0N/A CodeStub* slow_path = new MonitorEnterStub(obj, lock, info);
0N/A
0N/A // receiver is guaranteed non-NULL so don't need CodeEmitInfo
0N/A __ lock_object(syncTempOpr(), obj, lock, new_register(T_OBJECT), slow_path, NULL);
0N/A }
0N/A }
0N/A
0N/A // increment invocation counters if needed
1703N/A if (!method()->is_accessor()) { // Accessors do not have MDOs, so no counting.
1745N/A CodeEmitInfo* info = new CodeEmitInfo(scope()->start()->state()->copy(ValueStack::StateBefore, SynchronizationEntryBCI), NULL);
1703N/A increment_invocation_counter(info);
1703N/A }
0N/A
0N/A // all blocks with a successor must end with an unconditional jump
0N/A // to the successor even if they are consecutive
0N/A __ jump(x->default_sux());
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_OsrEntry(OsrEntry* x) {
0N/A // construct our frame and model the production of incoming pointer
0N/A // to the OSR buffer.
0N/A __ osr_entry(LIR_Assembler::osrBufferPointer());
0N/A LIR_Opr result = rlock_result(x);
0N/A __ move(LIR_Assembler::osrBufferPointer(), result);
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::invoke_load_arguments(Invoke* x, LIRItemList* args, const LIR_OprList* arg_list) {
3966N/A assert(args->length() == arg_list->length(),
3966N/A err_msg_res("args=%d, arg_list=%d", args->length(), arg_list->length()));
3966N/A for (int i = x->has_receiver() ? 1 : 0; i < args->length(); i++) {
0N/A LIRItem* param = args->at(i);
0N/A LIR_Opr loc = arg_list->at(i);
0N/A if (loc->is_register()) {
0N/A param->load_item_force(loc);
0N/A } else {
0N/A LIR_Address* addr = loc->as_address_ptr();
0N/A param->load_for_store(addr->type());
1909N/A if (addr->type() == T_OBJECT) {
1909N/A __ move_wide(param->result(), addr);
1909N/A } else
1909N/A if (addr->type() == T_LONG || addr->type() == T_DOUBLE) {
1909N/A __ unaligned_move(param->result(), addr);
1909N/A } else {
1909N/A __ move(param->result(), addr);
1909N/A }
0N/A }
0N/A }
0N/A
0N/A if (x->has_receiver()) {
0N/A LIRItem* receiver = args->at(0);
0N/A LIR_Opr loc = arg_list->at(0);
0N/A if (loc->is_register()) {
0N/A receiver->load_item_force(loc);
0N/A } else {
0N/A assert(loc->is_address(), "just checking");
0N/A receiver->load_for_store(T_OBJECT);
1909N/A __ move_wide(receiver->result(), loc->as_address_ptr());
0N/A }
0N/A }
0N/A}
0N/A
0N/A
0N/A// Visits all arguments, returns appropriate items without loading them
0N/ALIRItemList* LIRGenerator::invoke_visit_arguments(Invoke* x) {
0N/A LIRItemList* argument_items = new LIRItemList();
0N/A if (x->has_receiver()) {
0N/A LIRItem* receiver = new LIRItem(x->receiver(), this);
0N/A argument_items->append(receiver);
0N/A }
0N/A for (int i = 0; i < x->number_of_arguments(); i++) {
0N/A LIRItem* param = new LIRItem(x->argument_at(i), this);
0N/A argument_items->append(param);
0N/A }
0N/A return argument_items;
0N/A}
0N/A
0N/A
0N/A// The invoke with receiver has following phases:
0N/A// a) traverse and load/lock receiver;
0N/A// b) traverse all arguments -> item-array (invoke_visit_argument)
0N/A// c) push receiver on stack
0N/A// d) load each of the items and push on stack
0N/A// e) unlock receiver
0N/A// f) move receiver into receiver-register %o0
0N/A// g) lock result registers and emit call operation
0N/A//
0N/A// Before issuing a call, we must spill-save all values on stack
0N/A// that are in caller-save register. "spill-save" moves thos registers
0N/A// either in a free callee-save register or spills them if no free
0N/A// callee save register is available.
0N/A//
0N/A// The problem is where to invoke spill-save.
0N/A// - if invoked between e) and f), we may lock callee save
0N/A// register in "spill-save" that destroys the receiver register
0N/A// before f) is executed
0N/A// - if we rearange the f) to be earlier, by loading %o0, it
0N/A// may destroy a value on the stack that is currently in %o0
0N/A// and is waiting to be spilled
0N/A// - if we keep the receiver locked while doing spill-save,
0N/A// we cannot spill it as it is spill-locked
0N/A//
0N/Avoid LIRGenerator::do_Invoke(Invoke* x) {
0N/A CallingConvention* cc = frame_map()->java_calling_convention(x->signature(), true);
0N/A
0N/A LIR_OprList* arg_list = cc->args();
0N/A LIRItemList* args = invoke_visit_arguments(x);
0N/A LIR_Opr receiver = LIR_OprFact::illegalOpr;
0N/A
0N/A // setup result register
0N/A LIR_Opr result_register = LIR_OprFact::illegalOpr;
0N/A if (x->type() != voidType) {
0N/A result_register = result_register_for(x->type());
0N/A }
0N/A
0N/A CodeEmitInfo* info = state_for(x, x->state());
0N/A
0N/A invoke_load_arguments(x, args, arg_list);
0N/A
0N/A if (x->has_receiver()) {
0N/A args->at(0)->load_item_force(LIR_Assembler::receiverOpr());
0N/A receiver = args->at(0)->result();
0N/A }
0N/A
0N/A // emit invoke code
0N/A bool optimized = x->target_is_loaded() && x->target_is_final();
0N/A assert(receiver->is_illegal() || receiver->is_equal(LIR_Assembler::receiverOpr()), "must match");
0N/A
1484N/A // JSR 292
1484N/A // Preserve the SP over MethodHandle call sites.
1484N/A ciMethod* target = x->target();
3932N/A bool is_method_handle_invoke = (// %%% FIXME: Are both of these relevant?
3932N/A target->is_method_handle_intrinsic() ||
3932N/A target->is_compiled_lambda_form());
3932N/A if (is_method_handle_invoke) {
1484N/A info->set_is_method_handle_invoke(true);
1484N/A __ move(FrameMap::stack_pointer(), FrameMap::method_handle_invoke_SP_save_opr());
1484N/A }
1484N/A
0N/A switch (x->code()) {
0N/A case Bytecodes::_invokestatic:
1484N/A __ call_static(target, result_register,
0N/A SharedRuntime::get_resolve_static_call_stub(),
0N/A arg_list, info);
0N/A break;
0N/A case Bytecodes::_invokespecial:
0N/A case Bytecodes::_invokevirtual:
0N/A case Bytecodes::_invokeinterface:
0N/A // for final target we still produce an inline cache, in order
0N/A // to be able to call mixed mode
0N/A if (x->code() == Bytecodes::_invokespecial || optimized) {
1484N/A __ call_opt_virtual(target, receiver, result_register,
0N/A SharedRuntime::get_resolve_opt_virtual_call_stub(),
0N/A arg_list, info);
0N/A } else if (x->vtable_index() < 0) {
1484N/A __ call_icvirtual(target, receiver, result_register,
0N/A SharedRuntime::get_resolve_virtual_call_stub(),
0N/A arg_list, info);
0N/A } else {
0N/A int entry_offset = instanceKlass::vtable_start_offset() + x->vtable_index() * vtableEntry::size();
0N/A int vtable_offset = entry_offset * wordSize + vtableEntry::method_offset_in_bytes();
1484N/A __ call_virtual(target, receiver, result_register, vtable_offset, arg_list, info);
0N/A }
0N/A break;
1295N/A case Bytecodes::_invokedynamic: {
1484N/A __ call_dynamic(target, receiver, result_register,
3966N/A SharedRuntime::get_resolve_static_call_stub(),
1295N/A arg_list, info);
1295N/A break;
1295N/A }
0N/A default:
3812N/A fatal(err_msg("unexpected bytecode: %s", Bytecodes::name(x->code())));
0N/A break;
0N/A }
0N/A
1484N/A // JSR 292
1484N/A // Restore the SP after MethodHandle call sites.
3932N/A if (is_method_handle_invoke) {
1484N/A __ move(FrameMap::method_handle_invoke_SP_save_opr(), FrameMap::stack_pointer());
1484N/A }
1484N/A
0N/A if (x->type()->is_float() || x->type()->is_double()) {
0N/A // Force rounding of results from non-strictfp when in strictfp
0N/A // scope (or when we don't know the strictness of the callee, to
0N/A // be safe.)
0N/A if (method()->is_strict()) {
0N/A if (!x->target_is_loaded() || !x->target_is_strictfp()) {
0N/A result_register = round_item(result_register);
0N/A }
0N/A }
0N/A }
0N/A
0N/A if (result_register->is_valid()) {
0N/A LIR_Opr result = rlock_result(x);
0N/A __ move(result_register, result);
0N/A }
0N/A}
0N/A
0N/A
0N/Avoid LIRGenerator::do_FPIntrinsics(Intrinsic* x) {
0N/A assert(x->number_of_arguments() == 1, "wrong type");
0N/A LIRItem value (x->argument_at(0), this);
0N/A LIR_Opr reg = rlock_result(x);
0N/A value.load_item();
0N/A LIR_Opr tmp = force_to_spill(value.result(), as_BasicType(x->type()));
0N/A __ move(tmp, reg);
0N/A}
0N/A
0N/A
0N/A
0N/A// Code for : x->x() {x->cond()} x->y() ? x->tval() : x->fval()
0N/Avoid LIRGenerator::do_IfOp(IfOp* x) {
0N/A#ifdef ASSERT
0N/A {
0N/A ValueTag xtag = x->x()->type()->tag();
0N/A ValueTag ttag = x->tval()->type()->tag();
0N/A assert(xtag == intTag || xtag == objectTag, "cannot handle others");
0N/A assert(ttag == addressTag || ttag == intTag || ttag == objectTag || ttag == longTag, "cannot handle others");
0N/A assert(ttag == x->fval()->type()->tag(), "cannot handle others");
0N/A }
0N/A#endif
0N/A
0N/A LIRItem left(x->x(), this);
0N/A LIRItem right(x->y(), this);
0N/A left.load_item();
0N/A if (can_inline_as_constant(right.value())) {
0N/A right.dont_load_item();
0N/A } else {
0N/A right.load_item();
0N/A }
0N/A
0N/A LIRItem t_val(x->tval(), this);
0N/A LIRItem f_val(x->fval(), this);
0N/A t_val.dont_load_item();
0N/A f_val.dont_load_item();
0N/A LIR_Opr reg = rlock_result(x);
0N/A
0N/A __ cmp(lir_cond(x->cond()), left.result(), right.result());
1977N/A __ cmove(lir_cond(x->cond()), t_val.result(), f_val.result(), reg, as_BasicType(x->x()->type()));
0N/A}
0N/A
3677N/Avoid LIRGenerator::do_RuntimeCall(address routine, int expected_arguments, Intrinsic* x) {
3677N/A assert(x->number_of_arguments() == expected_arguments, "wrong type");
3677N/A LIR_Opr reg = result_register_for(x->type());
3677N/A __ call_runtime_leaf(routine, getThreadTemp(),
3677N/A reg, new LIR_OprList());
3677N/A LIR_Opr result = rlock_result(x);
3677N/A __ move(reg, result);
3677N/A}
3677N/A
3677N/A#ifdef TRACE_HAVE_INTRINSICS
3677N/Avoid LIRGenerator::do_ThreadIDIntrinsic(Intrinsic* x) {
3677N/A LIR_Opr thread = getThreadPointer();
3677N/A LIR_Opr osthread = new_pointer_register();
3677N/A __ move(new LIR_Address(thread, in_bytes(JavaThread::osthread_offset()), osthread->type()), osthread);
3677N/A size_t thread_id_size = OSThread::thread_id_size();
3677N/A if (thread_id_size == (size_t) BytesPerLong) {
3677N/A LIR_Opr id = new_register(T_LONG);
3677N/A __ move(new LIR_Address(osthread, in_bytes(OSThread::thread_id_offset()), T_LONG), id);
3677N/A __ convert(Bytecodes::_l2i, id, rlock_result(x));
3677N/A } else if (thread_id_size == (size_t) BytesPerInt) {
3677N/A __ move(new LIR_Address(osthread, in_bytes(OSThread::thread_id_offset()), T_INT), rlock_result(x));
3677N/A } else {
3677N/A ShouldNotReachHere();
3677N/A }
3677N/A}
3677N/A
3677N/Avoid LIRGenerator::do_ClassIDIntrinsic(Intrinsic* x) {
3677N/A CodeEmitInfo* info = state_for(x);
3677N/A CodeEmitInfo* info2 = new CodeEmitInfo(info); // Clone for the second null check
3677N/A assert(info != NULL, "must have info");
3677N/A LIRItem arg(x->argument_at(1), this);
3677N/A arg.load_item();
3677N/A LIR_Opr klass = new_register(T_OBJECT);
3677N/A __ move(new LIR_Address(arg.result(), java_lang_Class::klass_offset_in_bytes(), T_OBJECT), klass, info);
3677N/A LIR_Opr id = new_register(T_LONG);
3677N/A ByteSize offset = TRACE_ID_OFFSET;
3677N/A LIR_Address* trace_id_addr = new LIR_Address(klass, in_bytes(offset), T_LONG);
3677N/A __ move(trace_id_addr, id);
3677N/A __ logical_or(id, LIR_OprFact::longConst(0x01l), id);
3677N/A __ store(id, trace_id_addr);
3677N/A __ logical_and(id, LIR_OprFact::longConst(~0x3l), id);
3677N/A __ move(id, rlock_result(x));
3677N/A}
3677N/A#endif
0N/A
0N/Avoid LIRGenerator::do_Intrinsic(Intrinsic* x) {
0N/A switch (x->id()) {
0N/A case vmIntrinsics::_intBitsToFloat :
0N/A case vmIntrinsics::_doubleToRawLongBits :
0N/A case vmIntrinsics::_longBitsToDouble :
0N/A case vmIntrinsics::_floatToRawIntBits : {
0N/A do_FPIntrinsics(x);
0N/A break;
0N/A }
0N/A
3677N/A#ifdef TRACE_HAVE_INTRINSICS
3677N/A case vmIntrinsics::_threadID: do_ThreadIDIntrinsic(x); break;
3677N/A case vmIntrinsics::_classID: do_ClassIDIntrinsic(x); break;
3677N/A case vmIntrinsics::_counterTime:
3677N/A do_RuntimeCall(CAST_FROM_FN_PTR(address, TRACE_TIME_METHOD), 0, x);
0N/A break;
3677N/A#endif
3677N/A
3677N/A case vmIntrinsics::_currentTimeMillis:
3677N/A do_RuntimeCall(CAST_FROM_FN_PTR(address, os::javaTimeMillis), 0, x);
0N/A break;
3677N/A
3677N/A case vmIntrinsics::_nanoTime:
3677N/A do_RuntimeCall(CAST_FROM_FN_PTR(address, os::javaTimeNanos), 0, x);
3677N/A break;
0N/A
0N/A case vmIntrinsics::_Object_init: do_RegisterFinalizer(x); break;
3802N/A case vmIntrinsics::_isInstance: do_isInstance(x); break;
0N/A case vmIntrinsics::_getClass: do_getClass(x); break;
0N/A case vmIntrinsics::_currentThread: do_currentThread(x); break;
0N/A
0N/A case vmIntrinsics::_dlog: // fall through
0N/A case vmIntrinsics::_dlog10: // fall through
0N/A case vmIntrinsics::_dabs: // fall through
0N/A case vmIntrinsics::_dsqrt: // fall through
0N/A case vmIntrinsics::_dtan: // fall through
0N/A case vmIntrinsics::_dsin : // fall through
3752N/A case vmIntrinsics::_dcos : // fall through
3752N/A case vmIntrinsics::_dexp : // fall through
3752N/A case vmIntrinsics::_dpow : do_MathIntrinsic(x); break;
0N/A case vmIntrinsics::_arraycopy: do_ArrayCopy(x); break;
0N/A
0N/A // java.nio.Buffer.checkIndex
0N/A case vmIntrinsics::_checkIndex: do_NIOCheckIndex(x); break;
0N/A
0N/A case vmIntrinsics::_compareAndSwapObject:
0N/A do_CompareAndSwap(x, objectType);
0N/A break;
0N/A case vmIntrinsics::_compareAndSwapInt:
0N/A do_CompareAndSwap(x, intType);
0N/A break;
0N/A case vmIntrinsics::_compareAndSwapLong:
0N/A do_CompareAndSwap(x, longType);
0N/A break;
0N/A
2346N/A case vmIntrinsics::_Reference_get:
2346N/A do_Reference_get(x);
2346N/A break;
2346N/A
0N/A default: ShouldNotReachHere(); break;
0N/A }
0N/A}
0N/A
0N/Avoid LIRGenerator::do_ProfileCall(ProfileCall* x) {
0N/A // Need recv in a temporary register so it interferes with the other temporaries
0N/A LIR_Opr recv = LIR_OprFact::illegalOpr;
0N/A LIR_Opr mdo = new_register(T_OBJECT);
1703N/A // tmp is used to hold the counters on SPARC
1703N/A LIR_Opr tmp = new_pointer_register();
0N/A if (x->recv() != NULL) {
0N/A LIRItem value(x->recv(), this);
0N/A value.load_item();
0N/A recv = new_register(T_OBJECT);
0N/A __ move(value.result(), recv);
0N/A }
3932N/A __ profile_call(x->method(), x->bci_of_invoke(), x->callee(), mdo, recv, tmp, x->known_holder());
0N/A}
0N/A
1703N/Avoid LIRGenerator::do_ProfileInvoke(ProfileInvoke* x) {
1703N/A // We can safely ignore accessors here, since c2 will inline them anyway,
1703N/A // accessors are also always mature.
1703N/A if (!x->inlinee()->is_accessor()) {
1703N/A CodeEmitInfo* info = state_for(x, x->state(), true);
2800N/A // Notify the runtime very infrequently only to take care of counter overflows
2800N/A increment_event_counter_impl(info, x->inlinee(), (1 << Tier23InlineeNotifyFreqLog) - 1, InvocationEntryBci, false, true);
1703N/A }
1703N/A}
1703N/A
1703N/Avoid LIRGenerator::increment_event_counter(CodeEmitInfo* info, int bci, bool backedge) {
1703N/A int freq_log;
1703N/A int level = compilation()->env()->comp_level();
1703N/A if (level == CompLevel_limited_profile) {
1703N/A freq_log = (backedge ? Tier2BackedgeNotifyFreqLog : Tier2InvokeNotifyFreqLog);
1703N/A } else if (level == CompLevel_full_profile) {
1703N/A freq_log = (backedge ? Tier3BackedgeNotifyFreqLog : Tier3InvokeNotifyFreqLog);
1703N/A } else {
1703N/A ShouldNotReachHere();
1703N/A }
1703N/A // Increment the appropriate invocation/backedge counter and notify the runtime.
1703N/A increment_event_counter_impl(info, info->scope()->method(), (1 << freq_log) - 1, bci, backedge, true);
0N/A}
0N/A
1703N/Avoid LIRGenerator::increment_event_counter_impl(CodeEmitInfo* info,
1703N/A ciMethod *method, int frequency,
1703N/A int bci, bool backedge, bool notify) {
1703N/A assert(frequency == 0 || is_power_of_2(frequency + 1), "Frequency must be x^2 - 1 or 0");
1703N/A int level = _compilation->env()->comp_level();
1703N/A assert(level > CompLevel_simple, "Shouldn't be here");
1703N/A
1703N/A int offset = -1;
1703N/A LIR_Opr counter_holder = new_register(T_OBJECT);
1703N/A LIR_Opr meth;
1703N/A if (level == CompLevel_limited_profile) {
1703N/A offset = in_bytes(backedge ? methodOopDesc::backedge_counter_offset() :
1703N/A methodOopDesc::invocation_counter_offset());
1703N/A __ oop2reg(method->constant_encoding(), counter_holder);
1703N/A meth = counter_holder;
1703N/A } else if (level == CompLevel_full_profile) {
1703N/A offset = in_bytes(backedge ? methodDataOopDesc::backedge_counter_offset() :
1703N/A methodDataOopDesc::invocation_counter_offset());
1914N/A ciMethodData* md = method->method_data_or_null();
1914N/A assert(md != NULL, "Sanity");
1914N/A __ oop2reg(md->constant_encoding(), counter_holder);
1703N/A meth = new_register(T_OBJECT);
1703N/A __ oop2reg(method->constant_encoding(), meth);
1703N/A } else {
1703N/A ShouldNotReachHere();
1703N/A }
1703N/A LIR_Address* counter = new LIR_Address(counter_holder, offset, T_INT);
1703N/A LIR_Opr result = new_register(T_INT);
1703N/A __ load(counter, result);
1703N/A __ add(result, LIR_OprFact::intConst(InvocationCounter::count_increment), result);
1703N/A __ store(result, counter);
1703N/A if (notify) {
1703N/A LIR_Opr mask = load_immediate(frequency << InvocationCounter::count_shift, T_INT);
1703N/A __ logical_and(result, mask, result);
1703N/A __ cmp(lir_cond_equal, result, LIR_OprFact::intConst(0));
1703N/A // The bci for info can point to cmp for if's we want the if bci
1703N/A CodeStub* overflow = new CounterOverflowStub(info, bci, meth);
1703N/A __ branch(lir_cond_equal, T_INT, overflow);
1703N/A __ branch_destination(overflow->continuation());
1703N/A }
1703N/A}
0N/A
2051N/Avoid LIRGenerator::do_RuntimeCall(RuntimeCall* x) {
2051N/A LIR_OprList* args = new LIR_OprList(x->number_of_arguments());
2051N/A BasicTypeList* signature = new BasicTypeList(x->number_of_arguments());
2051N/A
2051N/A if (x->pass_thread()) {
2051N/A signature->append(T_ADDRESS);
2051N/A args->append(getThreadPointer());
2051N/A }
2051N/A
2051N/A for (int i = 0; i < x->number_of_arguments(); i++) {
2051N/A Value a = x->argument_at(i);
2051N/A LIRItem* item = new LIRItem(a, this);
2051N/A item->load_item();
2051N/A args->append(item->result());
2051N/A signature->append(as_BasicType(a->type()));
2051N/A }
2051N/A
2051N/A LIR_Opr result = call_runtime(signature, args, x->entry(), x->type(), NULL);
2051N/A if (x->type() == voidType) {
2051N/A set_no_result(x);
2051N/A } else {
2051N/A __ move(result, rlock_result(x));
2051N/A }
2051N/A}
2051N/A
0N/ALIR_Opr LIRGenerator::call_runtime(Value arg1, address entry, ValueType* result_type, CodeEmitInfo* info) {
0N/A LIRItemList args(1);
0N/A LIRItem value(arg1, this);
0N/A args.append(&value);
0N/A BasicTypeList signature;
0N/A signature.append(as_BasicType(arg1->type()));
0N/A
0N/A return call_runtime(&signature, &args, entry, result_type, info);
0N/A}
0N/A
0N/A
0N/ALIR_Opr LIRGenerator::call_runtime(Value arg1, Value arg2, address entry, ValueType* result_type, CodeEmitInfo* info) {
0N/A LIRItemList args(2);
0N/A LIRItem value1(arg1, this);
0N/A LIRItem value2(arg2, this);
0N/A args.append(&value1);
0N/A args.append(&value2);
0N/A BasicTypeList signature;
0N/A signature.append(as_BasicType(arg1->type()));
0N/A signature.append(as_BasicType(arg2->type()));
0N/A
0N/A return call_runtime(&signature, &args, entry, result_type, info);
0N/A}
0N/A
0N/A
0N/ALIR_Opr LIRGenerator::call_runtime(BasicTypeArray* signature, LIR_OprList* args,
0N/A address entry, ValueType* result_type, CodeEmitInfo* info) {
0N/A // get a result register
0N/A LIR_Opr phys_reg = LIR_OprFact::illegalOpr;
0N/A LIR_Opr result = LIR_OprFact::illegalOpr;
0N/A if (result_type->tag() != voidTag) {
0N/A result = new_register(result_type);
0N/A phys_reg = result_register_for(result_type);
0N/A }
0N/A
0N/A // move the arguments into the correct location
0N/A CallingConvention* cc = frame_map()->c_calling_convention(signature);
0N/A assert(cc->length() == args->length(), "argument mismatch");
0N/A for (int i = 0; i < args->length(); i++) {
0N/A LIR_Opr arg = args->at(i);
0N/A LIR_Opr loc = cc->at(i);
0N/A if (loc->is_register()) {
0N/A __ move(arg, loc);
0N/A } else {
0N/A LIR_Address* addr = loc->as_address_ptr();
0N/A// if (!can_store_as_constant(arg)) {
0N/A// LIR_Opr tmp = new_register(arg->type());
0N/A// __ move(arg, tmp);
0N/A// arg = tmp;
0N/A// }
0N/A if (addr->type() == T_LONG || addr->type() == T_DOUBLE) {
0N/A __ unaligned_move(arg, addr);
0N/A } else {
0N/A __ move(arg, addr);
0N/A }
0N/A }
0N/A }
0N/A
0N/A if (info) {
0N/A __ call_runtime(entry, getThreadTemp(), phys_reg, cc->args(), info);
0N/A } else {
0N/A __ call_runtime_leaf(entry, getThreadTemp(), phys_reg, cc->args());
0N/A }
0N/A if (result->is_valid()) {
0N/A __ move(phys_reg, result);
0N/A }
0N/A return result;
0N/A}
0N/A
0N/A
0N/ALIR_Opr LIRGenerator::call_runtime(BasicTypeArray* signature, LIRItemList* args,
0N/A address entry, ValueType* result_type, CodeEmitInfo* info) {
0N/A // get a result register
0N/A LIR_Opr phys_reg = LIR_OprFact::illegalOpr;
0N/A LIR_Opr result = LIR_OprFact::illegalOpr;
0N/A if (result_type->tag() != voidTag) {
0N/A result = new_register(result_type);
0N/A phys_reg = result_register_for(result_type);
0N/A }
0N/A
0N/A // move the arguments into the correct location
0N/A CallingConvention* cc = frame_map()->c_calling_convention(signature);
0N/A
0N/A assert(cc->length() == args->length(), "argument mismatch");
0N/A for (int i = 0; i < args->length(); i++) {
0N/A LIRItem* arg = args->at(i);
0N/A LIR_Opr loc = cc->at(i);
0N/A if (loc->is_register()) {
0N/A arg->load_item_force(loc);
0N/A } else {
0N/A LIR_Address* addr = loc->as_address_ptr();
0N/A arg->load_for_store(addr->type());
0N/A if (addr->type() == T_LONG || addr->type() == T_DOUBLE) {
0N/A __ unaligned_move(arg->result(), addr);
0N/A } else {
0N/A __ move(arg->result(), addr);
0N/A }
0N/A }
0N/A }
0N/A
0N/A if (info) {
0N/A __ call_runtime(entry, getThreadTemp(), phys_reg, cc->args(), info);
0N/A } else {
0N/A __ call_runtime_leaf(entry, getThreadTemp(), phys_reg, cc->args());
0N/A }
0N/A if (result->is_valid()) {
0N/A __ move(phys_reg, result);
0N/A }
0N/A return result;
0N/A}
3560N/A
3560N/Avoid LIRGenerator::do_MemBar(MemBar* x) {
3560N/A if (os::is_MP()) {
3560N/A LIR_Code code = x->code();
3560N/A switch(code) {
3560N/A case lir_membar_acquire : __ membar_acquire(); break;
3560N/A case lir_membar_release : __ membar_release(); break;
3560N/A case lir_membar : __ membar(); break;
3560N/A case lir_membar_loadload : __ membar_loadload(); break;
3560N/A case lir_membar_storestore: __ membar_storestore(); break;
3560N/A case lir_membar_loadstore : __ membar_loadstore(); break;
3560N/A case lir_membar_storeload : __ membar_storeload(); break;
3560N/A default : ShouldNotReachHere(); break;
3560N/A }
3560N/A }
3560N/A}