Lines Matching defs:reg
560 int reg = opr->vreg_number();
561 if (!live_kill.at(reg)) {
562 live_gen.set_bit(reg);
563 TRACE_LINEAR_SCAN(4, tty->print_cr(" Setting live_gen for value %c%d, LIR op_id %d, register number %d", value->type()->tchar(), value->id(), op->id(), reg));
616 int k, n, reg;
624 reg = opr->vreg_number();
625 if (!live_kill.at(reg)) {
626 live_gen.set_bit(reg);
627 TRACE_LINEAR_SCAN(4, tty->print_cr(" Setting live_gen for register %d at instruction %d", reg, op->id()));
630 local_interval_in_loop.set_bit(reg, block->loop_index());
641 reg = reg_num(opr);
642 if (is_processed_reg_num(reg)) {
643 assert(live_kill.at(reg), "using fixed register that is not defined in this block");
645 reg = reg_numHi(opr);
646 if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) {
647 assert(live_kill.at(reg), "using fixed register that is not defined in this block");
671 reg = opr->vreg_number();
672 live_kill.set_bit(reg);
674 local_interval_in_loop.set_bit(reg, block->loop_index());
684 reg = reg_num(opr);
685 if (is_processed_reg_num(reg)) {
688 reg = reg_numHi(opr);
689 if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) {
690 live_kill.set_bit(reg);
704 reg = opr->vreg_number();
705 live_kill.set_bit(reg);
707 local_interval_in_loop.set_bit(reg, block->loop_index());
717 reg = reg_num(opr);
718 if (is_processed_reg_num(reg)) {
721 reg = reg_numHi(opr);
722 if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) {
723 live_kill.set_bit(reg);
902 int reg = reg_num(opr);
903 if (is_processed_reg_num(reg)) {
904 add_def(reg, def_pos, use_kind, opr->type_register());
906 reg = reg_numHi(opr);
907 if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) {
908 add_def(reg, def_pos, use_kind, opr->type_register());
922 int reg = reg_num(opr);
923 if (is_processed_reg_num(reg)) {
924 add_use(reg, from, to, use_kind, opr->type_register());
926 reg = reg_numHi(opr);
927 if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) {
928 add_use(reg, from, to, use_kind, opr->type_register());
942 int reg = reg_num(opr);
943 if (is_processed_reg_num(reg)) {
944 add_temp(reg, temp_pos, use_kind, opr->type_register());
946 reg = reg_numHi(opr);
947 if (is_valid_reg_num(reg) && is_processed_reg_num(reg)) {
948 add_temp(reg, temp_pos, use_kind, opr->type_register());
975 TRACE_LINEAR_SCAN(2, tty->print_cr("Warning: def of reg %d at %d occurs without use", reg_num, def_pos));
1828 int reg = interval->assigned_reg();
1831 if ((reg < nof_regs && interval->always_in_memory()) ||
1832 (use_fpu_stack_allocation() && reg >= pd_first_fpu_reg && reg <= pd_last_fpu_reg)) {
1850 interval->assign_reg(reg, regHi);
2020 VMReg reg = interval->cached_vm_reg();
2021 if (!reg->is_valid() ) {
2022 reg = vm_reg_for_operand(operand_for_interval(interval));
2023 interval->set_cached_vm_reg(reg);
2025 assert(reg == vm_reg_for_operand(operand_for_interval(interval)), "wrong cached value");
2026 return reg;
3408 void state_put(IntervalList* input_state, int reg, Interval* interval);
3409 bool check_state(IntervalList* input_state, int reg, Interval* interval);
3554 void RegisterVerifier::state_put(IntervalList* input_state, int reg, Interval* interval) {
3555 if (reg != LinearScan::any_reg && reg < state_size()) {
3557 TRACE_LINEAR_SCAN(4, tty->print_cr(" reg[%d] = %d", reg, interval->reg_num()));
3558 } else if (input_state->at(reg) != NULL) {
3559 TRACE_LINEAR_SCAN(4, tty->print_cr(" reg[%d] = NULL", reg));
3562 input_state->at_put(reg, interval);
3566 bool RegisterVerifier::check_state(IntervalList* input_state, int reg, Interval* interval) {
3567 if (reg != LinearScan::any_reg && reg < state_size()) {
3568 if (input_state->at(reg) != interval) {
3569 tty->print_cr("!! Error in register allocation: register %d does not contain interval %d", reg, interval->reg_num());
3767 int reg = it->assigned_reg();
3768 if (reg < LinearScan::nof_regs) {
3769 assert(_multiple_reads_allowed || register_blocked(reg) == 0, "register already marked as used");
3770 set_register_blocked(reg, 1);
3772 reg = it->assigned_regHi();
3773 if (reg != LinearScan::any_reg && reg < LinearScan::nof_regs) {
3774 assert(_multiple_reads_allowed || register_blocked(reg) == 0, "register already marked as used");
3775 set_register_blocked(reg, 1);
3781 int reg = it->assigned_reg();
3782 if (reg < LinearScan::nof_regs) {
3783 assert(register_blocked(reg) > 0, "register already marked as unused");
3784 set_register_blocked(reg, -1);
3786 reg = it->assigned_regHi();
3787 if (reg != LinearScan::any_reg && reg < LinearScan::nof_regs) {
3788 assert(register_blocked(reg) > 0, "register already marked as unused");
3789 set_register_blocked(reg, -1);
3802 int reg = to->assigned_reg();
3803 if (reg < LinearScan::nof_regs) {
3804 if (register_blocked(reg) > 1 || (register_blocked(reg) == 1 && reg != from_reg && reg != from_regHi)) {
3808 reg = to->assigned_regHi();
3809 if (reg != LinearScan::any_reg && reg < LinearScan::nof_regs) {
3810 if (register_blocked(reg) > 1 || (register_blocked(reg) == 1 && reg != from_reg && reg != from_regHi)) {
4824 inline void LinearScanWalker::exclude_from_use(int reg) {
4825 assert(reg < LinearScan::nof_regs, "interval must have a register assigned (stack slots not allowed)");
4826 if (reg >= _first_reg && reg <= _last_reg) {
4827 _use_pos[reg] = 0;
4837 inline void LinearScanWalker::set_use_pos(int reg, Interval* i, int use_pos, bool only_process_use_pos) {
4840 if (reg >= _first_reg && reg <= _last_reg) {
4841 if (_use_pos[reg] > use_pos) {
4842 _use_pos[reg] = use_pos;
4845 _spill_intervals[reg]->append(i);
4857 inline void LinearScanWalker::set_block_pos(int reg, Interval* i, int block_pos) {
4858 if (reg >= _first_reg && reg <= _last_reg) {
4859 if (_block_pos[reg] > block_pos) {
4860 _block_pos[reg] = block_pos;
4862 if (_use_pos[reg] > block_pos) {
4863 _use_pos[reg] = block_pos;
5369 TRACE_LINEAR_SCAN(4, for (int i = _first_reg; i <= _last_reg; i++) tty->print_cr(" reg %d: use_pos: %d", i, _use_pos[i]));
5387 assert(hint_reg == any_reg || hint_reg != hint_regHi, "hint reg and regHi equal");
5396 int reg = any_reg;
5400 reg = find_free_double_reg(reg_needed_until, interval_to, hint_reg, &need_split);
5401 regHi = reg + 1;
5402 if (reg == any_reg) {
5405 split_pos = MIN2(_use_pos[reg], _use_pos[regHi]);
5408 reg = find_free_reg(reg_needed_until, interval_to, hint_reg, any_reg, &need_split);
5409 if (reg == any_reg) {
5412 split_pos = _use_pos[reg];
5415 regHi = find_free_reg(reg_needed_until, interval_to, hint_regHi, reg, &need_split);
5417 if (_use_pos[reg] < interval_to && regHi == any_reg) {
5427 if (reg > regHi) {
5428 int temp = reg;
5429 reg = regHi;
5436 cur->assign_reg(reg, regHi);
5437 TRACE_LINEAR_SCAN(2, tty->print_cr("selected register %d, %d", reg, regHi));
5491 void LinearScanWalker::split_and_spill_intersecting_intervals(int reg, int regHi) {
5492 assert(reg != any_reg, "no register assigned");
5494 for (int i = 0; i < _spill_intervals[reg]->length(); i++) {
5495 Interval* it = _spill_intervals[reg]->at(i);
5501 IntervalList* processed = _spill_intervals[reg];
5530 tty->print(" reg %d: use_pos: %d, block_pos: %d, intervals: ", i, _use_pos[i], _block_pos[i]);
5547 int reg, regHi;
5550 reg = find_locked_double_reg(reg_needed_until, interval_to, any_reg, &need_split);
5551 regHi = reg + 1;
5553 if (reg != any_reg) {
5554 use_pos = MIN2(_use_pos[reg], _use_pos[regHi]);
5555 split_pos = MIN2(_block_pos[reg], _block_pos[regHi]);
5558 reg = find_locked_reg(reg_needed_until, interval_to, any_reg, cur->assigned_reg(), &need_split);
5561 if (reg != any_reg) {
5562 use_pos = _use_pos[reg];
5563 split_pos = _block_pos[reg];
5567 regHi = reg;
5568 reg = cur->assigned_reg();
5570 regHi = find_locked_reg(reg_needed_until, interval_to, any_reg, reg, &need_split);
5577 if (regHi != any_reg && reg > regHi) {
5579 int temp = reg;
5580 reg = regHi;
5587 if (reg == any_reg || (_num_phys_regs == 2 && regHi == any_reg) || use_pos <= cur->first_usage(mustHaveRegister)) {
5600 TRACE_LINEAR_SCAN(4, tty->print_cr("decided to use register %d, %d", reg, regHi));
5601 assert(reg != any_reg && (_num_phys_regs == 1 || regHi != any_reg), "no register found");
5605 cur->assign_reg(reg, regHi);
5612 split_and_spill_intersecting_intervals(reg, regHi);