Lines Matching defs:reg
292 void Assembler::emit_operand(Register reg, Register base, Register index,
300 int regenc = encode(reg) << 3;
311 // [00 reg 100][ss index base]
317 // [01 reg 100][ss index base] imm8
324 // [10 reg 100][ss index base] disp32
334 // [00 reg 100][00 100 100]
339 // [01 reg 100][00 100 100] disp8
345 // [10 reg 100][00 100 100] disp32
356 // [00 reg base]
360 // [01 reg base] disp8
365 // [10 reg base] disp32
374 // [00 reg 100][ss index 101] disp32
402 // [00 reg 100][00 100 101] disp32
410 void Assembler::emit_operand(XMMRegister reg, Register base, Register index,
413 emit_operand((Register)reg, base, index, scale, disp, rspec);
763 assert(which != imm_operand, "instruction is not a movq reg, imm64");
784 // [00 reg 100][ss index base]
785 // [00 reg 100][00 100 esp]
786 // [00 reg base]
787 // [00 reg 100][ss index 101][disp32]
788 // [00 reg 101] [disp32]
798 // [01 reg 100][ss index base][disp8]
799 // [01 reg 100][00 100 esp][disp8]
800 // [01 reg base] [disp8]
805 // [10 reg 100][ss index base][disp32]
806 // [10 reg 100][00 100 esp][disp32]
807 // [10 reg base] [disp32]
814 // [11 reg base] (not a memory addressing mode)
860 void Assembler::emit_operand32(Register reg, Address adr) {
861 assert(reg->encoding() < 8, "no extended registers");
863 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp,
867 void Assembler::emit_operand(Register reg, Address adr,
869 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp,
874 void Assembler::emit_operand(XMMRegister reg, Address adr) {
875 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp,
880 void Assembler::emit_operand(MMXRegister reg, Address adr) {
882 emit_operand((Register)reg, adr._base, adr._index, adr._scale, adr._disp, adr._rspec);
886 void Assembler::emit_operand(Address adr, MMXRegister reg) {
888 emit_operand((Register)reg, adr._base, adr._index, adr._scale, adr._disp, adr._rspec);
1121 void Assembler::bswapl(Register reg) { // bswap
1122 int encode = prefix_and_encode(reg->encoding());
1241 // and stores reg into adr if so; otherwise, the value at adr is loaded into rax,.
1243 void Assembler::cmpxchgl(Register reg, Address adr) { // cmpxchg
1251 if (reg != rax) {
1254 movl(adr, reg);
1259 prefix(adr, reg);
1262 emit_operand(reg, adr);
4540 void Assembler::prefix(Register reg) {
4541 if (reg->encoding() >= 8) {
4577 void Assembler::prefix(Address adr, Register reg, bool byteinst) {
4578 if (reg->encoding() < 8) {
4588 } else if (byteinst && reg->encoding() >= 4 ) {
4641 void Assembler::prefix(Address adr, XMMRegister reg) {
4642 if (reg->encoding() < 8) {
4790 void Assembler::bswapq(Register reg) {
4791 int encode = prefixq_and_encode(reg->encoding());
4855 void Assembler::cmpxchgq(Register reg, Address adr) {
4857 prefixq(adr, reg);
4860 emit_operand(reg, adr);
6336 int MacroAssembler::corrected_idivq(Register reg) {
6345 // reg: divisor (may not be eax/edx) -1
6347 // output: rax: quotient (= rax idiv reg) min_long
6348 // rdx: remainder (= rax irem reg) 0
6349 assert(reg != rax && reg != rdx, "reg cannot be rax or rdx register");
6358 cmpq(reg, -1);
6365 idivq(reg);
6373 void MacroAssembler::decrementq(Register reg, int value) {
6374 if (value == min_jint) { subq(reg, value); return; }
6375 if (value < 0) { incrementq(reg, -value); return; }
6377 if (value == 1 && UseIncDec) { decq(reg) ; return; }
6378 /* else */ { subq(reg, value) ; return; }
6389 void MacroAssembler::incrementq(Register reg, int value) {
6390 if (value == min_jint) { addq(reg, value); return; }
6391 if (value < 0) { decrementq(reg, -value); return; }
6393 if (value == 1 && UseIncDec) { incq(reg) ; return; }
6394 /* else */ { addq(reg, value) ; return; }
7302 void MacroAssembler::locked_cmpxchgptr(Register reg, AddressLiteral adr) {
7306 cmpxchgptr(reg, as_Address(adr));
7311 cmpxchgptr(reg, Address(rscratch1, 0));
7315 void MacroAssembler::cmpxchgptr(Register reg, Address adr) {
7316 LP64_ONLY(cmpxchgq(reg, adr)) NOT_LP64(cmpxchgl(reg, adr));
7346 int MacroAssembler::corrected_idivl(Register reg) {
7355 // reg: divisor (may not be rax,/rdx) -1
7357 // output: rax,: quotient (= rax, idiv reg) min_int
7358 // rdx: remainder (= rax, irem reg) 0
7359 assert(reg != rax && reg != rdx, "reg cannot be rax, or rdx register");
7367 cmpl(reg, -1);
7374 idivl(reg);
7384 void MacroAssembler::decrementl(Register reg, int value) {
7385 if (value == min_jint) {subl(reg, value) ; return; }
7386 if (value < 0) { incrementl(reg, -value); return; }
7388 if (value == 1 && UseIncDec) { decl(reg) ; return; }
7389 /* else */ { subl(reg, value) ; return; }
7400 void MacroAssembler::division_with_shift (Register reg, int shift_value) {
7403 testl (reg, reg);
7408 incrementl(reg);
7410 addl(reg, offset);
7414 sarl(reg, shift_value);
7879 void MacroAssembler::incrementl(Register reg, int value) {
7880 if (value == min_jint) {addl(reg, value) ; return; }
7881 if (value < 0) { decrementl(reg, -value); return; }
7883 if (value == 1 && UseIncDec) { incl(reg) ; return; }
7884 /* else */ { addl(reg, value) ; return; }
8208 void MacroAssembler::null_check(Register reg, int offset) {
8210 // provoke OS NULL exception if reg = NULL by
8211 // accessing M[reg] w/o changing any (non-CC) registers
8213 cmpptr(rax, Address(reg, 0));
8214 // Note: should probably use testl(rax, Address(reg, 0));
8218 // nothing to do, (later) access of M[reg + offset]
8219 // will provoke OS NULL exception if reg = NULL
8293 void MacroAssembler::round_to(Register reg, int modulus) {
8294 addptr(reg, modulus - 1);
8295 andptr(reg, -modulus);
8363 void MacroAssembler::sign_extend_byte(Register reg) {
8364 if (LP64_ONLY(true ||) (VM_Version::is_P6() && reg->has_byte_register())) {
8365 movsbl(reg, reg); // movsxb
8367 shll(reg, 24);
8368 sarl(reg, 24);
8372 void MacroAssembler::sign_extend_short(Register reg) {
8374 movswl(reg, reg); // movsxw
8376 shll(reg, 16);
8377 sarl(reg, 16);
9032 assert(t1->is_valid(), "need temp reg");
9531 #define IS_A_TEMP(reg) ((reg) == temp_reg || (reg) == temp2_reg)
9550 assert(sub_klass != rax, "killed reg"); // killed by mov(rax, super)
9551 assert(sub_klass != rcx, "killed reg"); // killed by lea(rcx, &pst_counter)
9650 void MacroAssembler::verify_oop(Register reg, const char* s) {
9658 ss.print("verify_oop: %s: %s", reg->name(), s);
9666 push(reg); // pass register argument