Lines Matching defs:reg
852 // st_off is LSW (i.e. reg.first())
1033 // stack to reg
1037 // reg to stack
1102 // A float arg may have to do float reg int reg conversion
1115 // reg to stack
1159 // reg to stack
1261 const Register reg = in_regs[i].first()->as_Register();
1265 __ movptr(Address(rsp, offset), reg);
1267 __ movptr(reg, Address(rsp, offset));
1276 __ movl(Address(rsp, offset), reg);
1278 __ movl(reg, Address(rsp, offset));
1354 const Register reg = in_regs[i].first()->as_Register();
1355 __ xorptr(reg, reg);
1378 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1388 if (reg.first()->is_stack()) {
1390 simple_move32(masm, reg, tmp);
1391 reg = tmp;
1393 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1395 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1651 const Register reg = in_regs[i].first()->as_Register();
1871 // guarantees that register layout will not match (and x86 doesn't use reg
1874 // All of our moved are reg->stack or stack->stack.