/*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*
*/
#include "precompiled.hpp"
#include "asm/assembler.hpp"
#include "c1/c1_Defs.hpp"
#include "c1/c1_MacroAssembler.hpp"
#include "c1/c1_Runtime1.hpp"
#include "interpreter/interpreter.hpp"
#include "nativeInst_x86.hpp"
#include "oops/compiledICHolderOop.hpp"
#include "oops/oop.inline.hpp"
#include "prims/jvmtiExport.hpp"
#include "register_x86.hpp"
#include "runtime/sharedRuntime.hpp"
#include "runtime/signature.hpp"
#include "runtime/vframeArray.hpp"
#include "vmreg_x86.inline.hpp"
// Implementation of StubAssembler
int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) {
// setup registers
const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different");
bool align_stack = false;
#ifdef _LP64
// At a method handle call, the stack may not be properly aligned
// when returning with an exception.
#endif
#ifdef _LP64
set_num_rt_args(0); // Nothing on stack
#else
// push java thread (becomes first argument of C function)
#endif // _LP64
int call_offset;
if (!align_stack) {
} else {
call_offset = offset();
}
// do the call
if (!align_stack) {
call_offset = offset();
}
// verify callee-saved register
#ifdef ASSERT
{ Label L;
int3();
stop("StubAssembler::call_RT: rdi not callee saved?");
bind(L);
}
#endif
// discard thread and arguments
// check for pending exceptions
{ Label L;
// exception pending => remove activation and forward to exception handler
// make sure that the vm_results are cleared
if (oop_result1->is_valid()) {
}
if (oop_result2->is_valid()) {
}
if (frame_size() == no_frame_size) {
leave();
} else {
}
bind(L);
}
// get oop results if there are any and reset the values in the thread
if (oop_result1->is_valid()) {
}
if (oop_result2->is_valid()) {
}
return call_offset;
}
int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) {
#ifdef _LP64
#else
#endif // _LP64
}
int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) {
#ifdef _LP64
} else {
}
} else {
}
#else
#endif // _LP64
}
int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) {
#ifdef _LP64
// if there is any conflict use the stack
} else {
}
#else
#endif // _LP64
}
// Implementation of StubFrame
private:
public:
~StubFrame();
};
}
// load parameters that were stored with LIR_Assembler::store_parameter
// Note: offsets for store_parameter and load_argument must match
// rbp, + 0: link
// + 1: return address
// + 2: argument with offset 0
// + 3: argument with offset 1
// + 4: ...
}
}
// Implementation of Runtime1
// call (this includes deoptimization)
// Note: note that users of this frame may well have arguments to some runtime
// while these values are on the stack. These positions neglect those arguments
// but the code in save_live_registers will take the argument count into
// account.
//
#ifdef _LP64
#define SLOT2(x) x,
#else
#define SLOT2(x)
#endif // _LP64
enum reg_save_layout {
// 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
// happen and will assert if the stack size we create is misaligned
#ifdef _LP64
#endif // _LP64
#ifdef _WIN64
// Windows always allocates space for it's argument registers (see
// frame::arg_reg_save_area_bytes).
#endif // _WIN64
// fpu_state_end_off is exclusive
#ifdef _LP64
#else
#endif // _LP64
};
// Save off registers which might be killed by calls into the runtime.
// Tries to smart of about FP registers. In particular we separate
// saving and describing the FPU registers for deoptimization since we
// have to save the FPU registers twice if we describe them and on P4
// saving FPU registers which don't contain anything appears
// expensive. The deopt blob is the only thing which needs to
// describe FPU registers. In all other cases it should be sufficient
// to simply save their current value.
bool save_fpu_registers = true) {
// In 64bit all the args are in regs so there are no additional stack slots
LP64_ONLY(num_rt_args = 0);
LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
// record saved value locations in an OopMap
// locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
#ifdef _LP64
// This is stupid but needed.
#endif // _LP64
if (save_fpu_registers) {
if (UseSSE < 2) {
for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
// %%% This is really a waste but we'll keep things as they were for now
if (true) {
}
fpu_off += 2;
}
}
if (UseSSE >= 2) {
for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
// %%% This is really a waste but we'll keep things as they were for now
if (true) {
}
xmm_off += 2;
}
} else if (UseSSE == 1) {
for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
xmm_off += 2;
}
}
}
return map;
}
bool save_fpu_registers = true) {
// assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
// assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
#ifdef ASSERT
#endif
if (save_fpu_registers) {
if (UseSSE < 2) {
// save FPU stack
#ifdef ASSERT
__ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
#endif
// Reset the control word to guard against exceptions being unmasked
// since fstp_d can cause FPU stack underflow exceptions. Write it
// into the on stack copy and then reload that to make sure that the
// current and future values are correct.
__ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
// Save the FPU registers in de-opt-able form
}
if (UseSSE >= 2) {
// save XMM registers
// XMM registers can contain float or double values, but this is not known here,
// so always save them as doubles.
// note that float values are _not_ converted automatically, so for float values
// the second word contains only garbage data.
#ifdef _LP64
#endif // _LP64
} else if (UseSSE == 1) {
// save XMM registers as float because double not supported without SSE2
}
}
// FPU stack must be empty now
}
if (restore_fpu_registers) {
if (UseSSE >= 2) {
// restore XMM registers
#ifdef _LP64
#endif // _LP64
} else if (UseSSE == 1) {
// restore XMM registers
}
if (UseSSE < 2) {
} else {
// check that FPU stack is really empty
}
} else {
// check that FPU stack is really empty
}
#ifdef ASSERT
{
}
#endif // ASSERT
}
}
static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
#ifdef _LP64
// skip rsp
#else
#endif // _LP64
}
// nothing to do
}
// target: the entry point of the method that creates and posts the exception oop
// has_argument: true if the exception needs an argument (passed on stack because registers must be preserved)
OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
// preserve all registers
// now all registers are saved and can be used freely
// verify that no old value is used accidentally
__ invalidate_registers(true, true, true, true, true, true);
// registers used by this stub
// load argument for exception that is passed as an argument into the stub
if (has_argument) {
#ifdef _LP64
#else
#endif // _LP64
}
return oop_maps;
}
// incoming parameters
// other registers used in this stub
// Save registers, if required.
switch (id) {
case forward_exception_id:
// We're handling an exception in the context of a compiled frame.
// The registers have been saved in the standard places. Perform
// an exception lookup in the caller and dispatch to the handler
// if found. Otherwise unwind and dispatch to the callers
// exception handler.
// load and clear pending exception oop into RAX
// load issuing PC (the return address for this stub) into rdx
// make sure that the vm_results are cleared (may be unnecessary)
break;
case handle_exception_id:
// At this point all registers MAY be live.
break;
case handle_exception_from_callee_id: {
// At this point all registers except exception oop (RAX) and
// exception pc (RDX) are dead.
const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord);
break;
}
default: ShouldNotReachHere();
}
#ifdef TIERED
// C2 can leave the fpu stack dirty
if (UseSSE < 2) {
}
#endif // TIERED
// verify that only rax, and rdx is valid at this time
__ invalidate_registers(false, true, true, false, true, true);
// verify that rax, contains a valid exception
// load address of JavaThread object for thread-local data
#ifdef ASSERT
// check that fields in JavaThread for exception oop and issuing pc are
// empty before writing to them
#endif
// save exception oop and issuing pc into JavaThread
// (exception handler will load it from here)
// patch throwing pc into return address (has bci & oop map)
// compute the exception handler.
// the exception oop and the throwing pc are read from the fields in JavaThread
// rax: handler address
// will be the deopt blob if nmethod was deoptimized while we looked up
// handler regardless of whether handler existed in the nmethod.
// only rax, is valid at this time, all other registers have been destroyed by the runtime call
__ invalidate_registers(false, true, true, true, true, true);
// patch the return address, this stub will directly return to the exception handler
switch (id) {
case forward_exception_id:
case handle_exception_id:
// Restore the registers that were saved at the beginning.
break;
// WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
// since we do a leave anyway.
// Pop the return address since we are possibly changing SP (restoring from BP).
// Restore SP from BP if the exception PC is a method handle call site.
break;
default: ShouldNotReachHere();
}
return oop_maps;
}
// incoming parameters
// callee-saved copy of exception_oop during runtime call
// other registers used in this stub
// verify that only rax, is valid at this time
__ invalidate_registers(false, true, true, true, true, true);
#ifdef ASSERT
// check that fields in JavaThread for exception oop and issuing pc are empty
#endif
// clear the FPU stack in case any FPU results are left behind
// save exception_oop in callee-saved register to preserve it during runtime calls
// Get return address (is on top of stack after leave).
// search the exception handler address of the caller (using the return address)
__ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
// rax: exception handler address of the caller
// Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
__ invalidate_registers(false, true, true, true, false, true);
// move result of call into correct register
// Restore exception oop to RAX (required convention of exception handler).
// verify that there is really a valid exception in rax
// get throwing pc (= return address).
// rdx has been destroyed by the call, so it must be set again
// the pop is also necessary to simulate the effect of a ret(0)
// Restore SP from BP if the exception PC is a method handle call site.
// continue at exception handler (return address removed)
// note: do *not* remove arguments when unwinding the
// activation since the caller assumes having
// all arguments on the stack when entering the
// runtime to determine the exception handler
// (GC happens at call site with arguments!)
// rax: exception oop
// rdx: throwing pc
// rbx: exception handler
}
// use the maximum number of runtime-arguments here because it is difficult to
// distinguish each RT-Call.
// Note: This number affects also the RT-Call in generate_handle_exception because
// the oop-map is shared for all calls.
#ifdef _LP64
// No need to worry about dummy
#else
// push java thread (becomes first argument of C function)
#endif // _LP64
// do the call
// verify callee-saved register
#ifdef ASSERT
{ Label L;
}
#endif
#ifndef _LP64
#endif // _LP64
// check for pending exceptions
{ Label L;
// exception pending => remove activation and forward to exception handler
// the deopt blob expects exceptions in the special fields of
// JavaThread, so copy and clear pending exception.
// load and clear pending exception
// check that there is really a valid exception
// load throwing pc: this is the return address of the stub
#ifdef ASSERT
// check that fields in JavaThread for exception oop and issuing pc are empty
#endif
// store exception oop and throwing pc to JavaThread
// Forward the exception directly to deopt blob. We can blow no
// registers and must leave throwing pc on the stack. A patch may
// have values live in registers so the entry point with the
// exception in tls.
}
// Runtime will return true if the nmethod has been deoptimized during
// the patching process. In that case we must do a deopt reexecute instead.
// Will reexecute. Proper return address is already on the stack we just restore
// registers, pop all of our frame but the return address and jump to the deopt blob
return oop_maps;
}
// for better readability
const bool must_gc_arguments = true;
const bool dont_gc_arguments = false;
// default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
bool save_fpu_registers = true;
// stub code & info for the different stubs
switch (id) {
case forward_exception_id:
{
}
break;
case new_instance_id:
case fast_new_instance_id:
{
if (id == new_instance_id) {
} else if (id == fast_new_instance_id) {
} else {
}
UseTLAB && FastTLABRefill) {
if (id == fast_new_instance_init_check_id) {
// make sure the klass is initialized
}
#ifdef ASSERT
// assert object can be fast path allocated
{
}
#endif // ASSERT
// if we got here then the TLAB allocation failed, so try
// refilling the TLAB or allocating directly from eden.
// get the instance size (size is postive so movl is fine for 64bit)
// get the instance size (size is postive so movl is fine for 64bit)
}
// rax,: new instance
}
break;
case counter_overflow_id:
{
// Retrieve bci
// And a pointer to the methodOop
int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
}
break;
case new_type_array_id:
case new_object_array_id:
{
if (id == new_type_array_id) {
} else {
}
#ifdef ASSERT
// assert object type is really an array of the proper kind
{
}
#endif // ASSERT
if (UseTLAB && FastTLABRefill) {
// check that array length is small enough for fast path.
// if we got here then the TLAB allocation failed, so try
// refilling the TLAB or allocating directly from eden.
// get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
// since size is positive movl does right thing on 64bit
// since size is postive movl does right thing on 64bit
__ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte)));
// get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
// since size is positive movl does right thing on 64bit
// since size is postive movl does right thing on 64bit
__ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte)));
}
int call_offset;
if (id == new_type_array_id) {
} else {
}
// rax,: new array
}
break;
case new_multi_array_id:
// rax,: klass
// rbx,: rank
// rcx: address of 1st dimension
int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
// rax,: new multi array
}
break;
case register_finalizer_id:
{
// This is called via call_runtime so the arguments
// will be place in C abi locations
#ifdef _LP64
#else
// The object is passed on the stack and we haven't pushed a
// frame yet so it's one work away from top of stack.
#endif // _LP64
// load the klass and check the has finalizer flag
// Now restore all the live registers
}
break;
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
}
break;
case throw_index_exception_id:
}
break;
case throw_div0_exception_id:
}
break;
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
}
break;
case handle_exception_id:
}
break;
}
break;
case unwind_exception_id:
// note: no stubframe since we are about to leave the current
// activation and we are calling a leaf VM function only.
}
break;
// tos + 0: link
// + 1: return address
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
}
break;
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
}
break;
oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
}
break;
case slow_subtype_check_id:
{
// Typical calling sequence:
// __ push(klass_RInfo); // object klass or other subclass
// __ push(sup_k_RInfo); // array element klass or other superclass
// __ call(slow_subtype_check);
// Note that the subclass is pushed first, and is therefore deepest.
// Previous versions of this code reversed the names 'sub' and 'super'.
// This was operationally harmless but made the code unreadable.
enum layout {
// saved_rbp_off, SLOT2(saved_rbpH_off)
};
// This is called by pushing args and not with C abi
// fallthrough on success:
}
break;
case monitorenter_nofpu_id:
save_fpu_registers = false;
// fall through
case monitorenter_id:
{
// Called with store_parameter and not C abi
}
break;
case monitorexit_nofpu_id:
save_fpu_registers = false;
// fall through
case monitorexit_id:
{
// Called with store_parameter and not C abi
// note: really a leaf routine but must setup last java sp
// => use call_RT for now (speed can be improved by
// doing last java sp setup manually)
}
break;
case deoptimize_id:
{
}
break;
case access_field_patching_id:
// we should set up register map
}
break;
case load_klass_patching_id:
// we should set up register map
}
break;
case dtrace_object_alloc_id:
{ // rax,: object
// we can't gc here so skip the oopmap but make sure that all
// the live registers get saved.
}
break;
case fpu2long_stub_id:
{
// rax, and rdx are destroyed, but should be free since the result is returned there
// preserve rsi,ecx
// check for NaN
// This gets the entire long in rax on 64bit
// testing of high bits
// What the heck is the point of the next instruction???
#ifdef _LP64
#else
#endif // _LP64
// return max_jlong
#ifndef _LP64
#else
#endif // _LP64
#ifndef _LP64
#else
#endif // _LP64
#ifndef _LP64
#else
#endif // _LP64
}
break;
#ifndef SERIALGC
case g1_pre_barrier_slow_id:
{
// arg0 : previous value of memory
break;
}
PtrQueue::byte_offset_of_index()));
PtrQueue::byte_offset_of_buf()));
// Can we store original value in the thread's buffer?
#ifdef _LP64
#else
#endif
#ifdef _LP64
#else
#endif
// prev_val (rax)
f.load_argument(0, pre_val);
#ifdef _LP64
# ifndef _WIN64
# endif
#endif
// load the pre-value
f.load_argument(0, rcx);
#ifdef _LP64
# ifndef _WIN64
# endif
#endif
}
break;
case g1_post_barrier_slow_id:
{
// arg0: store_address
// At this point we know new_value is non-NULL and the new_value crosses regsion.
// Must check to see if card is already dirty
PtrQueue::byte_offset_of_index()));
PtrQueue::byte_offset_of_buf()));
#ifdef _LP64
f.load_argument(0, card_addr);
// get the address of the card
#else
f.load_argument(0, card_index);
#endif
// storing region crossing non-NULL, card is clean.
// dirty card and log.
#ifdef _LP64
#else
#endif
#ifdef _LP64
# ifndef _WIN64
# endif
#endif
#ifdef _LP64
# ifndef _WIN64
# endif
#endif
}
break;
#endif // !SERIALGC
default:
}
break;
}
return oop_maps;
}
return "<unknown function>";
}