0N/A

1879N/A#include "precompiled.hpp"

1879N/A#include "c1/c1_Compilation.hpp"

1879N/A#include "c1/c1_FrameMap.hpp"

1879N/A#include "c1/c1_Instruction.hpp"

1879N/A#include "c1/c1_LIRAssembler.hpp"

1879N/A#include "c1/c1_LIRGenerator.hpp"

1879N/A#include "c1/c1_Runtime1.hpp"

1879N/A#include "c1/c1_ValueStack.hpp"

1879N/A#include "ci/ciArray.hpp"

1879N/A#include "ci/ciObjArrayKlass.hpp"

1879N/A#include "ci/ciTypeArrayKlass.hpp"

1879N/A#include "runtime/sharedRuntime.hpp"

1879N/A#include "runtime/stubRoutines.hpp"

1879N/A#include "vmreg_x86.inline.hpp"

0N/A

0N/A#ifdef ASSERT

0N/A#define __ gen()->lir(__FILE__, __LINE__)->

0N/A#else

0N/A#define __ gen()->lir()->

0N/A#endif

0N/A

0N/Avoid LIRItem::load_byte_item() {

0N/A load_item();

0N/A LIR_Opr res = result();

0N/A

0N/A if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {

0N/A // make sure that it is a byte register

0N/A assert(!value()->type()->is_float() && !value()->type()->is_double(),

0N/A "can't load floats in byte register");

0N/A LIR_Opr reg = _gen->rlock_byte(T_BYTE);

0N/A __ move(res, reg);

0N/A

0N/A _result = reg;

0N/A }

0N/A}

0N/A

0N/A

0N/Avoid LIRItem::load_nonconstant() {

0N/A LIR_Opr r = value()->operand();

0N/A if (r->is_constant()) {

0N/A _result = r;

0N/A } else {

0N/A load_item();

0N/A }

0N/A}

0N/A

0N/A

0N/A

0N/ALIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }

0N/ALIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }

0N/ALIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }

0N/ALIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }

0N/ALIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }

0N/ALIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }

0N/ALIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }

0N/ALIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }

0N/A

0N/A

0N/ALIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {

0N/A LIR_Opr opr;

0N/A switch (type->tag()) {

0N/A case intTag: opr = FrameMap::rax_opr; break;

0N/A case objectTag: opr = FrameMap::rax_oop_opr; break;

304N/A case longTag: opr = FrameMap::long0_opr; break;

0N/A case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;

0N/A case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;

0N/A

0N/A case addressTag:

0N/A default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;

0N/A }

0N/A

0N/A assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");

0N/A return opr;

0N/A}

0N/A

0N/A

0N/ALIR_Opr LIRGenerator::rlock_byte(BasicType type) {

0N/A LIR_Opr reg = new_register(T_INT);

0N/A set_vreg_flag(reg, LIRGenerator::byte_reg);

0N/A return reg;

0N/A}

0N/A

0N/A

0N/A

0N/A

0N/Abool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {

0N/A if (type == T_SHORT || type == T_CHAR) {

0N/A // there is no immediate move of word values in asembler_i486.?pp

0N/A return false;

0N/A }

0N/A Constant* c = v->as_Constant();

1739N/A if (c && c->state_before() == NULL) {

0N/A // constants of any type can be stored directly, except for

0N/A // unloaded object constants.

0N/A return true;

0N/A }

0N/A return false;

0N/A}

0N/A

0N/A

0N/Abool LIRGenerator::can_inline_as_constant(Value v) const {

304N/A if (v->type()->tag() == longTag) return false;

0N/A return v->type()->tag() != objectTag ||

0N/A (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());

0N/A}

0N/A

0N/A

0N/Abool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {

304N/A if (c->type() == T_LONG) return false;

0N/A return c->type() != T_OBJECT || c->as_jobject() == NULL;

0N/A}

0N/A

0N/A

0N/ALIR_Opr LIRGenerator::safepoint_poll_register() {

0N/A return LIR_OprFact::illegalOpr;

0N/A}

0N/A

0N/A

0N/ALIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,

0N/A int shift, int disp, BasicType type) {

0N/A assert(base->is_register(), "must be");

0N/A if (index->is_constant()) {

0N/A return new LIR_Address(base,

0N/A (index->as_constant_ptr()->as_jint() << shift) + disp,

0N/A type);

0N/A } else {

0N/A return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);

0N/A }

0N/A}

0N/A

0N/A

0N/ALIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,

0N/A BasicType type, bool needs_card_mark) {

0N/A int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);

0N/A

0N/A LIR_Address* addr;

0N/A if (index_opr->is_constant()) {

29N/A int elem_size = type2aelembytes(type);

0N/A addr = new LIR_Address(array_opr,

0N/A offset_in_bytes + index_opr->as_jint() * elem_size, type);

0N/A } else {

304N/A#ifdef _LP64

304N/A if (index_opr->type() == T_INT) {

304N/A LIR_Opr tmp = new_register(T_LONG);

304N/A __ convert(Bytecodes::_i2l, index_opr, tmp);

304N/A index_opr = tmp;

304N/A }

304N/A#endif // _LP64

0N/A addr = new LIR_Address(array_opr,

0N/A index_opr,

0N/A LIR_Address::scale(type),

0N/A offset_in_bytes, type);

0N/A }

0N/A if (needs_card_mark) {

0N/A // This store will need a precise card mark, so go ahead and

0N/A // compute the full adddres instead of computing once for the

0N/A // store and again for the card mark.

304N/A LIR_Opr tmp = new_pointer_register();

0N/A __ leal(LIR_OprFact::address(addr), tmp);

1492N/A return new LIR_Address(tmp, type);

0N/A } else {

0N/A return addr;

0N/A }

0N/A}

0N/A

0N/A

1703N/ALIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {

1703N/A LIR_Opr r;

1703N/A if (type == T_LONG) {

1703N/A r = LIR_OprFact::longConst(x);

1703N/A } else if (type == T_INT) {

1703N/A r = LIR_OprFact::intConst(x);

1703N/A } else {

1703N/A ShouldNotReachHere();

1703N/A }

1703N/A return r;

1703N/A}

1703N/A

1703N/Avoid LIRGenerator::increment_counter(address counter, BasicType type, int step) {

304N/A LIR_Opr pointer = new_pointer_register();

304N/A __ move(LIR_OprFact::intptrConst(counter), pointer);

1703N/A LIR_Address* addr = new LIR_Address(pointer, type);

0N/A increment_counter(addr, step);

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::increment_counter(LIR_Address* addr, int step) {

0N/A __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);

0N/A}

0N/A

0N/Avoid LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {

0N/A __ cmp_mem_int(condition, base, disp, c, info);

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {

0N/A __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {

0N/A __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);

0N/A}

0N/A

0N/A

0N/Abool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {

0N/A if (tmp->is_valid()) {

0N/A if (is_power_of_2(c + 1)) {

0N/A __ move(left, tmp);

0N/A __ shift_left(left, log2_intptr(c + 1), left);

0N/A __ sub(left, tmp, result);

0N/A return true;

0N/A } else if (is_power_of_2(c - 1)) {

0N/A __ move(left, tmp);

0N/A __ shift_left(left, log2_intptr(c - 1), left);

0N/A __ add(left, tmp, result);

0N/A return true;

0N/A }

0N/A }

0N/A return false;

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {

0N/A BasicType type = item->type();

0N/A __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));

0N/A}

0N/A

0N/A

0N/A

0N/Avoid LIRGenerator::do_StoreIndexed(StoreIndexed* x) {

1739N/A assert(x->is_pinned(),"");

0N/A bool needs_range_check = true;

0N/A bool use_length = x->length() != NULL;

0N/A bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;

0N/A bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||

2793N/A !get_jobject_constant(x->value())->is_null_object() ||

2793N/A x->should_profile());

0N/A

0N/A LIRItem array(x->array(), this);

0N/A LIRItem index(x->index(), this);

0N/A LIRItem value(x->value(), this);

0N/A LIRItem length(this);

0N/A

0N/A array.load_item();

0N/A index.load_nonconstant();

0N/A

0N/A if (use_length) {

0N/A needs_range_check = x->compute_needs_range_check();

0N/A if (needs_range_check) {

0N/A length.set_instruction(x->length());

0N/A length.load_item();

0N/A }

0N/A }

0N/A if (needs_store_check) {

0N/A value.load_item();

0N/A } else {

0N/A value.load_for_store(x->elt_type());

0N/A }

0N/A

0N/A set_no_result(x);

0N/A

0N/A // the CodeEmitInfo must be duplicated for each different

0N/A // LIR-instruction because spilling can occur anywhere between two

0N/A // instructions and so the debug information must be different

0N/A CodeEmitInfo* range_check_info = state_for(x);

0N/A CodeEmitInfo* null_check_info = NULL;

0N/A if (x->needs_null_check()) {

0N/A null_check_info = new CodeEmitInfo(range_check_info);

0N/A }

0N/A

0N/A // emit array address setup early so it schedules better

0N/A LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);

0N/A

0N/A if (GenerateRangeChecks && needs_range_check) {

0N/A if (use_length) {

0N/A __ cmp(lir_cond_belowEqual, length.result(), index.result());

0N/A __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));

0N/A } else {

0N/A array_range_check(array.result(), index.result(), null_check_info, range_check_info);

0N/A // range_check also does the null check

0N/A null_check_info = NULL;

0N/A }

0N/A }

0N/A

0N/A if (GenerateArrayStoreCheck && needs_store_check) {

0N/A LIR_Opr tmp1 = new_register(objectType);

0N/A LIR_Opr tmp2 = new_register(objectType);

0N/A LIR_Opr tmp3 = new_register(objectType);

0N/A

0N/A CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);

2793N/A __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());

0N/A }

0N/A

0N/A if (obj_store) {

342N/A // Needs GC write barriers.

2346N/A pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,

2346N/A true /* do_load */, false /* patch */, NULL);

0N/A __ move(value.result(), array_addr, null_check_info);

0N/A // Seems to be a precise

0N/A post_barrier(LIR_OprFact::address(array_addr), value.result());

0N/A } else {

0N/A __ move(value.result(), array_addr, null_check_info);

0N/A }

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_MonitorEnter(MonitorEnter* x) {

1739N/A assert(x->is_pinned(),"");

0N/A LIRItem obj(x->obj(), this);

0N/A obj.load_item();

0N/A

0N/A set_no_result(x);

0N/A

0N/A // "lock" stores the address of the monitor stack slot, so this is not an oop

0N/A LIR_Opr lock = new_register(T_INT);

0N/A // Need a scratch register for biased locking on x86

0N/A LIR_Opr scratch = LIR_OprFact::illegalOpr;

0N/A if (UseBiasedLocking) {

0N/A scratch = new_register(T_INT);

0N/A }

0N/A

0N/A CodeEmitInfo* info_for_exception = NULL;

0N/A if (x->needs_null_check()) {

1739N/A info_for_exception = state_for(x);

0N/A }

0N/A // this CodeEmitInfo must not have the xhandlers because here the

0N/A // object is already locked (xhandlers expect object to be unlocked)

0N/A CodeEmitInfo* info = state_for(x, x->state(), true);

0N/A monitor_enter(obj.result(), lock, syncTempOpr(), scratch,

0N/A x->monitor_no(), info_for_exception, info);

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_MonitorExit(MonitorExit* x) {

1739N/A assert(x->is_pinned(),"");

0N/A

0N/A LIRItem obj(x->obj(), this);

0N/A obj.dont_load_item();

0N/A

0N/A LIR_Opr lock = new_register(T_INT);

0N/A LIR_Opr obj_temp = new_register(T_INT);

0N/A set_no_result(x);

1601N/A monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_NegateOp(NegateOp* x) {

0N/A LIRItem value(x->x(), this);

0N/A value.set_destroys_register();

0N/A value.load_item();

0N/A LIR_Opr reg = rlock(x);

0N/A __ negate(value.result(), reg);

0N/A

0N/A set_result(x, round_item(reg));

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {

0N/A LIRItem left(x->x(), this);

0N/A LIRItem right(x->y(), this);

0N/A LIRItem* left_arg = &left;

0N/A LIRItem* right_arg = &right;

0N/A assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");

0N/A bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);

0N/A if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {

0N/A left.load_item();

0N/A } else {

0N/A left.dont_load_item();

0N/A }

0N/A

0N/A // do not load right operand if it is a constant. only 0 and 1 are

0N/A // loaded because there are special instructions for loading them

0N/A // without memory access (not needed for SSE2 instructions)

0N/A bool must_load_right = false;

0N/A if (right.is_constant()) {

0N/A LIR_Const* c = right.result()->as_constant_ptr();

0N/A assert(c != NULL, "invalid constant");

0N/A assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");

0N/A

0N/A if (c->type() == T_FLOAT) {

0N/A must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());

0N/A } else {

0N/A must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());

0N/A }

0N/A }

0N/A

0N/A if (must_load_both) {

0N/A // frem and drem destroy also right operand, so move it to a new register

0N/A right.set_destroys_register();

0N/A right.load_item();

0N/A } else if (right.is_register() || must_load_right) {

0N/A right.load_item();

0N/A } else {

0N/A right.dont_load_item();

0N/A }

0N/A LIR_Opr reg = rlock(x);

0N/A LIR_Opr tmp = LIR_OprFact::illegalOpr;

0N/A if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {

0N/A tmp = new_register(T_DOUBLE);

0N/A }

0N/A

0N/A if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {

0N/A // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots

0N/A LIR_Opr fpu0, fpu1;

0N/A if (x->op() == Bytecodes::_frem) {

0N/A fpu0 = LIR_OprFact::single_fpu(0);

0N/A fpu1 = LIR_OprFact::single_fpu(1);

0N/A } else {

0N/A fpu0 = LIR_OprFact::double_fpu(0);

0N/A fpu1 = LIR_OprFact::double_fpu(1);

0N/A }

0N/A __ move(right.result(), fpu1); // order of left and right operand is important!

0N/A __ move(left.result(), fpu0);

0N/A __ rem (fpu0, fpu1, fpu0);

0N/A __ move(fpu0, reg);

0N/A

0N/A } else {

0N/A arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);

0N/A }

0N/A

0N/A set_result(x, round_item(reg));

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {

0N/A if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {

0N/A // long division is implemented as a direct call into the runtime

0N/A LIRItem left(x->x(), this);

0N/A LIRItem right(x->y(), this);

0N/A

0N/A // the check for division by zero destroys the right operand

0N/A right.set_destroys_register();

0N/A

0N/A BasicTypeList signature(2);

0N/A signature.append(T_LONG);

0N/A signature.append(T_LONG);

0N/A CallingConvention* cc = frame_map()->c_calling_convention(&signature);

0N/A

0N/A // check for division by zero (destroys registers of right operand!)

0N/A CodeEmitInfo* info = state_for(x);

0N/A

0N/A const LIR_Opr result_reg = result_register_for(x->type());

0N/A left.load_item_force(cc->at(1));

0N/A right.load_item();

0N/A

0N/A __ move(right.result(), cc->at(0));

0N/A

0N/A __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));

0N/A __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));

0N/A

0N/A address entry;

0N/A switch (x->op()) {

0N/A case Bytecodes::_lrem:

0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);

0N/A break; // check if dividend is 0 is done elsewhere

0N/A case Bytecodes::_ldiv:

0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);

0N/A break; // check if dividend is 0 is done elsewhere

0N/A case Bytecodes::_lmul:

0N/A entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);

0N/A break;

0N/A default:

0N/A ShouldNotReachHere();

0N/A }

0N/A

0N/A LIR_Opr result = rlock_result(x);

0N/A __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());

0N/A __ move(result_reg, result);

0N/A } else if (x->op() == Bytecodes::_lmul) {

0N/A // missing test if instr is commutative and if we should swap

0N/A LIRItem left(x->x(), this);

0N/A LIRItem right(x->y(), this);

0N/A

0N/A // right register is destroyed by the long mul, so it must be

0N/A // copied to a new register.

0N/A right.set_destroys_register();

0N/A

0N/A left.load_item();

0N/A right.load_item();

0N/A

304N/A LIR_Opr reg = FrameMap::long0_opr;

0N/A arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);

0N/A LIR_Opr result = rlock_result(x);

0N/A __ move(reg, result);

0N/A } else {

0N/A // missing test if instr is commutative and if we should swap

0N/A LIRItem left(x->x(), this);

0N/A LIRItem right(x->y(), this);

0N/A

0N/A left.load_item();

605N/A // don't load constants to save register

0N/A right.load_nonconstant();

0N/A rlock_result(x);

0N/A arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);

0N/A }

0N/A}

0N/A

0N/A

0N/A

0N/Avoid LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {

0N/A if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {

0N/A // The requirements for division and modulo

0N/A // input : rax,: dividend min_int

0N/A // reg: divisor (may not be rax,/rdx) -1

0N/A //

0N/A // output: rax,: quotient (= rax, idiv reg) min_int

0N/A // rdx: remainder (= rax, irem reg) 0

0N/A

0N/A // rax, and rdx will be destroyed

0N/A

0N/A // Note: does this invalidate the spec ???

0N/A LIRItem right(x->y(), this);

0N/A LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid

0N/A

0N/A // call state_for before load_item_force because state_for may

0N/A // force the evaluation of other instructions that are needed for

0N/A // correct debug info. Otherwise the live range of the fix

0N/A // register might be too long.

0N/A CodeEmitInfo* info = state_for(x);

0N/A

0N/A left.load_item_force(divInOpr());

0N/A

0N/A right.load_item();

0N/A

0N/A LIR_Opr result = rlock_result(x);

0N/A LIR_Opr result_reg;

0N/A if (x->op() == Bytecodes::_idiv) {

0N/A result_reg = divOutOpr();

0N/A } else {

0N/A result_reg = remOutOpr();

0N/A }

0N/A

0N/A if (!ImplicitDiv0Checks) {

0N/A __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));

0N/A __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));

0N/A }

0N/A LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation

0N/A if (x->op() == Bytecodes::_irem) {

0N/A __ irem(left.result(), right.result(), result_reg, tmp, info);

0N/A } else if (x->op() == Bytecodes::_idiv) {

0N/A __ idiv(left.result(), right.result(), result_reg, tmp, info);

0N/A } else {

0N/A ShouldNotReachHere();

0N/A }

0N/A

0N/A __ move(result_reg, result);

0N/A } else {

0N/A // missing test if instr is commutative and if we should swap

0N/A LIRItem left(x->x(), this);

0N/A LIRItem right(x->y(), this);

0N/A LIRItem* left_arg = &left;

0N/A LIRItem* right_arg = &right;

0N/A if (x->is_commutative() && left.is_stack() && right.is_register()) {

0N/A // swap them if left is real stack (or cached) and right is real register(not cached)

0N/A left_arg = &right;

0N/A right_arg = &left;

0N/A }

0N/A

0N/A left_arg->load_item();

0N/A

0N/A // do not need to load right, as we can handle stack and constants

0N/A if (x->op() == Bytecodes::_imul ) {

0N/A // check if we can use shift instead

0N/A bool use_constant = false;

0N/A bool use_tmp = false;

0N/A if (right_arg->is_constant()) {

0N/A int iconst = right_arg->get_jint_constant();

0N/A if (iconst > 0) {

0N/A if (is_power_of_2(iconst)) {

0N/A use_constant = true;

0N/A } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {

0N/A use_constant = true;

0N/A use_tmp = true;

0N/A }

0N/A }

0N/A }

0N/A if (use_constant) {

0N/A right_arg->dont_load_item();

0N/A } else {

0N/A right_arg->load_item();

0N/A }

0N/A LIR_Opr tmp = LIR_OprFact::illegalOpr;

0N/A if (use_tmp) {

0N/A tmp = new_register(T_INT);

0N/A }

0N/A rlock_result(x);

0N/A

0N/A arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);

0N/A } else {

0N/A right_arg->dont_load_item();

0N/A rlock_result(x);

0N/A LIR_Opr tmp = LIR_OprFact::illegalOpr;

0N/A arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);

0N/A }

0N/A }

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {

0N/A // when an operand with use count 1 is the left operand, then it is

0N/A // likely that no move for 2-operand-LIR-form is necessary

0N/A if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {

0N/A x->swap_operands();

0N/A }

0N/A

0N/A ValueTag tag = x->type()->tag();

0N/A assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");

0N/A switch (tag) {

0N/A case floatTag:

0N/A case doubleTag: do_ArithmeticOp_FPU(x); return;

0N/A case longTag: do_ArithmeticOp_Long(x); return;

0N/A case intTag: do_ArithmeticOp_Int(x); return;

0N/A }

0N/A ShouldNotReachHere();

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_ShiftOp(ShiftOp* x) {

0N/A // count must always be in rcx

0N/A LIRItem value(x->x(), this);

0N/A LIRItem count(x->y(), this);

0N/A

0N/A ValueTag elemType = x->type()->tag();

0N/A bool must_load_count = !count.is_constant() || elemType == longTag;

0N/A if (must_load_count) {

0N/A // count for long must be in register

0N/A count.load_item_force(shiftCountOpr());

0N/A } else {

0N/A count.dont_load_item();

0N/A }

0N/A value.load_item();

0N/A LIR_Opr reg = rlock_result(x);

0N/A

0N/A shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_LogicOp(LogicOp* x) {

0N/A // when an operand with use count 1 is the left operand, then it is

0N/A // likely that no move for 2-operand-LIR-form is necessary

0N/A if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {

0N/A x->swap_operands();

0N/A }

0N/A

0N/A LIRItem left(x->x(), this);

0N/A LIRItem right(x->y(), this);

0N/A

0N/A left.load_item();

0N/A right.load_nonconstant();

0N/A LIR_Opr reg = rlock_result(x);

0N/A

0N/A logic_op(x->op(), reg, left.result(), right.result());

0N/A}

0N/A

0N/A

0N/A

0N/Avoid LIRGenerator::do_CompareOp(CompareOp* x) {

0N/A LIRItem left(x->x(), this);

0N/A LIRItem right(x->y(), this);

0N/A ValueTag tag = x->x()->type()->tag();

0N/A if (tag == longTag) {

0N/A left.set_destroys_register();

0N/A }

0N/A left.load_item();

0N/A right.load_item();

0N/A LIR_Opr reg = rlock_result(x);

0N/A

0N/A if (x->x()->type()->is_float_kind()) {

0N/A Bytecodes::Code code = x->op();

0N/A __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));

0N/A } else if (x->x()->type()->tag() == longTag) {

0N/A __ lcmp2int(left.result(), right.result(), reg);

0N/A } else {

0N/A Unimplemented();

0N/A }

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {

0N/A assert(x->number_of_arguments() == 4, "wrong type");

0N/A LIRItem obj (x->argument_at(0), this); // object

0N/A LIRItem offset(x->argument_at(1), this); // offset of field

0N/A LIRItem cmp (x->argument_at(2), this); // value to compare with field

0N/A LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp

0N/A

0N/A assert(obj.type()->tag() == objectTag, "invalid type");

304N/A

304N/A // In 64bit the type can be long, sparc doesn't have this assert

304N/A // assert(offset.type()->tag() == intTag, "invalid type");

304N/A

0N/A assert(cmp.type()->tag() == type->tag(), "invalid type");

0N/A assert(val.type()->tag() == type->tag(), "invalid type");

0N/A

0N/A // get address of field

0N/A obj.load_item();

0N/A offset.load_nonconstant();

0N/A

0N/A if (type == objectType) {

0N/A cmp.load_item_force(FrameMap::rax_oop_opr);

0N/A val.load_item();

0N/A } else if (type == intType) {

0N/A cmp.load_item_force(FrameMap::rax_opr);

0N/A val.load_item();

0N/A } else if (type == longType) {

304N/A cmp.load_item_force(FrameMap::long0_opr);

304N/A val.load_item_force(FrameMap::long1_opr);

0N/A } else {

0N/A ShouldNotReachHere();

0N/A }

0N/A

1793N/A LIR_Opr addr = new_pointer_register();

1060N/A LIR_Address* a;

1060N/A if(offset.result()->is_constant()) {

4015N/A#ifdef _LP64

4015N/A jlong c = offset.result()->as_jlong();

4015N/A if ((jlong)((jint)c) == c) {

4015N/A a = new LIR_Address(obj.result(),

4015N/A (jint)c,

4015N/A as_BasicType(type));

4015N/A } else {

4015N/A LIR_Opr tmp = new_register(T_LONG);

4015N/A __ move(offset.result(), tmp);

4015N/A a = new LIR_Address(obj.result(),

4015N/A tmp,

4015N/A as_BasicType(type));

4015N/A }

4015N/A#else

1060N/A a = new LIR_Address(obj.result(),

4015N/A offset.result()->as_jint(),

1060N/A as_BasicType(type));

4015N/A#endif

1060N/A } else {

1060N/A a = new LIR_Address(obj.result(),

1060N/A offset.result(),

1060N/A LIR_Address::times_1,

1060N/A 0,

1060N/A as_BasicType(type));

1060N/A }

1060N/A __ leal(LIR_OprFact::address(a), addr);

0N/A

342N/A if (type == objectType) { // Write-barrier needed for Object fields.

342N/A // Do the pre-write barrier, if any.

2346N/A pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,

2346N/A true /* do_load */, false /* patch */, NULL);

342N/A }

0N/A

0N/A LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience

0N/A if (type == objectType)

0N/A __ cas_obj(addr, cmp.result(), val.result(), ill, ill);

0N/A else if (type == intType)

0N/A __ cas_int(addr, cmp.result(), val.result(), ill, ill);

0N/A else if (type == longType)

0N/A __ cas_long(addr, cmp.result(), val.result(), ill, ill);

0N/A else {

0N/A ShouldNotReachHere();

0N/A }

0N/A

0N/A // generate conditional move of boolean result

0N/A LIR_Opr result = rlock_result(x);

1977N/A __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),

1977N/A result, as_BasicType(type));

0N/A if (type == objectType) { // Write-barrier needed for Object fields.

0N/A // Seems to be precise

0N/A post_barrier(addr, val.result());

0N/A }

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_MathIntrinsic(Intrinsic* x) {

3752N/A assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");

0N/A LIRItem value(x->argument_at(0), this);

0N/A

0N/A bool use_fpu = false;

0N/A if (UseSSE >= 2) {

0N/A switch(x->id()) {

0N/A case vmIntrinsics::_dsin:

0N/A case vmIntrinsics::_dcos:

0N/A case vmIntrinsics::_dtan:

0N/A case vmIntrinsics::_dlog:

0N/A case vmIntrinsics::_dlog10:

3752N/A case vmIntrinsics::_dexp:

3752N/A case vmIntrinsics::_dpow:

0N/A use_fpu = true;

0N/A }

0N/A } else {

0N/A value.set_destroys_register();

0N/A }

0N/A

0N/A value.load_item();

0N/A

0N/A LIR_Opr calc_input = value.result();

3752N/A LIR_Opr calc_input2 = NULL;

3752N/A if (x->id() == vmIntrinsics::_dpow) {

3752N/A LIRItem extra_arg(x->argument_at(1), this);

3752N/A if (UseSSE < 2) {

3752N/A extra_arg.set_destroys_register();

3752N/A }

3752N/A extra_arg.load_item();

3752N/A calc_input2 = extra_arg.result();

3752N/A }

0N/A LIR_Opr calc_result = rlock_result(x);

0N/A

3752N/A // sin, cos, pow and exp need two free fpu stack slots, so register

3752N/A // two temporary operands

0N/A LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0);

0N/A LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1);

0N/A

0N/A if (use_fpu) {

0N/A LIR_Opr tmp = FrameMap::fpu0_double_opr;

3752N/A int tmp_start = 1;

3752N/A if (calc_input2 != NULL) {

3752N/A __ move(calc_input2, tmp);

3752N/A tmp_start = 2;

3752N/A calc_input2 = tmp;

3752N/A }

0N/A __ move(calc_input, tmp);

0N/A

0N/A calc_input = tmp;

0N/A calc_result = tmp;

3752N/A

3752N/A tmp1 = FrameMap::caller_save_fpu_reg_at(tmp_start);

3752N/A tmp2 = FrameMap::caller_save_fpu_reg_at(tmp_start + 1);

0N/A }

0N/A

0N/A switch(x->id()) {

0N/A case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break;

0N/A case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;

0N/A case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break;

0N/A case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break;

0N/A case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break;

953N/A case vmIntrinsics::_dlog: __ log (calc_input, calc_result, tmp1); break;

953N/A case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1); break;

3752N/A case vmIntrinsics::_dexp: __ exp (calc_input, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break;

3752N/A case vmIntrinsics::_dpow: __ pow (calc_input, calc_input2, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break;

0N/A default: ShouldNotReachHere();

0N/A }

0N/A

0N/A if (use_fpu) {

0N/A __ move(calc_result, x->operand());

0N/A }

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_ArrayCopy(Intrinsic* x) {

0N/A assert(x->number_of_arguments() == 5, "wrong type");

1912N/A

1912N/A // Make all state_for calls early since they can emit code

1912N/A CodeEmitInfo* info = state_for(x, x->state());

1912N/A

0N/A LIRItem src(x->argument_at(0), this);

0N/A LIRItem src_pos(x->argument_at(1), this);

0N/A LIRItem dst(x->argument_at(2), this);

0N/A LIRItem dst_pos(x->argument_at(3), this);

0N/A LIRItem length(x->argument_at(4), this);

0N/A

0N/A // operands for arraycopy must use fixed registers, otherwise

0N/A // LinearScan will fail allocation (because arraycopy always needs a

0N/A // call)

304N/A

304N/A#ifndef _LP64

0N/A src.load_item_force (FrameMap::rcx_oop_opr);

0N/A src_pos.load_item_force (FrameMap::rdx_opr);

0N/A dst.load_item_force (FrameMap::rax_oop_opr);

0N/A dst_pos.load_item_force (FrameMap::rbx_opr);

0N/A length.load_item_force (FrameMap::rdi_opr);

0N/A LIR_Opr tmp = (FrameMap::rsi_opr);

304N/A#else

304N/A

304N/A // The java calling convention will give us enough registers

304N/A // so that on the stub side the args will be perfect already.

304N/A // On the other slow/special case side we call C and the arg

304N/A // positions are not similar enough to pick one as the best.

304N/A // Also because the java calling convention is a "shifted" version

304N/A // of the C convention we can process the java args trivially into C

304N/A // args without worry of overwriting during the xfer

304N/A

304N/A src.load_item_force (FrameMap::as_oop_opr(j_rarg0));

304N/A src_pos.load_item_force (FrameMap::as_opr(j_rarg1));

304N/A dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));

304N/A dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));

304N/A length.load_item_force (FrameMap::as_opr(j_rarg4));

304N/A

304N/A LIR_Opr tmp = FrameMap::as_opr(j_rarg5);

304N/A#endif // LP64

304N/A

0N/A set_no_result(x);

0N/A

0N/A int flags;

0N/A ciArrayKlass* expected_type;

0N/A arraycopy_helper(x, &flags, &expected_type);

0N/A

0N/A __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint

0N/A}

0N/A

0N/A

0N/ALIR_Opr fixed_register_for(BasicType type) {

0N/A switch (type) {

0N/A case T_FLOAT: return FrameMap::fpu0_float_opr;

0N/A case T_DOUBLE: return FrameMap::fpu0_double_opr;

0N/A case T_INT: return FrameMap::rax_opr;

304N/A case T_LONG: return FrameMap::long0_opr;

0N/A default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;

0N/A }

0N/A}

0N/A

0N/Avoid LIRGenerator::do_Convert(Convert* x) {

0N/A // flags that vary for the different operations and different SSE-settings

0N/A bool fixed_input, fixed_result, round_result, needs_stub;

0N/A

0N/A switch (x->op()) {

0N/A case Bytecodes::_i2l: // fall through

0N/A case Bytecodes::_l2i: // fall through

0N/A case Bytecodes::_i2b: // fall through

0N/A case Bytecodes::_i2c: // fall through

0N/A case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;

0N/A

0N/A case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;

0N/A case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;

0N/A case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;

0N/A case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;

0N/A case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;

0N/A case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;

0N/A case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;

0N/A case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;

0N/A case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;

0N/A case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;

0N/A default: ShouldNotReachHere();

0N/A }

0N/A

0N/A LIRItem value(x->value(), this);

0N/A value.load_item();

0N/A LIR_Opr input = value.result();

0N/A LIR_Opr result = rlock(x);

0N/A

0N/A // arguments of lir_convert

0N/A LIR_Opr conv_input = input;

0N/A LIR_Opr conv_result = result;

0N/A ConversionStub* stub = NULL;

0N/A

0N/A if (fixed_input) {

0N/A conv_input = fixed_register_for(input->type());

0N/A __ move(input, conv_input);

0N/A }

0N/A

0N/A assert(fixed_result == false || round_result == false, "cannot set both");

0N/A if (fixed_result) {

0N/A conv_result = fixed_register_for(result->type());

0N/A } else if (round_result) {

0N/A result = new_register(result->type());

0N/A set_vreg_flag(result, must_start_in_memory);

0N/A }

0N/A

0N/A if (needs_stub) {

0N/A stub = new ConversionStub(x->op(), conv_input, conv_result);

0N/A }

0N/A

0N/A __ convert(x->op(), conv_input, conv_result, stub);

0N/A

0N/A if (result != conv_result) {

0N/A __ move(conv_result, result);

0N/A }

0N/A

0N/A assert(result->is_virtual(), "result must be virtual register");

0N/A set_result(x, result);

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_NewInstance(NewInstance* x) {

1739N/A#ifndef PRODUCT

0N/A if (PrintNotLoaded && !x->klass()->is_loaded()) {

1739N/A tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());

0N/A }

1739N/A#endif

0N/A CodeEmitInfo* info = state_for(x, x->state());

0N/A LIR_Opr reg = result_register_for(x->type());

0N/A LIR_Opr klass_reg = new_register(objectType);

0N/A new_instance(reg, x->klass(),

0N/A FrameMap::rcx_oop_opr,

0N/A FrameMap::rdi_oop_opr,

0N/A FrameMap::rsi_oop_opr,

0N/A LIR_OprFact::illegalOpr,

0N/A FrameMap::rdx_oop_opr, info);

0N/A LIR_Opr result = rlock_result(x);

0N/A __ move(reg, result);

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_NewTypeArray(NewTypeArray* x) {

0N/A CodeEmitInfo* info = state_for(x, x->state());

0N/A

0N/A LIRItem length(x->length(), this);

0N/A length.load_item_force(FrameMap::rbx_opr);

0N/A

0N/A LIR_Opr reg = result_register_for(x->type());

0N/A LIR_Opr tmp1 = FrameMap::rcx_oop_opr;

0N/A LIR_Opr tmp2 = FrameMap::rsi_oop_opr;

0N/A LIR_Opr tmp3 = FrameMap::rdi_oop_opr;

0N/A LIR_Opr tmp4 = reg;

0N/A LIR_Opr klass_reg = FrameMap::rdx_oop_opr;

0N/A LIR_Opr len = length.result();

0N/A BasicType elem_type = x->elt_type();

0N/A

989N/A __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);

0N/A

0N/A CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);

0N/A __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);

0N/A

0N/A LIR_Opr result = rlock_result(x);

0N/A __ move(reg, result);

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_NewObjectArray(NewObjectArray* x) {

0N/A LIRItem length(x->length(), this);

0N/A // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction

0N/A // and therefore provide the state before the parameters have been consumed

0N/A CodeEmitInfo* patching_info = NULL;

0N/A if (!x->klass()->is_loaded() || PatchALot) {

0N/A patching_info = state_for(x, x->state_before());

0N/A }

0N/A

0N/A CodeEmitInfo* info = state_for(x, x->state());

0N/A

0N/A const LIR_Opr reg = result_register_for(x->type());

0N/A LIR_Opr tmp1 = FrameMap::rcx_oop_opr;

0N/A LIR_Opr tmp2 = FrameMap::rsi_oop_opr;

0N/A LIR_Opr tmp3 = FrameMap::rdi_oop_opr;

0N/A LIR_Opr tmp4 = reg;

0N/A LIR_Opr klass_reg = FrameMap::rdx_oop_opr;

0N/A

0N/A length.load_item_force(FrameMap::rbx_opr);

0N/A LIR_Opr len = length.result();

0N/A

0N/A CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);

0N/A ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass());

0N/A if (obj == ciEnv::unloaded_ciobjarrayklass()) {

0N/A BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");

0N/A }

0N/A jobject2reg_with_patching(klass_reg, obj, patching_info);

0N/A __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);

0N/A

0N/A LIR_Opr result = rlock_result(x);

0N/A __ move(reg, result);

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_NewMultiArray(NewMultiArray* x) {

0N/A Values* dims = x->dims();

0N/A int i = dims->length();

0N/A LIRItemList* items = new LIRItemList(dims->length(), NULL);

0N/A while (i-- > 0) {

0N/A LIRItem* size = new LIRItem(dims->at(i), this);

0N/A items->at_put(i, size);

0N/A }

0N/A

933N/A // Evaluate state_for early since it may emit code.

0N/A CodeEmitInfo* patching_info = NULL;

0N/A if (!x->klass()->is_loaded() || PatchALot) {

0N/A patching_info = state_for(x, x->state_before());

0N/A

3812N/A // Cannot re-use same xhandlers for multiple CodeEmitInfos, so

3812N/A // clone all handlers (NOTE: Usually this is handled transparently

3812N/A // by the CodeEmitInfo cloning logic in CodeStub constructors but

3812N/A // is done explicitly here because a stub isn't being used).

0N/A x->set_exception_handlers(new XHandlers(x->exception_handlers()));

0N/A }

0N/A CodeEmitInfo* info = state_for(x, x->state());

0N/A

0N/A i = dims->length();

0N/A while (i-- > 0) {

0N/A LIRItem* size = items->at(i);

0N/A size->load_nonconstant();

0N/A

0N/A store_stack_parameter(size->result(), in_ByteSize(i*4));

0N/A }

0N/A

0N/A LIR_Opr reg = result_register_for(x->type());

0N/A jobject2reg_with_patching(reg, x->klass(), patching_info);

0N/A

0N/A LIR_Opr rank = FrameMap::rbx_opr;

0N/A __ move(LIR_OprFact::intConst(x->rank()), rank);

0N/A LIR_Opr varargs = FrameMap::rcx_opr;

0N/A __ move(FrameMap::rsp_opr, varargs);

0N/A LIR_OprList* args = new LIR_OprList(3);

0N/A args->append(reg);

0N/A args->append(rank);

0N/A args->append(varargs);

0N/A __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),

0N/A LIR_OprFact::illegalOpr,

0N/A reg, args, info);

0N/A

0N/A LIR_Opr result = rlock_result(x);

0N/A __ move(reg, result);

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_BlockBegin(BlockBegin* x) {

0N/A // nothing to do for now

0N/A}

0N/A

0N/A

0N/Avoid LIRGenerator::do_CheckCast(CheckCast* x) {

0N/A LIRItem obj(x->obj(), this);

0N/A

0N/A CodeEmitInfo* patching_info = NULL;

0N/A if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {

0N/A // must do this before locking the destination register as an oop register,

0N/A // and before the obj is loaded (the latter is for deoptimization)

0N/A patching_info = state_for(x, x->state_before());

0N/A }

0N/A obj.load_item();

0N/A

0N/A // info for exceptions

1739N/A CodeEmitInfo* info_for_exception = state_for(x);

0N/A

0N/A CodeStub* stub;

0N/A if (x->is_incompatible_class_change_check()) {

0N/A assert(patching_info == NULL, "can't patch this");

0N/A stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);

0N/A } else {

0N/A stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);

0N/A }

0N/A LIR_Opr reg = rlock_result(x);

1909N/A LIR_Opr tmp3 = LIR_OprFact::illegalOpr;