VMM: host+guest xsave/xrstor state handling - not enabled.
Removed support for host CPUs without FXSAVE/FXRSTOR support.
VMM,REM: Allocate the FPU/SSE/AVX/FUTURE state stuff. We need to use pointers to substates anyway and this will make CPUMCPU much smaller.
CPUMCTX,CPUMHOST: Replaced the fpu (X86FXSAVE) member with an XState (X86XSAVEAREA) member.
re-enable EILVT handling by backing out r98856
VMMSwitcher: disable EILVT handing again to check if it makes any difference for the testbox
VMMSwitcher: no write completion required
VMMSwitcher: fixed code for disabling the Extended LVT APIC registers
VMMSwitcher: test code for disabling the Extended LVT APIC registers on newer AMD boxes
VMMSwitcher: fixed two typos which prevented proper handling of the local APIC in x2APIC mode for 64-bit guests on 32-bit hosts and raw mode on 32-bit hosts
VMMSwitcher: also mask NMI in APIC_REG_LVT_CMCI
traling spaces
VMM: Missed copyright header update in r95407.
VMM: Fix mixing 64-bit/32-bit FPU state in raw-mode.
GCC:/MSC: => gcc:/msc: like everywhere
VMM: X2APIC + NMI. Only tested on AMD64.
tstVMM: DRx fixes.
VMMSwitcher: typo
VMM: Debug register handling redo. (only partly tested on AMD-V so far.)
VMM: Fixed tstVMM (single stepping ++ in raw-mode code).
VMM: Switcher and TRPM fixes wrt hypervisor traps and tstVMM.
VMMSwitcher: Drop the unused assembly switcher functions taking guest or host contexts as arguments.
CPUM: Combined the visible and hidden selector register data into one structure. Preparing for lazily resolving+caching of hidden registers in raw-mode.
CPUMCTX++: Rearranging the CPUMCTX structure in preparation of some hidden selector register improvments.
AMD64andLegacy.mac: Avoid #GPing in world switcher code when restoring CR4.PCIDE.
Moved VBox/x86.h/mac to iprt/x86.h/mac.
VMMSwitcher/AMD64andLegacy.mac: superfluous instruction
VMM reorg: Moving the public include files from include/VBox to include/VBox/vmm.
VMM source reorg.
VMMSwitcher/AMD64andLegacy: restore the Local APIC NMI vectors _after_ we restored the host CS
VMM: mask all Local APIC interrupt vectors which are set up to NMI mode during world switch (raw mode only)
*: spelling fixes, thanks Timeless!
CPUM: Added /CPUM/PortableCpuIdLevel={0..3} for automatically stripping CPUID features that can cause trouble with teleportation and cold migration.
Automated rebranding to Oracle copyright/license strings via filemuncher
AMD64andLegacy.mac: CPUM.ulOffCPUMCPU is 32-bit.
AMD64AndLegacy.mac: fixed wrong save/restore of EDX in MSR_IA32_SYSENTER_CS restore sequence. (xchg got replaced by mov at some point in the past)
Fixed wrong check for sysenter.
Big step to separate VMM data structures for guest SMP. (pgm, em)
Load hypervisor CR3 from CPUM (instead of hardcoded fixups in the switchers). Dangerous change. Watch for regressions.
Corrected VBOX_WITH_HYBIRD_32BIT_KERNEL to VBOX_WITH_HYBRID_32BIT_KERNEL and moved it into src/VBox/VMM.
Switcher fixes
Safety precautions.
VMM: AMD64 -> 32bit switcher (for testing only).