Searched refs:membar (Results 1 - 25 of 26) sorted by relevance

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/openjdk7/jdk/src/solaris/native/sun/awt/medialib/
H A D	mlib_v_ImageCopy_blk.s	123 #define MEMBAR_BEFORE_BLD membar #StoreLoad 124 #define MEMBAR_AFTER_BLD membar #StoreLoad
/openjdk7/hotspot/src/os_cpu/linux_sparc/vm/
H A D	linux_sparc.s	61 # -- membar
/openjdk7/hotspot/src/os_cpu/solaris_sparc/vm/
H A D	solaris_sparc.s	66 !! -- membar
/openjdk7/hotspot/src/share/vm/opto/
H A D	macro.cpp	1601 // who thinks he sees a real use of the address by the membar.) 1942 // Note: The membar's associated with the lock/unlock are currently not 1998 MemBarNode* membar = fallthroughproj->unique_ctrl_out()->as_MemBar(); local 1999 assert(membar != NULL && membar->Opcode() == Op_MemBarAcquireLock, ""); 2000 Node* ctrlproj = membar->proj_out(TypeFunc::Control); 2001 Node* memproj = membar->proj_out(TypeFunc::Memory); 2017 MemBarNode* membar = ctrl->in(0)->as_MemBar(); local 2018 assert(membar->Opcode() == Op_MemBarReleaseLock && 2019 mem->is_Proj() && membar [all...]
H A D	graphKit.cpp	2808 // The membar serves as a pinch point between both control and all memory slices. 2813 Node* membar = _gvn.transform(mb); local 2814 set_control(_gvn.transform(new (C) ProjNode(membar, TypeFunc::Control))); 2815 set_all_memory_call(membar); 2816 return membar; 2821 // The membar serves as a pinch point between both control and memory(alias_idx). 2827 // The first membar is on the same memory slice as the field store opcode. 2828 // This forces the membar to follow the store. (Bug 6500685 broke this.) 2831 // on the first membar. This prevents later volatile loads or stores 2842 Node* membar local [all...]
/openjdk7/hotspot/src/share/vm/c1/
H A D	c1_LIRAssembler.hpp	241 void membar();
H A D	c1_LIRAssembler.cpp	658 membar();
H A D	c1_LIRGenerator.cpp	1760 __ membar(); 2338 if (x->is_volatile() && os::is_MP()) __ membar(); 3210 case lir_membar : __ membar(); break;
H A D	c1_LIR.hpp	1956 void membar() { append(new LIR_Op0(lir_membar)); } function in class:LIR_List
/openjdk7/hotspot/src/cpu/sparc/vm/
H A D	assembler_sparc.cpp	389 membar( Membar_mask_bits(StoreStore | LoadStore | StoreLoad | LoadLoad | Sync | MemIssue | Lookaside ) ); 390 membar( StoreStore ); 391 membar( LoadStore ); 392 membar( StoreLoad ); 393 membar( LoadLoad ); 394 membar( Sync ); 395 membar( MemIssue ); 396 membar( Lookaside ); 744 // Write serialization page so VM thread can do a pseudo remote membar 2769 membar(Assemble [all...]
H A D	assembler_sparc.inline.hpp	842 // returns if membar generates anything, obviously this code should mirror 843 // membar below. 855 inline void MacroAssembler::membar( Membar_mask_bits const7a ) { function in class:MacroAssembler 867 Assembler::membar( effective_mask ); 870 // stbar is the closest there is on v8. Equivalent to membar(StoreStore). We 874 // appear to be an equivalent of membar(StoreLoad) on v8: TSO doesn't require it,
H A D	c1_LIRAssembler_sparc.cpp	3246 void LIR_Assembler::membar() { function in class:LIR_Assembler 3248 __ membar( Assembler::Membar_mask_bits(Assembler::StoreLoad) ); 3261 //__ membar(Assembler::Membar_mask_bits(Assembler::loadload)); 3266 //__ membar(Assembler::Membar_mask_bits(Assembler::storestore)); 3271 //__ membar(Assembler::Membar_mask_bits(Assembler::loadstore)); 3275 __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
H A D	templateInterpreter_sparc.cpp	1099 __ membar(Assembler::StoreLoad); 1101 // Write serialization page so VM thread can do a pseudo remote membar.
H A D	stubGenerator_sparc.cpp	808 __ membar(Assembler::StoreStore); 1146 // Use BIS copy only for big arrays since it requires membar. 1177 // BIS needs membar. 1178 __ membar(Assembler::StoreLoad);
H A D	assembler_sparc.hpp	1530 void membar( Membar_mask_bits const7a ) { v9_only(); emit_long( op(arith_op) | op3(membar_op3) | rs1(O7) | immed(true) | u_field( int(const7a), 6, 0)); } function in class:Assembler 2115 // membar psuedo instruction. takes into account target memory model. 2116 inline void membar( Assembler::Membar_mask_bits const7a ); 2118 // returns if membar generates anything.
H A D	sharedRuntime_sparc.cpp	2549 __ membar(Assembler::StoreLoad); 2551 // Write serialization page so VM thread can do a pseudo remote membar.
/openjdk7/hotspot/src/cpu/x86/vm/
H A D	c1_LIRAssembler_x86.cpp	3723 void LIR_Assembler::membar() { function in class:LIR_Assembler 3725 __ membar( Assembler::Membar_mask_bits(Assembler::StoreLoad)); 3740 //__ membar(Assembler::Membar_mask_bits(Assembler::loadload)); 3745 //__ membar(Assembler::Membar_mask_bits(Assembler::storestore)); 3750 //__ membar(Assembler::Membar_mask_bits(Assembler::loadstore)); 3754 __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
H A D	templateInterpreter_x86_32.cpp	1118 __ membar(Assembler::Membar_mask_bits( 1122 // Write serialization page so VM thread can do a pseudo remote membar.
H A D	templateInterpreter_x86_64.cpp	1102 __ membar(Assembler::Membar_mask_bits( 1106 // Write serialization page so VM thread can do a pseudo remote membar.
H A D	assembler_x86.hpp	1247 void membar(Membar_mask_bits order_constraint) { function in class:Assembler
H A D	sharedRuntime_x86_32.cpp	2112 __ membar(Assembler::Membar_mask_bits( 2116 // Write serialization page so VM thread can do a pseudo remote membar.
H A D	sharedRuntime_x86_64.cpp	2368 __ membar(Assembler::Membar_mask_bits( 2372 // Write serialization page so VM thread can do a pseudo remote membar.
H A D	stubGenerator_x86_64.cpp	686 __ membar(Assembler::StoreLoad);
H A D	templateTable_x86_32.cpp	2079 __ membar(order_constraint);
H A D	templateTable_x86_64.cpp	2120 __ membar(order_constraint); 2898 // __ membar(Assembler::LoadLoad); 2942 // __ membar(Assembler::LoadLoad);

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Indexes created Tue Jul 24 14:28:13 CEST 2018