Searched defs:reg (Results 326 - 341 of 341) sorted by relevance

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/illumos-gate/usr/src/uts/i86pc/os/
H A Dcpuid.c4229 /* reg */
4231 "reg", cpu_id);
4676 uint64_t reg; local
4679 reg = rdmsr(MSR_AMD_INT_PENDING_CMP_HALT);
4681 if ((reg >> AMD_ACTONCMPHALT_SHIFT) &
4683 reg &= ~(AMD_ACTONCMPHALT_MASK <<
4685 wrmsr(MSR_AMD_INT_PENDING_CMP_HALT, reg);
/illumos-gate/usr/src/uts/common/io/iwn/
H A Dif_iwn.c416 iwn_read(struct iwn_softc *sc, int reg) argument
419 return (ddi_get32(sc->sc_regh, (uint32_t *)(sc->sc_base + reg)));
423 iwn_write(struct iwn_softc *sc, int reg, uint32_t val) argument
426 ddi_put32(sc->sc_regh, (uint32_t *)(sc->sc_base + reg), val);
430 iwn_write_1(struct iwn_softc *sc, int reg, uint8_t val) argument
432 ddi_put8(sc->sc_regh, (uint8_t *)(sc->sc_base + reg), val);
774 uint32_t reg; local
841 reg = pci_config_get8(sc->sc_pcih, 0x41);
842 if (reg)
5312 uint32_t reg; local
7097 uint32_t reg; local
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/illumos-gate/usr/src/uts/common/io/usbgem/
H A Dusbgem.c1240 usbgem_mii_read(struct usbgem_dev *dp, uint_t reg, int *errp) argument
1245 val = (*dp->ugc.usbgc_mii_read)(dp, reg, errp);
1252 usbgem_mii_write(struct usbgem_dev *dp, uint_t reg, uint16_t val, int *errp) argument
1255 (*dp->ugc.usbgc_mii_write)(dp, reg, val, errp);
1294 DPRINTF(1, (CE_CONT, "!%s: %s: MII_STATUS reg:%b",
1304 /* Do not change the rest of ability bits in advert reg */
1342 "!%s: %s: setting MII_AN_ADVERT reg:%b, pause:%d, asmpause:%d",
1386 "!%s: %s: setting MII_1000TC reg:%b",
1582 "!%s: %s: called: mii_state:%d MII_STATUS reg:%b",
1714 "! MII_1000TC reg
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/illumos-gate/usr/src/uts/common/io/cxgbe/common/
H A Dt4_hw.c32 * @reg: the register to check for completion
33 * @mask: a single-bit field within @reg that indicates completion
45 t4_wait_op_done_val(struct adapter *adapter, int reg, u32 mask, argument
52 u32 val = t4_read_reg(adapter, reg);
1603 * @reg: the interrupt status register to process
1614 t4_handle_intr_status(struct adapter *adapter, unsigned int reg, argument
1619 unsigned int status = t4_read_reg(adapter, reg);
1635 t4_write_reg(adapter, reg, status);
3722 * @reg: the register to read
3729 unsigned int mmd, unsigned int reg, unsigne
3728 t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, unsigned int mmd, unsigned int reg, unsigned int *valp) argument
3760 t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, unsigned int mmd, unsigned int reg, unsigned int val) argument
[all...]
/illumos-gate/usr/src/uts/common/sys/nxge/
H A Dnxge_phy_hw.h1007 uint16_t reg; member in struct:_nxge_phy_mdio_val_t
/illumos-gate/usr/src/uts/common/sys/
H A Dpcie.h298 #define PCIE_SLOTCAP_PHY_SLOT_NUM(reg) \
299 (((reg) >> PCIE_SLOTCAP_PHY_SLOT_NUM_SHIFT) & \
327 #define pcie_slotctl_pwr_indicator_get(reg) \
328 (((reg) & PCIE_SLOTCTL_PWR_INDICATOR_MASK) >> 8)
722 reg :6, member in struct:pcie_cfg
798 reg :6, member in struct:pcie_cfg
/illumos-gate/usr/src/uts/sun4u/cpu/
H A Dspitfire.c85 ushort_t flt_sdbh; /* UDBH reg */
86 ushort_t flt_sdbl; /* UDBL reg */
2829 volatile uint64_t reg; local
2840 reg = lddphysio(HB_ESTAR_MODE);
2841 cur_mask = reg & HB_ECLK_MASK;
/illumos-gate/usr/src/uts/intel/io/drm/
H A Dradeon_drm.h281 unsigned char cmd_type, reg, n_bufs, flags; member in struct:__anon9537::__anon9545
/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_api.c963 DDI_PROP_DONTPASS, "reg", &ptr, &size);
15136 * reg: start address.
15144 ql_read_regs(ql_adapter_state_t *ha, void *buf, void *reg, uint32_t count, argument
15154 reg32 = reg;
15161 reg16 = reg;
15168 reg8 = reg;
/illumos-gate/usr/src/uts/common/io/e1000g/
H A De1000g_sw.h614 } reg; member in union:_e1000g_ether_addr
/illumos-gate/usr/src/uts/common/io/ixgbe/
H A Dixgbe_sw.h381 } reg; member in union:ixgbe_ether_addr
637 uint32_t eicr; /* interrupt cause reg */
/illumos-gate/usr/src/cmd/mandoc/
H A Droff.c2504 struct roffreg *reg; local
2507 reg = r->regtab;
2509 while (reg && strcmp(name, reg->key.p))
2510 reg = reg->next;
2512 if (NULL == reg) {
2514 reg = mandoc_malloc(sizeof(struct roffreg));
2515 reg->key.p = mandoc_strdup(name);
2516 reg
2563 struct roffreg *reg; local
2582 struct roffreg *reg; local
2602 struct roffreg *reg; local
2620 roff_freereg(struct roffreg *reg) argument
2662 struct roffreg *reg, **prev; local
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c67 #define REG_RD(cb, reg) elink_cb_reg_read(cb, reg)
68 #define REG_WR(cb, reg, val) elink_cb_reg_write(cb, reg, val)
69 #define EMAC_RD(cb, reg) REG_RD(cb, emac_base + reg)
70 #define EMAC_WR(cb, reg, val) REG_WR(cb, emac_base + reg, val)
345 static u32 elink_bits_en(struct elink_dev *cb, u32 reg, u32 bits) argument
347 u32 val = REG_RD(cb, reg);
354 elink_bits_dis(struct elink_dev *cb, u32 reg, u32 bits) argument
2862 elink_cl22_write(struct elink_dev *cb, struct elink_phy *phy, u16 reg, u16 val) argument
2897 elink_cl22_read(struct elink_dev *cb, struct elink_phy *phy, u16 reg, u16 *ret_val) argument
2941 elink_cl45_read(struct elink_dev *cb, struct elink_phy *phy, u8 devad, u16 reg, u16 *ret_val) argument
3020 elink_cl45_write(struct elink_dev *cb, struct elink_phy *phy, u8 devad, u16 reg, u16 val) argument
3456 elink_cl45_read_or_write(struct elink_dev *cb, struct elink_phy *phy, u8 devad, u16 reg, u16 or_val) argument
3464 elink_cl45_read_and_write(struct elink_dev *cb, struct elink_phy *phy, u8 devad, u16 reg, u16 and_val) argument
3475 elink_phy_read(struct elink_params *params, u8 phy_addr, u8 devad, u16 reg, u16 *ret_val) argument
3492 elink_phy_write(struct elink_params *params, u8 phy_addr, u8 devad, u16 reg, u16 val) argument
9778 u16 reg; local
[all...]
/illumos-gate/usr/src/uts/common/io/scsi/targets/
H A Dsd.c5905 * Since the sd device does not have the 'reg' property,
22653 mhioc_register_t reg; local
22654 if (ddi_copyin((void *)arg, &reg,
22661 (uchar_t *)&reg);
22675 mhioc_register_t reg; local
22676 if (ddi_copyin((void *)arg, &reg,
22683 (uchar_t *)&reg);
/illumos-gate/usr/src/uts/sun4u/starcat/io/
H A Ddrmach.c174 * Safari Config reg (7 secs).
2954 * For Panther MCs, append the MC idle reg address and drmach_mem_t pointer.
3001 /* addr/id tuple for local Panther MC idle reg */
3065 * Step 2: Now rewrite target reg with present bit on.
3170 DRMACH_PR("local Panther MC idle reg (via ASI 0x4a):\n");
3179 DRMACH_PR("non-local Panther MC idle reg (via ASI 0x15):\n");
3790 rv = node->n_getproplen(node, "reg", &len);
3797 (uint_t)node->get_dnode(node), "reg");
3801 rv = node->n_getprop(node, "reg", (void *)regs, sizeof (regs));
3807 (uint_t)node->get_dnode(node), "reg");
5143 drmach_reg_t reg; local
7859 drmach_is_slot1_pause_axq(dev_info_t *dip, char *name, int *id, uint64_t *reg) argument
7907 drmach_slot1_pause_add_axq(dev_info_t *axq_dip, char *axq_name, int axq_portid, uint64_t reg, drmach_slot1_pause_t **slot1_paused) argument
8067 uint64_t reg; local
8146 uint32_t reg; local
8317 uint64_t reg; local
8540 uint64_t reg; local
[all...]
/illumos-gate/usr/src/uts/common/os/
H A Dsunddi.c123 char *chosen_reg = "chosen-reg";
172 } reg, *reglist; local
177 * get the 'registers' or the 'reg' property.
178 * We look up the reg property as an array of
185 DDI_PROP_DONTPASS, "reg", (int **)&reglist, &length);
190 reg = reglist[rnumber];
191 reg.addr += offset;
193 reg.size = len;
198 chosen_reg, (int *)&reg, (sizeof (reg)/sizeo
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