/*
* This file is provided under a CDDLv1 license. When using or
* redistributing this file, you may do so under this license.
* In redistributing this file this license must be included
* and no other modification of this header file is permitted.
*
* CDDL LICENSE SUMMARY
*
* Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
*
* The contents of this file are subject to the terms of Version
* 1.0 of the Common Development and Distribution License (the "License").
*
* You should have received a copy of the License with this software.
* You can obtain a copy of the License at
* See the License for the specific language governing permissions
* and limitations under the License.
*/
/*
* Copyright 2012 David Höppner. All rights reserved.
* Copyright 2016 Joyent, Inc.
*/
#ifndef _E1000G_SW_H
#define _E1000G_SW_H
#ifdef __cplusplus
extern "C" {
#endif
/*
* **********************************************************************
* Module Name: *
* e1000g_sw.h *
* *
* Abstract: *
* This header file contains Software-related data structures *
* definitions. *
* *
* **********************************************************************
*/
#include <sys/mac_provider.h>
#include <sys/mac_ether.h>
#include <sys/ethernet.h>
#include "e1000_api.h"
/* Driver states */
/*
* MAX_COOKIES = max_LSO_packet_size(65535 + ethernet_header_len)/page_size
* + one for cross page split
* MAX_TX_DESC_PER_PACKET = MAX_COOKIES + one for the context descriptor +
* two for the workaround of the 82546 chip
*/
/*
* constants used in setting flow control thresholds
*/
#define MIN_RX_INTR_DELAY 0
#define MIN_RX_INTR_ABS_DELAY 0
#define MIN_TX_INTR_DELAY 0
#define MIN_TX_INTR_ABS_DELAY 0
#define MIN_INTR_THROTTLING 0
#define MIN_RX_BCOPY_THRESHOLD 0
#ifdef __sparc
#else
#endif
#define DEFAULT_RX_INTR_DELAY 0
/* which is normally 0x040 */
/*
*/
#define E1000G_CHAIN_NO_LIMIT 0
/*
* definitions for smartspeed workaround
*/
/* or 30 seconds */
/* or 6 seconds */
/*
* Definitions for module_info.
*/
/*
* Defined for IP header alignment. We also need to preserve space for
* VLAN tag (4 bytes)
*/
/*
* bit flags for 'attach_progress' which is a member variable in struct e1000g
*/
/* 0200 used to be PROGRESS_NDD. Now unused */
/*
* Speed and Duplex Settings
*/
/*
* Coexist Workaround RP: 07/04/03
* 82544 Workaround : Co-existence
*/
/*
* Defines for Jumbo Frame
*/
#define DEFAULT_FRAME_SIZE \
#define MAXIMUM_FRAME_SIZE \
/* Defines for Tx stall check */
/* Defines for DVMA */
#ifdef __sparc
#endif
/*
* Loopback definitions
*/
#define E1000G_LB_NONE 0
/*
* Private dip list definitions
*/
/*
* Tx descriptor LENGTH field mask
*/
/*
* QUEUE_INIT_LIST -- Macro which will init ialize a queue to NULL.
*/
/*
* IS_QUEUE_EMPTY -- Macro which checks to see if a queue is empty.
*/
/*
* QUEUE_GET_HEAD -- Macro which returns the head of the queue, but does
* not remove the head from the queue.
*/
/*
* QUEUE_REMOVE_HEAD -- Macro which removes the head of the head of a queue.
*/
{ \
{ \
} \
}
/*
* QUEUE_POP_HEAD -- Macro which will pop the head off of a queue (list),
* and return it (this differs from QUEUE_REMOVE_HEAD only in
* the 1st line).
*/
{ \
if (ListElem) \
{ \
} \
}
/*
* QUEUE_GET_TAIL -- Macro which returns the tail of the queue, but does not
* remove the tail from the queue.
*/
/*
* QUEUE_PUSH_TAIL -- Macro which puts an element at the tail (end) of the queue
*/
{ \
(PSINGLE_LIST_LINK)(_E); \
} else { \
} \
/*
* QUEUE_PUSH_HEAD -- Macro which puts an element at the head of the queue.
*/
{ \
} \
/*
* QUEUE_GET_NEXT -- Macro which returns the next element linked to the
* current element.
*/
/*
* QUEUE_APPEND -- Macro which appends a queue to the tail of another queue
*/
} else { \
} \
}
}
/*
* Property lookups
*/
DDI_PROP_DONTPASS, (n))
DDI_PROP_DONTPASS, (n), -1)
#ifdef E1000G_DEBUG
/*
* E1000G-specific ioctls ...
*/
+ 'K') << 4) + 'G') << 4)
/*
* These diagnostic IOCTLS are enabled only in DEBUG drivers
*/
typedef struct {
/* input for poke */
#endif /* E1000G_DEBUG */
/*
* (Internal) return values from ioctl subroutines
*/
enum ioc_reply {
};
/*
* Named Data (ND) Parameter Management Structure
*/
typedef struct {
char *ndp_name;
} nd_param_t;
/*
* The entry of the private dip list
*/
typedef struct _private_devi_list {
/*
* A structure that points to the next entry in the queue.
*/
typedef struct _SINGLE_LIST_LINK {
/*
* A "ListHead" structure that points to the head and tail of a queue
*/
typedef struct _LIST_DESCRIBER {
enum e1000g_bar_type {
E1000G_BAR_CONFIG = 0,
};
typedef struct {
int rnumber;
} bar_info_t;
/*
* Address-Length pair structure that stores descriptor info
*/
typedef struct _sw_desc {
typedef struct _desc_array {
typedef enum {
} dma_type_t;
typedef struct _dma_buffer {
/*
* Transmit Control Block (TCB), Ndis equiv of SWPacket This
* structure stores the additional information that is
* associated with every packet to be transmitted. It stores the
* message block pointer and the TBD addresses associated with
* the m_blk and also the link to the next tcb in the chain
*/
typedef struct _tx_sw_packet {
/* Link to the next tx_sw_packet in the list */
/*
* This structure is similar to the rx_sw_packet structure used
* for Ndis. This structure stores information about the 2k
* aligned receive buffer into which the FX1000 DMA's frames.
* This structure is maintained as a linked list of many
* receiver buffer pointers.
*/
typedef struct _rx_sw_packet {
/* Link to the next rx_sw_packet_t in the list */
typedef struct _mblk_list {
typedef struct _context_data {
typedef union _e1000g_ether_addr {
struct {
} reg;
struct {
} mac;
typedef struct _e1000g_stat {
#ifdef E1000G_DEBUG
#endif
#ifdef E1000G_DEBUG
#endif
#ifdef E1000G_DEBUG
#endif
typedef struct _e1000g_tx_ring {
/*
* Descriptor queue definitions
*/
/*
* Software packet structures definitions
*/
/*
*/
/*
* Timer definitions for 82547
*/
/*
* reschedule when tx resource is available
*/
/*
* Statistics
*/
#ifdef E1000G_DEBUG
#endif
/*
* Pointer to the adapter
*/
typedef struct _e1000g_rx_data {
/*
* Descriptor queue definitions
*/
/*
* Software packet structures definitions
*/
typedef struct _e1000g_rx_ring {
/*
* Statistics
*/
#ifdef E1000G_DEBUG
#endif
/*
* Pointer to the adapter
*/
typedef struct e1000g {
int instance;
/*
* Rx and Tx packet count for interrupt adaptive setting
*/
/*
* The watchdog_lock must be held when updateing the
* timeout fields in struct e1000g, that is,
* watchdog_tid, watchdog_timer_started.
*/
/*
* The link_lock protects the link_complete and link_tid
* fields in struct e1000g.
*/
/*
* stopped while other functions change the hardware
* configuration of e1000g card, such as e1000g_reset(),
* e1000g_reset_hw() etc are executed.
*/
#ifdef __sparc
#endif
int intr_type;
int intr_cnt;
int intr_cap;
int tx_softint_pri;
/*
* FMA capabilities
*/
int fm_capabilities;
} e1000g_t;
/*
* Function prototypes
*/
void e1000g_set_fma_flags(int dma_flag);
/*
* Functions for working around various problems, these used to be from the
* common code.
*/
/*
* I219 specific workarounds
*/
extern void e1000g_flush_rx_ring(struct e1000g *);
extern void e1000g_flush_tx_ring(struct e1000g *);
/*
* Global variables
*/
extern boolean_t e1000g_force_detach;
extern uint32_t e1000g_mblks_pending;
extern kmutex_t e1000g_rx_detach_lock;
extern int e1000g_poll_mode;
#ifdef __cplusplus
}
#endif
#endif /* _E1000G_SW_H */