VMM: log rel nit.

VMM/PGM: cosmetics.

VMM,REM: CPUID revamp - almost there now.

MSR rewrite: initial hacking - half disabled.

VMM: fixed help message to point the user where to enable PAE

PGM: Added a new page type for the VT-x APIC access page MMIO alias instead of abusing the MMIO2 aliasing. There are important differences, we can safely access the MMIO2 page when aliased and save time doing so, while the alias created by IOMMMIOMapMMIOHCPage must not be accessed outside the VT-x execution AFAIK.

VMM, recompiler: Purge deprecated macros.

Fixed up and enabled Netware WP0+RO+US hack.

Doc updates regarding guest 64-bit on 32-bit host.

VMM: First part of HMIsEnabled() and PGMMap*.

VMM: SELM and VMM early HM init changes.

Do HMR3Init first in vmR3InitRing3 so the other components can skip raw-mode bits during init.

Assert more in PGMR3Reset and PGMR3MemSetup.

build fix (in case cCPUs would be 0)

PDM,PGM,DevEFI,DevACPI,DevPcBios: Added memory setup phase after construction and reset to solve PGM/PDM reset order issue (PDM first, then PGM, only that wasn't possible previously since PDM reset would plant stuff in guest RAM).

BUGZ:6606 Guest CPU offlining/onlining now works. Renamed PGMR3ResetUnpluggedCpu() -> PGMR3ResetCpu().

DBGF,DBGC,++: PVM -> PUVM. Some refactoring and cleanup as well.

VM,++: Changed the VM callbacks (at error, at runtime error, at state change) to use PUVM instead of PVM.

VMM,Main,Debugger,REM: VM API cleanup, prefering PUVM over PVM so we can use real reference counting and not have the memory backing the VM structure disappear on us.

VMM: HM cleanup.

PGMR3Reset: Flush even more on reset if A20 was disabled.

PGM.cpp: Must update the GCPhysA20Mask member when changing fA20Enabled at reset (and other times). Fixes the assertion in PGMR3PhysTlbGCPhys2Ptr when resetting before the guest has reprogrammed the A20 gate.

Doxygen.

Doxygen.

Doxygen.

Doxygen, comment typos.

PGM.cpp: Some additional words.

PGM.cpp: A couple of words about the A20 implementation.

PGM: Don't flush the shadow page pool on A20 change, just change the shadow CR3 (well, the current lazy code does a bit more, but whatever). A20 stats.

PGM: Initialize the A20 mask correctly.

Introduced VBOX_WITH_REM in Config.kmk and the VMM.

VMM,VMMDev: Page sharing cleanup.

VMM: don't use generic IPE status codes, use specific ones. Part 1.

VMM: -Wunused-parameter on mac.

VMM: -Wunused-parameter

VMM,INTNET: Addressing unused variable warnings.

PGM: Attempt at fixing the VERR_MAP_FAILED during state save problem on 32-bit hosts when assigning lots of memory to the guest. PGM should lock down guest RAM pages before use and release them afterwards like everyone else. Still quite some stuff left to do there, so I've deviced a little hack for tracking unlocked mappings and using this as input when deciding to do async or sync chunk unmapping at save/load time. See xtracker #5912 and public ticket 7929.

PGM: Log the host paging mode.

PGM: Drop the PGM_WITH_LARGE_ADDRESS_SPACE_ON_32_BIT_HOST define and instead just select different defaults when reading MaxRing3Chunks from CFGM. Also, force a 3GB max limit on 32-bit darwin (previously unlimted).

VMM/VT-x: Fix for PAE guests running on 32-bit hosts or 64-bit hosts where VBoxInternal/PGM/MaxRing3Chunks is used.

GMM: Don't ignore the status code of the update loop. PGM: Initialize the handy pages correctly and retry the handy page allocation a little differently.

more PCI passthrough fixes

PGM: Fixed locking issues in PGMR3PhysMMIORegister and PGMR3PhysMMIODeregister. Also addressed a harmless on in PGMR3PhysRomRegister (only used at init time, so no races). Fortified the code with assertions more lock assertion, replacing the incorrect PGMIsLocked() checks (we only care if the current thread is the lock owner). Cleaned up some ReturnStmt macros and adding more of them.

PGM: Removed the #ifndef PGM_USE_RAMRANGE_TLB code.

PGM: Put a TLB in front of the RAM ranges to speed up lookup (disabled).

Fix regression introduced with r70774. Change the RC structure of the mapping cache instead of the R0 one

VMM: Sketched out where to do the initial I/O MMU setup. This adds a VMINITCOMPLETED_HWACCM and makes HWACCMR3InitFinalizeR0 private (invoked from HWACCMR3InitCompleted(,_RING0).

nits

PGM: Fixed large pages and write monitoring (live snapshot). Added checks for PGM_PAGE_PDE_TYPE_PDE_DISABLED in a few places where only PGM_PAGE_PDE_TYPE_PDE was checked for (might have missed some).

PCDBGCCMD & PFNDBGCCMD: Drop the return type & variable. Functions will be added separately from commands (superset of DBGCCMD).

VMM reorg: Moving the public include files from include/VBox to include/VBox/vmm.

VMM source reorg.