PGMAllPhys.cpp revision b2fae6494c13147d0f29944b9bf048705a32750a
/* $Id$ */
/** @file
* PGM - Page Manager and Monitor, Physical Memory Addressing.
*/
/*
* Copyright (C) 2006-2012 Oracle Corporation
*
* This file is part of VirtualBox Open Source Edition (OSE), as
* available from http://www.virtualbox.org. This file is free software;
* General Public License (GPL) as published by the Free Software
* Foundation, in version 2 as it comes in the "COPYING" file of the
* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
*/
/*******************************************************************************
* Header Files *
*******************************************************************************/
#define LOG_GROUP LOG_GROUP_PGM_PHYS
#ifdef VBOX_WITH_REM
#endif
#include "PGMInternal.h"
#include "PGMInline.h"
#include <iprt/asm-amd64-x86.h>
#ifdef IN_RING3
#endif
/*******************************************************************************
* Defined Constants And Macros *
*******************************************************************************/
/** Enable the physical TLB. */
#define PGM_WITH_PHYS_TLB
#ifndef IN_RING3
/**
* This simply pushes everything to the HC handler.
*
* @returns VBox status code (appropriate for trap handling and GC return).
* @param pVM Pointer to the VM.
* @param uErrorCode CPU Error code.
* @param pRegFrame Trap register frame.
* @param pvFault The fault address (cr2).
* @param GCPhysFault The GC physical address corresponding to pvFault.
* @param pvUser User argument.
*/
VMMDECL(int) pgmPhysHandlerRedirectToHC(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
{
}
/**
* \#PF Handler callback for Guest ROM range write access.
* We simply ignore the writes or fall back to the recompiler if we don't support the instruction.
*
* @returns VBox status code (appropriate for trap handling and GC return).
* @param pVM Pointer to the VM.
* @param uErrorCode CPU Error code.
* @param pRegFrame Trap register frame.
* @param pvFault The fault address (cr2).
* @param GCPhysFault The GC physical address corresponding to pvFault.
* @param pvUser User argument. Pointer to the ROM range structure.
*/
VMMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
{
int rc;
{
{
/*
* If it's a simple instruction which doesn't change the cpu state
* we will simply skip it. Otherwise we'll have to defer it to REM.
*/
if ( RT_SUCCESS(rc)
{
{
/** @todo Find other instructions we can safely skip, possibly
* adding this kind of detection to DIS or EM. */
case OP_MOV:
return VINF_SUCCESS;
}
}
break;
}
break; /** @todo Must edit the shadow PT and restart the instruction, not use the interpreter! */
/* Handle it in ring-3 because it's *way* easier there. */
break;
default:
AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
}
return VINF_EM_RAW_EMULATE_INSTR;
}
#endif /* IN_RING3 */
/**
* Invalidates the RAM range TLBs.
*
* @param pVM Pointer to the VM.
*/
{
for (uint32_t i = 0; i < PGM_RAMRANGE_TLB_ENTRIES; i++)
{
}
}
/**
* Tests if a value of type RTGCPHYS is negative if the type had been signed
* instead of unsigned.
*
* @returns @c true if negative, @c false if positive or zero.
* @param a_GCPhys The value to test.
*/
/**
* Slow worker for pgmPhysGetRange.
*
* @copydoc pgmPhysGetRange
*/
{
while (pRam)
{
{
return pRam;
}
if (RTGCPHYS_IS_NEGATIVE(off))
else
}
return NULL;
}
/**
* Slow worker for pgmPhysGetRangeAtOrAbove.
*
* @copydoc pgmPhysGetRangeAtOrAbove
*/
{
while (pRam)
{
{
return pRam;
}
if (RTGCPHYS_IS_NEGATIVE(off))
{
}
else
}
return pLastLeft;
}
/**
* Slow worker for pgmPhysGetPage.
*
* @copydoc pgmPhysGetPage
*/
{
while (pRam)
{
{
}
if (RTGCPHYS_IS_NEGATIVE(off))
else
}
return NULL;
}
/**
* Slow worker for pgmPhysGetPageEx.
*
* @copydoc pgmPhysGetPageEx
*/
{
while (pRam)
{
{
return VINF_SUCCESS;
}
if (RTGCPHYS_IS_NEGATIVE(off))
else
}
}
/**
* Slow worker for pgmPhysGetPageAndRangeEx.
*
* @copydoc pgmPhysGetPageAndRangeEx
*/
{
while (pRam)
{
{
return VINF_SUCCESS;
}
if (RTGCPHYS_IS_NEGATIVE(off))
else
}
}
/**
* Checks if Address Gate 20 is enabled or not.
*
* @returns true if enabled.
* @returns false if disabled.
* @param pVCpu Pointer to the VMCPU.
*/
{
}
/**
* Validates a GC physical address.
*
* @returns true if valid.
* @returns false if invalid.
* @param pVM Pointer to the VM.
* @param GCPhys The physical address to validate.
*/
{
}
/**
* Checks if a GC physical address is a normal page,
* i.e. not ROM, MMIO or reserved.
*
* @returns true if normal.
* @returns false if invalid, ROM, MMIO or reserved page.
* @param pVM Pointer to the VM.
* @param GCPhys The physical address to check.
*/
{
return pPage
}
/**
* Converts a GC physical address to a HC physical address.
*
* @returns VINF_SUCCESS on success.
* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
* page but has no physical backing.
* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
* GC physical address.
*
* @param pVM Pointer to the VM.
* @param GCPhys The GC physical address to convert.
* @param pHCPhys Where to store the HC physical address on success.
*/
{
if (RT_SUCCESS(rc))
return rc;
}
/**
* Invalidates all page mapping TLBs.
*
* @param pVM Pointer to the VM.
*/
{
{
}
/** @todo clear the RC TLB whenever we add it. */
}
/**
* Invalidates a page mapping TLB entry
*
* @param pVM Pointer to the VM.
* @param GCPhys GCPhys entry to flush
*/
{
#ifdef IN_RC
#else
#endif
/** @todo clear the RC TLB whenever we add it. */
}
/**
* Makes sure that there is at least one handy page ready for use.
*
* This will also take the appropriate actions when reaching water-marks.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_EM_NO_MEMORY if we're really out of memory.
*
* @param pVM Pointer to the VM.
*
* @remarks Must be called from within the PGM critical section. It may
* nip back to ring-3/0 in some cases.
*/
{
AssertMsg(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages), ("%d\n", pVM->pgm.s.cHandyPages));
/*
* Do we need to do anything special?
*/
#ifdef IN_RING3
#else
#endif
{
/*
* Allocate pages only if we're out of them, or in ring-3, almost out.
*/
#ifdef IN_RING3
#else
#endif
{
Log(("PGM: cHandyPages=%u out of %u -> allocate more; VM_FF_PGM_NO_MEMORY=%RTbool\n",
pVM->pgm.s.cHandyPages, RT_ELEMENTS(pVM->pgm.s.aHandyPages), VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY) ));
#ifdef IN_RING3
#else
#endif
{
if (RT_FAILURE(rc))
return rc;
{
LogRel(("PGM: no more handy pages!\n"));
return VERR_EM_NO_MEMORY;
}
#ifdef IN_RING3
# ifdef VBOX_WITH_REM
# endif
#else
#endif
}
}
else
{
#ifndef IN_RING3
{
Log(("PGM: VM_FF_TO_R3 - cHandyPages=%u out of %u\n", pVM->pgm.s.cHandyPages, RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
}
#endif
}
}
return VINF_SUCCESS;
}
/**
* Replace a zero or shared page with new page that we can write to.
*
* @returns The following VBox status codes.
* @retval VINF_SUCCESS on success, pPage is modified.
* @retval VINF_PGM_SYNC_CR3 on success and a page pool flush is pending.
* @retval VERR_EM_NO_MEMORY if we're totally out of memory.
*
* @todo Propagate VERR_EM_NO_MEMORY up the call tree.
*
* @param pVM Pointer to the VM.
* @param pPage The physical page tracking structure. This will
* be modified on success.
* @param GCPhys The address of the page.
*
* @remarks Must be called from within the PGM critical section. It may
* nip back to ring-3/0 in some cases.
*
* @remarks This function shouldn't really fail, however if it does
* the low-water mark. Or, that some device I/O is causing a lot of
* pages to be allocated while while the host is in a low-memory
* condition. This latter should be handled elsewhere and in a more
* controlled manner, it's on the @bugref{3170} todo list...
*/
{
/*
* Prereqs.
*/
AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%R[pgmpage] %RGp\n", pPage, GCPhys));
# ifdef PGM_WITH_LARGE_PAGES
/*
* Try allocate a large page if applicable.
*/
if ( PGMIsUsingLargePages(pVM)
{
{
if (rc == VINF_SUCCESS)
return rc;
}
/* Mark the base as type page table, so we don't check over and over again. */
/* fall back to 4KB pages. */
}
# endif
/*
* Flush any shadow page table mappings of the page.
* When VBOX_WITH_NEW_LAZY_PAGE_ALLOC isn't defined, there shouldn't be any.
*/
bool fFlushTLBs = false;
AssertMsgReturn(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3, ("%Rrc\n", rc), RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_STATUS);
/*
* Ensure that we've got a page handy, take it and use it.
*/
if (RT_FAILURE(rc2))
{
if (fFlushTLBs)
return rc2;
}
/* re-assert preconditions since pgmPhysEnsureHandyPage may do a context switch. */
AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%R[pgmpage] %RGp\n", pPage, GCPhys));
/*
* There are one or two action to be taken the next time we allocate handy pages:
* - Tell the GMM (global memory manager) what the page is being used for.
* (Speeds up replacement operations - sharing and defragmenting.)
* - If the current backing is shared, it must be freed.
*/
void const *pvSharedPage = NULL;
if (PGM_PAGE_IS_SHARED(pPage))
{
/* Mark this shared page for freeing/dereferencing. */
/* Grab the address of the page so we can make a copy later on. (safe) */
}
else
{
Log2(("PGM: Replaced zero page %RGp with %#x / %RHp\n", GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
}
/*
* Do the PGMPAGE modifications.
*/
/* Copy the shared page contents to the replacement page. */
if (pvSharedPage)
{
/* Get the virtual address of the new page. */
void *pvNewPage;
if (RT_SUCCESS(rc))
{
}
}
if ( fFlushTLBs
&& rc != VINF_PGM_GCPHYS_ALIASED)
return rc;
}
#ifdef PGM_WITH_LARGE_PAGES
/**
* Replace a 2 MB range of zero pages with new pages that we can write to.
*
* @returns The following VBox status codes.
* @retval VINF_SUCCESS on success, pPage is modified.
* @retval VINF_PGM_SYNC_CR3 on success and a page pool flush is pending.
* @retval VERR_EM_NO_MEMORY if we're totally out of memory.
*
* @todo Propagate VERR_EM_NO_MEMORY up the call tree.
*
* @param pVM Pointer to the VM.
* @param GCPhys The address of the page.
*
* @remarks Must be called from within the PGM critical section. It may
* nip back to ring-3/0 in some cases.
*/
{
/*
* Prereqs.
*/
if ( RT_SUCCESS(rc)
{
/* Don't call this function for already allocated pages. */
if ( uPDEType == PGM_PAGE_PDE_TYPE_DONTCARE
{
/* Lazy approach: check all pages in the 2 MB range.
* The whole range must be ram and unallocated. */
GCPhys = GCPhysBase;
unsigned iPage;
{
if ( RT_FAILURE(rc)
|| PGM_PAGE_GET_STATE(pSubPage) != PGM_PAGE_STATE_ZERO) /* Allocated, monitored or shared means we can't use a large page here */
{
LogFlow(("Found page %RGp with wrong attributes (type=%d; state=%d); cancel check. rc=%d\n", GCPhys, PGM_PAGE_GET_TYPE(pSubPage), PGM_PAGE_GET_STATE(pSubPage), rc));
break;
}
}
{
/* Failed. Mark as requiring a PT so we don't check the whole thing again in the future. */
}
/*
* Do the allocation.
*/
# ifdef IN_RING3
# else
# endif
if (RT_SUCCESS(rc))
{
return VINF_SUCCESS;
}
/* If we fail once, it most likely means the host's memory is too
fragmented; don't bother trying again. */
PGMSetLargePageUsage(pVM, false);
return rc;
}
}
}
/**
* Recheck the entire 2 MB range to see if we can use it again as a large page.
*
* @returns The following VBox status codes.
* @retval VINF_SUCCESS on success, the large page can be used again
* @retval VERR_PGM_INVALID_LARGE_PAGE_RANGE if it can't be reused
*
* @param pVM Pointer to the VM.
* @param GCPhys The address of the page.
* @param pLargePage Page structure of the base page
*/
{
/* Check the base page. */
{
LogFlow(("pgmPhysRecheckLargePage: checks failed for base page %x %x %x\n", PGM_PAGE_GET_STATE(pLargePage), PGM_PAGE_GET_TYPE(pLargePage), PGM_PAGE_GET_HNDL_PHYS_STATE(pLargePage)));
}
/* Check all remaining pages in the 2 MB range. */
unsigned i;
{
{
LogFlow(("pgmPhysRecheckLargePage: checks failed for page %d; %x %x %x\n", i, PGM_PAGE_GET_STATE(pPage), PGM_PAGE_GET_TYPE(pPage), PGM_PAGE_GET_HNDL_PHYS_STATE(pPage)));
break;
}
}
{
return VINF_SUCCESS;
}
}
#endif /* PGM_WITH_LARGE_PAGES */
/**
* Deal with a write monitored page.
*
* @returns VBox strict status code.
*
* @param pVM Pointer to the VM.
* @param pPage The physical page tracking structure.
*
* @remarks Called from within the PGM critical section.
*/
{
}
/**
* Deal with pages that are not writable, i.e. not in the ALLOCATED state.
*
* @returns VBox strict status code.
* @retval VINF_SUCCESS on success.
* @retval VINF_PGM_SYNC_CR3 on success and a page pool flush is pending.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
*
* @param pVM Pointer to the VM.
* @param pPage The physical page tracking structure.
* @param GCPhys The address of the page.
*
* @remarks Called from within the PGM critical section.
*/
{
switch (PGM_PAGE_GET_STATE(pPage))
{
/* fall thru */
default: /* to shut up GCC */
case PGM_PAGE_STATE_ALLOCATED:
return VINF_SUCCESS;
/*
* Zero pages can be dummy pages for MMIO or reserved memory,
* so we need to check the flags before joining cause with
* shared page replacement.
*/
case PGM_PAGE_STATE_ZERO:
if (PGM_PAGE_IS_MMIO(pPage))
return VERR_PGM_PHYS_PAGE_RESERVED;
/* fall thru */
case PGM_PAGE_STATE_SHARED:
/* Not allowed to write to ballooned pages. */
case PGM_PAGE_STATE_BALLOONED:
return VERR_PGM_PHYS_PAGE_BALLOONED;
}
}
/**
* Internal usage: Map the page specified by its GMM ID.
*
* This is similar to pgmPhysPageMap
*
* @returns VBox status code.
*
* @param pVM Pointer to the VM.
* @param idPage The Page ID.
* @param HCPhys The physical address (for RC).
* @param ppv Where to store the mapping address.
*
* @remarks Called from within the PGM critical section. The mapping is only
* valid while you are inside this section.
*/
{
/*
* Validation.
*/
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/*
* Map it by HCPhys.
*/
#else
/*
*/
{
}
else
{
/*
* Find the chunk, map it if necessary.
*/
if (pMap)
else
{
# ifdef IN_RING0
# else
if (RT_FAILURE(rc))
return rc;
# endif
}
/*
* Enter it into the Chunk TLB.
*/
}
return VINF_SUCCESS;
#endif
}
/**
* Maps a page into the current virtual address space so it can be accessed.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
*
* @param pVM Pointer to the VM.
* @param pPage The physical page tracking structure.
* @param GCPhys The address of the page.
* @param ppMap Where to store the address of the mapping tracking structure.
* @param ppv Where to store the mapping address of the page. The page
* offset is masked off!
*
* @remarks Called from within the PGM critical section.
*/
static int pgmPhysPageMapCommon(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/*
*/
return VINF_SUCCESS;
#else /* IN_RING3 || IN_RING0 */
/*
* Special cases: MMIO2, ZERO and specially aliased MMIO pages.
*/
{
/* Fend off the VT-x APIC access page hack. */
/* Decode the page id to a page in a MMIO2 ram range. */
AssertLogRelReturn(iPage < (pMmio2Range->RamRange.cb >> PAGE_SHIFT), VERR_PGM_PHYS_PAGE_MAP_MMIO2_IPE);
return VINF_SUCCESS;
}
if (idChunk == NIL_GMM_CHUNKID)
{
{
AssertMsgReturn(PGM_PAGE_GET_HCPHYS(pPage)== pVM->pgm.s.HCPhysZeroPg, ("pPage=%R[pgmpage]\n", pPage),
}
else
{
}
return VINF_SUCCESS;
}
/*
*/
{
}
else
{
/*
* Find the chunk, map it if necessary.
*/
if (pMap)
{
}
else
{
#ifdef IN_RING0
#else
if (RT_FAILURE(rc))
return rc;
#endif
}
/*
* Enter it into the Chunk TLB.
*/
}
return VINF_SUCCESS;
#endif /* IN_RING3 */
}
/**
* Combination of pgmPhysPageMakeWritable and pgmPhysPageMapWritable.
*
* This is typically used is paths where we cannot use the TLB methods (like ROM
* pages) or where there is no point in using them since we won't get many hits.
*
* @returns VBox strict status code.
* @retval VINF_SUCCESS on success.
* @retval VINF_PGM_SYNC_CR3 on success and a page pool flush is pending.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
*
* @param pVM Pointer to the VM.
* @param pPage The physical page tracking structure.
* @param GCPhys The address of the page.
* @param ppv Where to store the mapping address of the page. The page
* offset is masked off!
*
* @remarks Called from within the PGM critical section. The mapping is only
* valid while you are inside section.
*/
{
if (RT_SUCCESS(rc))
{
}
return rc;
}
/**
* Maps a page into the current virtual address space so it can be accessed for
* both writing and reading.
*
* This is typically used is paths where we cannot use the TLB methods (like ROM
* pages) or where there is no point in using them since we won't get many hits.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
*
* @param pVM Pointer to the VM.
* @param pPage The physical page tracking structure. Must be in the
* allocated state.
* @param GCPhys The address of the page.
* @param ppv Where to store the mapping address of the page. The page
* offset is masked off!
*
* @remarks Called from within the PGM critical section. The mapping is only
* valid while you are inside section.
*/
{
}
/**
* Maps a page into the current virtual address space so it can be accessed for
* reading.
*
* This is typically used is paths where we cannot use the TLB methods (like ROM
* pages) or where there is no point in using them since we won't get many hits.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
*
* @param pVM Pointer to the VM.
* @param pPage The physical page tracking structure.
* @param GCPhys The address of the page.
* @param ppv Where to store the mapping address of the page. The page
* offset is masked off!
*
* @remarks Called from within the PGM critical section. The mapping is only
* valid while you are inside this section.
*/
{
}
#if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/**
* Load a guest page into the ring-3 physical TLB.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
* @param pPGM The PGM instance pointer.
* @param GCPhys The guest physical address in question.
*/
{
/*
* Find the ram range and page and hand it over to the with-page function.
* 99.8% of requests are expected to be in the first range.
*/
if (!pPage)
{
}
}
/**
* Load a guest page into the ring-3 physical TLB.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVM Pointer to the VM.
* @param pPage Pointer to the PGMPAGE structure corresponding to
* GCPhys.
* @param GCPhys The guest physical address in question.
*/
{
/*
* Map the page.
* Make a special case for the zero page as it is kind of special.
*/
if ( !PGM_PAGE_IS_ZERO(pPage)
&& !PGM_PAGE_IS_BALLOONED(pPage))
{
void *pv;
if (RT_FAILURE(rc))
return rc;
}
else
{
AssertMsg(PGM_PAGE_GET_HCPHYS(pPage) == pVM->pgm.s.HCPhysZeroPg, ("%RGp/%R[pgmpage]\n", GCPhys, pPage));
}
#ifdef PGM_WITH_PHYS_TLB
else
#else
#endif
return VINF_SUCCESS;
}
#endif /* !IN_RC && !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
/**
* Internal version of PGMPhysGCPhys2CCPtr that expects the caller to
* own the PGM lock and therefore not need to lock the mapped page.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVM Pointer to the VM.
* @param GCPhys The guest physical address of the page that should be mapped.
* @param pPage Pointer to the PGMPAGE structure for the page.
* @param ppv Where to store the address corresponding to GCPhys.
*
* @internal
* @deprecated Use pgmPhysGCPhys2CCPtrInternalEx.
*/
{
int rc;
/*
* Make sure the page is writable.
*/
{
if (RT_FAILURE(rc))
return rc;
}
/*
* Get the mapping address.
*/
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
void *pv;
&pv
if (RT_FAILURE(rc))
return rc;
#else
if (RT_FAILURE(rc))
return rc;
#endif
return VINF_SUCCESS;
}
#if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/**
* Locks a page mapping for writing.
*
* @param pVM Pointer to the VM.
* @param pPage The page.
* @param pTlbe The mapping TLB entry for the page.
* @param pLock The lock structure (output).
*/
DECLINLINE(void) pgmPhysPageMapLockForWriting(PVM pVM, PPGMPAGE pPage, PPGMPAGEMAPTLBE pTlbe, PPGMPAGEMAPLOCK pLock)
{
if (pMap)
{
if (cLocks == 0)
}
else if (cLocks != PGM_PAGE_MAX_LOCKS)
{
if (pMap)
}
}
/**
* Locks a page mapping for reading.
*
* @param pVM Pointer to the VM.
* @param pPage The page.
* @param pTlbe The mapping TLB entry for the page.
* @param pLock The lock structure (output).
*/
DECLINLINE(void) pgmPhysPageMapLockForReading(PVM pVM, PPGMPAGE pPage, PPGMPAGEMAPTLBE pTlbe, PPGMPAGEMAPLOCK pLock)
{
if (pMap)
{
if (cLocks == 0)
}
else if (cLocks != PGM_PAGE_MAX_LOCKS)
{
if (pMap)
}
}
#endif /* !IN_RC && !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
/**
* Internal version of PGMPhysGCPhys2CCPtr that expects the caller to
* own the PGM lock and have access to the page structure.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVM Pointer to the VM.
* @param GCPhys The guest physical address of the page that should be mapped.
* @param pPage Pointer to the PGMPAGE structure for the page.
* @param ppv Where to store the address corresponding to GCPhys.
* @param pLock Where to store the lock information that
* pgmPhysReleaseInternalPageMappingLock needs.
*
* @internal
*/
int pgmPhysGCPhys2CCPtrInternal(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock)
{
int rc;
/*
* Make sure the page is writable.
*/
{
if (RT_FAILURE(rc))
return rc;
}
/*
* Do the job.
*/
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
void *pv;
&pv
if (RT_FAILURE(rc))
return rc;
#else
if (RT_FAILURE(rc))
return rc;
#endif
return VINF_SUCCESS;
}
/**
* Internal version of PGMPhysGCPhys2CCPtrReadOnly that expects the caller to
* own the PGM lock and have access to the page structure.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVM Pointer to the VM.
* @param GCPhys The guest physical address of the page that should be mapped.
* @param pPage Pointer to the PGMPAGE structure for the page.
* @param ppv Where to store the address corresponding to GCPhys.
* @param pLock Where to store the lock information that
* pgmPhysReleaseInternalPageMappingLock needs.
*
* @internal
*/
int pgmPhysGCPhys2CCPtrInternalReadOnly(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, const void **ppv, PPGMPAGEMAPLOCK pLock)
{
/*
* Do the job.
*/
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
void *pv;
&pv
RTLOG_COMMA_SRC_POS); /** @todo add a read only flag? */
if (RT_FAILURE(rc))
return rc;
#else
if (RT_FAILURE(rc))
return rc;
#endif
return VINF_SUCCESS;
}
/**
* Requests the mapping of a guest page into the current context.
*
* This API should only be used for very short term, as it will consume scarse
* resources (R0 and GC) in the mapping cache. When you're done with the page,
* call PGMPhysReleasePageMappingLock() ASAP to release it.
*
* This API will assume your intention is to write to the page, and will
* therefore replace shared and zero pages. If you do not intend to modify
* the page, use the PGMPhysGCPhys2CCPtrReadOnly() API.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVM Pointer to the VM.
* @param GCPhys The guest physical address of the page that should be
* mapped.
* @param ppv Where to store the address corresponding to GCPhys.
* @param pLock Where to store the lock information that
* PGMPhysReleasePageMappingLock needs.
*
* @remarks The caller is responsible for dealing with access handlers.
* @todo Add an informational return code for pages with access handlers?
*
* @remark Avoid calling this API from within critical sections (other than
* the PGM one) because of the deadlock risk. External threads may
* need to delegate jobs to the EMTs.
* @remarks Only one page is mapped! Make no assumption about what's after or
* before the returned page!
* @thread Any thread.
*/
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/*
* Find the page and make sure it's writable.
*/
if (RT_SUCCESS(rc))
{
if (RT_SUCCESS(rc))
{
void *pv;
&pv
if (RT_SUCCESS(rc))
{
}
}
}
#else /* IN_RING3 || IN_RING0 */
/*
* Query the Physical TLB entry for the page (may fail).
*/
if (RT_SUCCESS(rc))
{
/*
* If the page is shared, the zero page, or being write monitored
* it must be converted to a page that's writable if possible.
*/
{
if (RT_SUCCESS(rc))
{
}
}
if (RT_SUCCESS(rc))
{
/*
* Now, just perform the locking and calculate the return address.
*/
}
}
#endif /* IN_RING3 || IN_RING0 */
return rc;
}
/**
* Requests the mapping of a guest page into the current context.
*
* This API should only be used for very short term, as it will consume scarse
* resources (R0 and GC) in the mapping cache. When you're done with the page,
* call PGMPhysReleasePageMappingLock() ASAP to release it.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVM Pointer to the VM.
* @param GCPhys The guest physical address of the page that should be
* mapped.
* @param ppv Where to store the address corresponding to GCPhys.
* @param pLock Where to store the lock information that
* PGMPhysReleasePageMappingLock needs.
*
* @remarks The caller is responsible for dealing with access handlers.
* @todo Add an informational return code for pages with access handlers?
*
* @remarks Avoid calling this API from within critical sections (other than
* the PGM one) because of the deadlock risk.
* @remarks Only one page is mapped! Make no assumption about what's after or
* before the returned page!
* @thread Any thread.
*/
VMMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock)
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
/*
* Find the page and make sure it's readable.
*/
if (RT_SUCCESS(rc))
{
else
{
void *pv;
&pv
RTLOG_COMMA_SRC_POS); /** @todo add a read only flag? */
if (RT_SUCCESS(rc))
{
}
}
}
#else /* IN_RING3 || IN_RING0 */
/*
* Query the Physical TLB entry for the page (may fail).
*/
if (RT_SUCCESS(rc))
{
/* MMIO pages doesn't have any readable backing. */
else
{
/*
* Now, just perform the locking and calculate the return address.
*/
}
}
#endif /* IN_RING3 || IN_RING0 */
return rc;
}
/**
* Requests the mapping of a guest page given by virtual address into the current context.
*
* This API should only be used for very short term, as it will consume
* scarse resources (R0 and GC) in the mapping cache. When you're done
* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
*
* This API will assume your intention is to write to the page, and will
* therefore replace shared and zero pages. If you do not intend to modify
* the page, use the PGMPhysGCPtr2CCPtrReadOnly() API.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
* @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVCpu Pointer to the VMCPU.
* @param GCPhys The guest physical address of the page that should be mapped.
* @param ppv Where to store the address corresponding to GCPhys.
* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
*
* @remark Avoid calling this API from within critical sections (other than
* the PGM one) because of the deadlock risk.
* @thread EMT
*/
{
if (RT_SUCCESS(rc))
return rc;
}
/**
* Requests the mapping of a guest page given by virtual address into the current context.
*
* This API should only be used for very short term, as it will consume
* scarse resources (R0 and GC) in the mapping cache. When you're done
* with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
*
* @returns VBox status code.
* @retval VINF_SUCCESS on success.
* @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
* @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
*
* @param pVCpu Pointer to the VMCPU.
* @param GCPhys The guest physical address of the page that should be mapped.
* @param ppv Where to store the address corresponding to GCPhys.
* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
*
* @remark Avoid calling this API from within critical sections (other than
* the PGM one) because of the deadlock risk.
* @thread EMT
*/
VMMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVMCPU pVCpu, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock)
{
if (RT_SUCCESS(rc))
return rc;
}
/**
* Release the mapping of a guest page.
*
* This is the counter part of PGMPhysGCPhys2CCPtr, PGMPhysGCPhys2CCPtrReadOnly
* PGMPhysGCPtr2CCPtr and PGMPhysGCPtr2CCPtrReadOnly.
*
* @param pVM Pointer to the VM.
* @param pLock The lock structure initialized by the mapping function.
*/
{
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
#else
pLock->uPageAndType = 0;
if (fWriteLock)
{
{
if (cLocks == 1)
{
}
}
{
}
}
else
{
{
if (cLocks == 1)
{
}
}
}
if (pMap)
{
}
#endif /* IN_RING3 */
}
/**
* Release the internal mapping of a guest page.
*
* This is the counter part of pgmPhysGCPhys2CCPtrInternalEx and
* pgmPhysGCPhys2CCPtrInternalReadOnly.
*
* @param pVM Pointer to the VM.
* @param pLock The lock structure initialized by the mapping function.
*
* @remarks Caller must hold the PGM lock.
*/
{
}
/**
* Converts a GC physical address to a HC ring-3 pointer.
*
* @returns VINF_SUCCESS on success.
* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
* page but has no physical backing.
* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
* GC physical address.
* @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses
* a dynamic ram chunk boundary
*
* @param pVM Pointer to the VM.
* @param GCPhys The GC physical address to convert.
* @param pR3Ptr Where to store the R3 pointer on success.
*
* @deprecated Avoid when possible!
*/
{
/** @todo this is kind of hacky and needs some more work. */
#ifndef DEBUG_sandervl
#endif
Log(("pgmPhysGCPhys2R3Ptr(,%RGp,): dont use this API!\n", GCPhys)); /** @todo eliminate this API! */
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
#else
if (RT_SUCCESS(rc))
return rc;
#endif
}
#if 0 /*defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)*/
/**
* Maps and locks a guest CR3 or PD (PAE) page.
*
* @returns VINF_SUCCESS on success.
* @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
* page but has no physical backing.
* @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
* GC physical address.
* @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses
* a dynamic ram chunk boundary
*
* @param pVM Pointer to the VM.
* @param GCPhys The GC physical address to convert.
* @param pR3Ptr Where to store the R3 pointer on success. This may or
* may not be valid in ring-0 depending on the
* VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 build option.
*
* @remarks The caller must own the PGM lock.
*/
{
if (RT_SUCCESS(rc))
return rc;
}
{
}
#endif
/**
* Converts a guest pointer to a GC physical address.
*
*
* @returns VBox status code.
* @param pVCpu Pointer to the VMCPU.
* @param GCPtr The guest pointer to convert.
* @param pGCPhys Where to store the GC physical address.
*/
{
return rc;
}
/**
* Converts a guest pointer to a HC physical address.
*
*
* @returns VBox status code.
* @param pVCpu Pointer to the VMCPU.
* @param GCPtr The guest pointer to convert.
* @param pHCPhys Where to store the HC physical address.
*/
{
if (RT_SUCCESS(rc))
return rc;
}
#define LOG_GROUP LOG_GROUP_PGM_PHYS_ACCESS
#if defined(IN_RING3) && defined(SOME_UNUSED_FUNCTION)
/**
* Cache PGMPhys memory access
*
* @param pVM Pointer to the VM.
* @param pCache Cache structure pointer
* @param GCPhys GC physical address
* @param pbHC HC pointer corresponding to physical page
*
* @thread EMT.
*/
{
}
#endif /* IN_RING3 */
/**
* Deals with reading from a page with one or more ALL access handlers.
*
* @returns VBox status code. Can be ignored in ring-3.
* @retval VINF_SUCCESS.
* @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3.
*
* @param pVM Pointer to the VM.
* @param pPage The page descriptor.
* @param GCPhys The physical address to start reading at.
* @param pvBuf Where to put the bits we read.
* @param cb How much to read - less or equal to a page.
*/
{
/*
* The most frequent access here is MMIO and shadowed ROM.
* The current code ASSUMES all these access handlers covers full pages!
*/
/*
* Whatever we do we need the source page, map it first.
*/
if (RT_FAILURE(rc))
{
AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
return VINF_SUCCESS;
}
/*
* Deal with any physical handlers.
*/
#ifdef IN_RING3
#endif
{
#ifdef IN_RING3
Log5(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cb, pPage, R3STRING(pPhys->pszDesc) ));
/* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */
# ifdef VBOX_WITH_STATISTICS
if (pPhys)
# else
# endif
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp\n", rc, GCPhys));
#else
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cb));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#endif
}
/*
* Deal with any virtual handlers.
*/
{
unsigned iPage;
Assert(GCPhys >= pVirt->aPhysToVirt[iPage].Core.Key && GCPhys <= pVirt->aPhysToVirt[iPage].Core.KeyLast);
#ifdef IN_RING3
if (pVirt->pfnHandlerR3)
{
if (!pPhys)
Log5(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] virt %s\n", GCPhys, cb, pPage, R3STRING(pVirt->pszDesc) ));
else
Log(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] phys/virt %s/%s\n", GCPhys, cb, pPage, R3STRING(pVirt->pszDesc), R3STRING(pPhys->pszDesc) ));
+ (iPage << PAGE_SHIFT)
+ (GCPhys & PAGE_OFFSET_MASK);
rc2 = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, (void *)pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, /*pVirt->CTX_SUFF(pvUser)*/ NULL);
if (rc2 == VINF_SUCCESS)
rc = VINF_SUCCESS;
AssertLogRelMsg(rc2 == VINF_SUCCESS || rc2 == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc2, GCPhys, pPage, pVirt->pszDesc));
}
else
Log5(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] virt %s [no handler]\n", GCPhys, cb, pPage, R3STRING(pVirt->pszDesc) ));
#else
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cb));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#endif
}
/*
* Take the default action.
*/
if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
return rc;
}
/**
* Read physical memory.
*
* This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
* want to ignore those.
*
* @returns VBox status code. Can be ignored in ring-3.
* @retval VINF_SUCCESS.
* @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3.
*
* @param pVM Pointer to the VM.
* @param GCPhys Physical address start reading from.
* @param pvBuf Where to put the read bits.
* @param cbRead How many bytes to read.
*/
{
/*
* Copy loop on ram ranges.
*/
for (;;)
{
/* Inside range or not? */
{
/*
* Must work our way thru this page by page.
*/
{
/*
* Any ALL access handlers?
*/
{
if (RT_FAILURE(rc))
{
return rc;
}
}
else
{
/*
* Get the pointer to the page.
*/
const void *pvSrc;
if (RT_SUCCESS(rc))
{
}
else
{
AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
}
}
/* next page */
{
return VINF_SUCCESS;
}
} /* walk pages in ram range. */
}
else
{
/*
* Unassigned address space.
*/
{
break;
}
}
/* Advance range if necessary. */
} /* Ram range walk */
return VINF_SUCCESS;
}
/**
* Deals with writing to a page with one or more WRITE or ALL access handlers.
*
* @returns VBox status code. Can be ignored in ring-3.
* @retval VINF_SUCCESS.
* @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3.
*
* @param pVM Pointer to the VM.
* @param pPage The page descriptor.
* @param GCPhys The physical address to start writing at.
* @param pvBuf What to write.
* @param cbWrite How much to write - less or equal to a page.
*/
static int pgmPhysWriteHandler(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void const *pvBuf, size_t cbWrite)
{
int rc;
/*
* Give priority to physical handlers (like #PF does).
*
* Hope for a lonely physical handler first that covers the whole
* write area. This should be a pretty frequent case with MMIO and
* the heavy usage of full page handlers in the page pool.
*/
{
if (pCur)
{
#ifndef IN_RING3
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#else /* IN_RING3 */
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pCur->pszDesc) ));
else
rc = VINF_SUCCESS;
if (RT_SUCCESS(rc))
{
/* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */
# ifdef VBOX_WITH_STATISTICS
if (pCur)
# else
# endif
{
if (pvDst)
}
else
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, (pCur) ? pCur->pszDesc : ""));
}
else
AssertLogRelMsgFailedReturn(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
{
if (pvDst)
return VINF_SUCCESS;
}
/* more fun to be had below */
#endif /* IN_RING3 */
}
/* else: the handler is somewhere else in the page, deal with it below. */
}
/*
* A virtual handler without any interfering physical handlers.
* Hopefully it'll cover the whole write.
*/
else if (!PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage))
{
unsigned iPage;
if (RT_SUCCESS(rc))
{
#ifndef IN_RING3
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#else /* IN_RING3 */
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] virt %s\n", GCPhys, cbRange, pPage, R3STRING(pCur->pszDesc) ));
if (RT_SUCCESS(rc))
{
if (pCur->pfnHandlerR3)
{
+ (iPage << PAGE_SHIFT)
+ (GCPhys & PAGE_OFFSET_MASK);
rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
}
if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
else
AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pCur->pszDesc));
}
else
AssertLogRelMsgFailedReturn(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
{
return VINF_SUCCESS;
}
/* more fun to be had below */
#endif
}
/* else: the handler is somewhere else in the page, deal with it below. */
}
/*
* Deal with all the odd ends.
*/
/* We need a writable destination page. */
if (!pvDst)
{
("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
}
/* The loop state (big + ugly). */
unsigned iVirtPage = 0;
/* The loop. */
for (;;)
{
/*
* Find the closest handler at or above GCPhys.
*/
{
if (RT_SUCCESS(rc))
{
offVirt = 0;
offVirtLast = (pVirt->aPhysToVirt[iVirtPage].Core.KeyLast & PAGE_OFFSET_MASK) - (GCPhys & PAGE_OFFSET_MASK);
}
else
{
pVirtPhys = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
GCPhys, true /* fAbove */);
if ( pVirtPhys
{
/* ASSUME that pVirtPhys only covers one page. */
}
else
{
fMoreVirt = false;
}
}
}
{
if (pPhys)
{
offPhys = 0;
}
else
{
GCPhys, true /* fAbove */);
if ( pPhys
{
}
else
{
fMorePhys = false;
}
}
}
/*
* Handle access to space without handlers (that's easy).
*/
{
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] miss\n", GCPhys, cbRange, pPage));
}
/*
* Physical handler.
*/
{
#ifdef IN_RING3
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pPhys->pszDesc) ));
/* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */
# ifdef VBOX_WITH_STATISTICS
if (pPhys)
# else
# endif
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, (pPhys) ? pPhys->pszDesc : ""));
#else
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#endif
}
/*
* Virtual handler.
*/
{
#ifdef IN_RING3
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pVirt->pszDesc) ));
if (pVirt->pfnHandlerR3)
{
+ (iVirtPage << PAGE_SHIFT)
+ (GCPhys & PAGE_OFFSET_MASK);
rc = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pVirt->pszDesc));
}
#else
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#endif
}
/*
* Both... give the physical one priority.
*/
else
{
#ifdef IN_RING3
if (pVirt->pfnHandlerR3)
Log(("pgmPhysWriteHandler: overlapping phys and virt handlers at %RGp %R[pgmpage]; cbRange=%#x\n", GCPhys, pPage, cbRange));
Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys/virt %s/%s\n", GCPhys, cbRange, pPage, R3STRING(pPhys->pszDesc), R3STRING(pVirt->pszDesc) ));
/* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */
# ifdef VBOX_WITH_STATISTICS
if (pPhys)
# else
# endif
AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, (pPhys) ? pPhys->pszDesc : ""));
if (pVirt->pfnHandlerR3)
{
+ (iVirtPage << PAGE_SHIFT)
+ (GCPhys & PAGE_OFFSET_MASK);
int rc2 = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
rc = VINF_SUCCESS;
else
AssertLogRelMsg(rc2 == VINF_SUCCESS || rc2 == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pVirt->pszDesc));
}
#else
/* In R0 and RC the callbacks cannot handle this context, so we'll fail. */
//AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
return VERR_PGM_PHYS_WR_HIT_HANDLER;
#endif
}
if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
/*
* Advance if we've got more stuff to do.
*/
{
return VINF_SUCCESS;
}
offPhysLast -= cbRange;
offVirtLast -= cbRange;
}
}
/**
* Write to physical memory.
*
* This API respects access handlers and MMIO. Use PGMPhysSimpleWriteGCPhys() if you
* want to ignore those.
*
* @returns VBox status code. Can be ignored in ring-3.
* @retval VINF_SUCCESS.
* @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3.
*
* @param pVM Pointer to the VM.
* @param GCPhys Physical address to write to.
* @param pvBuf What to write.
* @param cbWrite How many bytes to write.
*/
{
/*
* Copy loop on ram ranges.
*/
for (;;)
{
/* Inside range or not? */
{
/*
* Must work our way thru this page by page.
*/
{
/*
* Any active WRITE or ALL access handlers?
*/
{
if (RT_FAILURE(rc))
{
return rc;
}
}
else
{
/*
* Get the pointer to the page.
*/
void *pvDst;
if (RT_SUCCESS(rc))
{
}
/* Ignore writes to ballooned pages. */
else if (!PGM_PAGE_IS_BALLOONED(pPage))
AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
}
/* next page */
{
return VINF_SUCCESS;
}
} /* walk pages in ram range */
}
else
{
/*
* Unassigned address space, skip it.
*/
if (!pRam)
break;
break;
}
/* Advance range if necessary. */
} /* Ram range walk */
return VINF_SUCCESS;
}
/**
* Read from guest physical memory by GC physical address, bypassing
* MMIO and access handlers.
*
* @returns VBox status.
* @param pVM Pointer to the VM.
* @param pvDst The destination address.
* @param GCPhysSrc The source address (GC physical address).
* @param cb The number of bytes to read.
*/
{
/*
* Treat the first page as a special case.
*/
if (!cb)
return VINF_SUCCESS;
/* map the 1st page */
void const *pvSrc;
if (RT_FAILURE(rc))
return rc;
/* optimize for the case where access is completely within the first page. */
{
return VINF_SUCCESS;
}
/* copy to the end of the page. */
/*
* Page by page.
*/
for (;;)
{
/* map the page */
if (RT_FAILURE(rc))
return rc;
/* last page? */
{
return VINF_SUCCESS;
}
/* copy the entire page and advance */
}
/* won't ever get here. */
}
/**
* Write to guest physical memory referenced by GC pointer.
* Write memory to GC physical address in guest physical memory.
*
* This will bypass MMIO and access handlers.
*
* @returns VBox status.
* @param pVM Pointer to the VM.
* @param GCPhysDst The GC physical address of the destination.
* @param pvSrc The source buffer.
* @param cb The number of bytes to write.
*/
{
/*
* Treat the first page as a special case.
*/
if (!cb)
return VINF_SUCCESS;
/* map the 1st page */
void *pvDst;
if (RT_FAILURE(rc))
return rc;
/* optimize for the case where access is completely within the first page. */
{
return VINF_SUCCESS;
}
/* copy to the end of the page. */
/*
* Page by page.
*/
for (;;)
{
/* map the page */
if (RT_FAILURE(rc))
return rc;
/* last page? */
{
return VINF_SUCCESS;
}
/* copy the entire page and advance */
}
/* won't ever get here. */
}
/**
* Read from guest physical memory referenced by GC pointer.
*
* bypass access handlers and not set any accessed bits.
*
* @returns VBox status.
* @param pVCpu Handle to the current virtual CPU.
* @param pvDst The destination address.
* @param GCPtrSrc The source address (GC pointer).
* @param cb The number of bytes to read.
*/
{
/** @todo fix the macro / state handling: VMCPU_ASSERT_EMT_OR_GURU(pVCpu); */
/*
* Treat the first page as a special case.
*/
if (!cb)
return VINF_SUCCESS;
/* Take the PGM lock here, because many called functions take the lock for a very short period. That's counter-productive
* when many VCPUs are fighting for the lock.
*/
/* map the 1st page */
void const *pvSrc;
if (RT_FAILURE(rc))
{
return rc;
}
/* optimize for the case where access is completely within the first page. */
{
return VINF_SUCCESS;
}
/* copy to the end of the page. */
/*
* Page by page.
*/
for (;;)
{
/* map the page */
if (RT_FAILURE(rc))
{
return rc;
}
/* last page? */
{
return VINF_SUCCESS;
}
/* copy the entire page and advance */
}
/* won't ever get here. */
}
/**
* Write to guest physical memory referenced by GC pointer.
*
* bypass access handlers and not set dirty or accessed bits.
*
* @returns VBox status.
* @param pVCpu Handle to the current virtual CPU.
* @param GCPtrDst The destination address (GC pointer).
* @param pvSrc The source address.
* @param cb The number of bytes to write.
*/
{
/*
* Treat the first page as a special case.
*/
if (!cb)
return VINF_SUCCESS;
/* map the 1st page */
void *pvDst;
if (RT_FAILURE(rc))
return rc;
/* optimize for the case where access is completely within the first page. */
{
return VINF_SUCCESS;
}
/* copy to the end of the page. */
/*
* Page by page.
*/
for (;;)
{
/* map the page */
if (RT_FAILURE(rc))
return rc;
/* last page? */
{
return VINF_SUCCESS;
}
/* copy the entire page and advance */
}
/* won't ever get here. */
}
/**
* Write to guest physical memory referenced by GC pointer and update the PTE.
*
* bypass access handlers but will set any dirty and accessed bits in the PTE.
*
* If you don't want to set the dirty bit, use PGMPhysSimpleWriteGCPtr().
*
* @returns VBox status.
* @param pVCpu Handle to the current virtual CPU.
* @param GCPtrDst The destination address (GC pointer).
* @param pvSrc The source address.
* @param cb The number of bytes to write.
*/
VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
{
/*
* Treat the first page as a special case.
* Btw. this is the same code as in PGMPhyssimpleWriteGCPtr excep for the PGMGstModifyPage.
*/
if (!cb)
return VINF_SUCCESS;
/* map the 1st page */
void *pvDst;
if (RT_FAILURE(rc))
return rc;
/* optimize for the case where access is completely within the first page. */
{
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
return VINF_SUCCESS;
}
/* copy to the end of the page. */
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
/*
* Page by page.
*/
for (;;)
{
/* map the page */
if (RT_FAILURE(rc))
return rc;
/* last page? */
{
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
return VINF_SUCCESS;
}
/* copy the entire page and advance */
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
}
/* won't ever get here. */
}
/**
* Read from guest physical memory referenced by GC pointer.
*
* respect access handlers and set accessed bits.
*
* @returns VBox status.
* @param pVCpu Handle to the current virtual CPU.
* @param pvDst The destination address.
* @param GCPtrSrc The source address (GC pointer).
* @param cb The number of bytes to read.
* @thread The vCPU EMT.
*/
{
int rc;
/*
* Anything to do?
*/
if (!cb)
return VINF_SUCCESS;
/*
* Optimize reads within a single page.
*/
{
/* Convert virtual to physical address + flags */
/* mark the guest page as accessed. */
{
}
}
/*
* Page by page.
*/
for (;;)
{
/* Convert virtual to physical address + flags */
/* mark the guest page as accessed. */
{
}
/* copy */
return rc;
/* next */
}
}
/**
* Write to guest physical memory referenced by GC pointer.
*
* respect access handlers and set dirty and accessed bits.
*
* @returns VBox status.
* @retval VINF_SUCCESS.
* @retval VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3.
*
* @param pVCpu Handle to the current virtual CPU.
* @param GCPtrDst The destination address (GC pointer).
* @param pvSrc The source address.
* @param cb The number of bytes to write.
*/
{
int rc;
/*
* Anything to do?
*/
if (!cb)
return VINF_SUCCESS;
/*
* Optimize writes within a single page.
*/
{
/* Convert virtual to physical address + flags */
/* Mention when we ignore X86_PTE_RW... */
if (!(fFlags & X86_PTE_RW))
/* Mark the guest page as accessed and dirty if necessary. */
{
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
}
}
/*
* Page by page.
*/
for (;;)
{
/* Convert virtual to physical address + flags */
/* Mention when we ignore X86_PTE_RW... */
if (!(fFlags & X86_PTE_RW))
/* Mark the guest page as accessed and dirty if necessary. */
{
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
}
/* copy */
return rc;
/* next */
}
}
/**
* Performs a read of guest virtual memory for instruction emulation.
*
* This will check permissions, raise exceptions and update the access bits.
*
* The current implementation will bypass all access handlers. It may later be
* changed to at least respect MMIO.
*
*
* @returns VBox status code suitable to scheduling.
* @retval VINF_SUCCESS if the read was performed successfully.
* @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
* @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
*
* @param pVCpu Handle to the current virtual CPU.
* @param pCtxCore The context core.
* @param pvDst Where to put the bytes we've read.
* @param GCPtrSrc The source address.
* @param cb The number of bytes to read. Not more than a page.
*
* @remark This function will dynamically map physical pages in GC. This may unmap
* mappings done by the caller. Be careful!
*/
VMMDECL(int) PGMPhysInterpretedRead(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)
{
/** @todo r=bird: This isn't perfect!
* -# It's not checking for reserved bits being 1.
* -# It's not correctly dealing with the access bit.
* -# It's not respecting MMIO memory or any other access handlers.
*/
/*
* 1. Translate virtual to physical. This may fault.
* 2. Map the physical address.
* 3. Do the read operation.
* 4. Set access bits if required.
*/
int rc;
{
/*
* Not crossing pages.
*/
if (RT_SUCCESS(rc))
{
/** @todo we should check reserved bits ... */
void const *pvSrc;
switch (rc)
{
case VINF_SUCCESS:
Log(("PGMPhysInterpretedRead: pvDst=%p pvSrc=%p cb=%d\n", pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb));
break;
break;
default:
return rc;
}
/** @todo access bit emulation isn't 100% correct. */
{
}
return VINF_SUCCESS;
}
}
else
{
/*
* Crosses pages.
*/
if (RT_SUCCESS(rc))
{
if (RT_SUCCESS(rc))
{
/** @todo we should check reserved bits ... */
void const *pvSrc1;
switch (rc)
{
case VINF_SUCCESS:
break;
break;
default:
return rc;
}
void const *pvSrc2;
switch (rc)
{
case VINF_SUCCESS:
break;
break;
default:
return rc;
}
{
}
{
}
return VINF_SUCCESS;
}
}
}
/*
* Raise a #PF.
*/
/* Get the current privilege level. */
switch (rc)
{
case VINF_SUCCESS:
break;
case VERR_PAGE_NOT_PRESENT:
break;
default:
return rc;
}
}
/**
* Performs a read of guest virtual memory for instruction emulation.
*
* This will check permissions, raise exceptions and update the access bits.
*
* The current implementation will bypass all access handlers. It may later be
* changed to at least respect MMIO.
*
*
* @returns VBox status code suitable to scheduling.
* @retval VINF_SUCCESS if the read was performed successfully.
* @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
* @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
*
* @param pVCpu Handle to the current virtual CPU.
* @param pCtxCore The context core.
* @param pvDst Where to put the bytes we've read.
* @param GCPtrSrc The source address.
* @param cb The number of bytes to read. Not more than a page.
* @param fRaiseTrap If set the trap will be raised on as per spec, if clear
* an appropriate error status will be returned (no
* informational at all).
*
*
* @remarks Takes the PGM lock.
* @remarks A page fault on the 2nd page of the access will be raised without
* writing the bits on the first page since we're ASSUMING that the
* caller is emulating an instruction access.
* @remarks This function will dynamically map physical pages in GC. This may
* unmap mappings done by the caller. Be careful!
*/
VMMDECL(int) PGMPhysInterpretedReadNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb,
bool fRaiseTrap)
{
/*
* 1. Translate virtual to physical. This may fault.
* 2. Map the physical address.
* 3. Do the read operation.
* 4. Set access bits if required.
*/
int rc;
{
/*
* Not crossing pages.
*/
if (RT_SUCCESS(rc))
{
if (1) /** @todo we should check reserved bits ... */
{
const void *pvSrc;
switch (rc)
{
case VINF_SUCCESS:
Log(("PGMPhysInterpretedReadNoHandlers: pvDst=%p pvSrc=%p (%RGv) cb=%d\n",
break;
break;
default:
return rc;
}
{
/** @todo access bit emulation isn't 100% correct. */
}
return VINF_SUCCESS;
}
}
}
else
{
/*
* Crosses pages.
*/
if (RT_SUCCESS(rc))
{
if (RT_SUCCESS(rc))
{
if (1) /** @todo we should check reserved bits ... */
{
const void *pvSrc;
switch (rc)
{
case VINF_SUCCESS:
Log(("PGMPhysInterpretedReadNoHandlers: pvDst=%p pvSrc=%p (%RGv) cb=%d [2]\n",
break;
break;
default:
return rc;
}
switch (rc)
{
case VINF_SUCCESS:
break;
break;
default:
return rc;
}
{
}
{
}
return VINF_SUCCESS;
}
/* sort out which page */
}
else
}
}
/*
* Raise a #PF if we're allowed to do that.
*/
/* Calc the error bits. */
switch (rc)
{
case VINF_SUCCESS:
break;
case VERR_PAGE_NOT_PRESENT:
break;
default:
return rc;
}
if (fRaiseTrap)
{
Log(("PGMPhysInterpretedReadNoHandlers: GCPtrSrc=%RGv cb=%#x -> Raised #PF(%#x)\n", GCPtrSrc, cb, uErr));
}
Log(("PGMPhysInterpretedReadNoHandlers: GCPtrSrc=%RGv cb=%#x -> #PF(%#x) [!raised]\n", GCPtrSrc, cb, uErr));
return rc;
}
/**
* Performs a write to guest virtual memory for instruction emulation.
*
* This will check permissions, raise exceptions and update the dirty and access
* bits.
*
* @returns VBox status code suitable to scheduling.
* @retval VINF_SUCCESS if the read was performed successfully.
* @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
* @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
*
* @param pVCpu Handle to the current virtual CPU.
* @param pCtxCore The context core.
* @param GCPtrDst The destination address.
* @param pvSrc What to write.
* @param cb The number of bytes to write. Not more than a page.
* @param fRaiseTrap If set the trap will be raised on as per spec, if clear
* an appropriate error status will be returned (no
* informational at all).
*
* @remarks Takes the PGM lock.
* @remarks A page fault on the 2nd page of the access will be raised without
* writing the bits on the first page since we're ASSUMING that the
* caller is emulating an instruction access.
* @remarks This function will dynamically map physical pages in GC. This may
* unmap mappings done by the caller. Be careful!
*/
VMMDECL(int) PGMPhysInterpretedWriteNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc,
{
/*
* 1. Translate virtual to physical. This may fault.
* 2. Map the physical address.
* 3. Do the write operation.
* 4. Set access bits if required.
*/
/** @todo Since this method is frequently used by EMInterpret or IOM
* upon a write fault to an write access monitored page, we can
* reuse the guest page table walking from the \#PF code. */
int rc;
{
/*
* Not crossing pages.
*/
if (RT_SUCCESS(rc))
{
{
void *pvDst;
switch (rc)
{
case VINF_SUCCESS:
Log(("PGMPhysInterpretedWriteNoHandlers: pvDst=%p (%RGv) pvSrc=%p cb=%d\n",
break;
/* bit bucket */
break;
default:
return rc;
}
{
/** @todo dirty & access bit emulation isn't 100% correct. */
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
}
return VINF_SUCCESS;
}
}
}
else
{
/*
* Crosses pages.
*/
if (RT_SUCCESS(rc))
{
if (RT_SUCCESS(rc))
{
&& (fFlags2 & X86_PTE_RW))
{
void *pvDst;
switch (rc)
{
case VINF_SUCCESS:
Log(("PGMPhysInterpretedWriteNoHandlers: pvDst=%p (%RGv) pvSrc=%p cb=%d\n",
break;
/* bit bucket */
break;
default:
return rc;
}
switch (rc)
{
case VINF_SUCCESS:
break;
/* bit bucket */
break;
default:
return rc;
}
{
rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
}
{
rc = PGMGstModifyPage(pVCpu, GCPtrDst + cb1, 1, (X86_PTE_A | X86_PTE_RW), ~(uint64_t)(X86_PTE_A | X86_PTE_RW));
}
return VINF_SUCCESS;
}
}
else
}
}
/*
* Raise a #PF if we're allowed to do that.
*/
/* Calc the error bits. */
switch (rc)
{
case VINF_SUCCESS:
break;
case VERR_ACCESS_DENIED:
break;
case VERR_PAGE_NOT_PRESENT:
break;
default:
return rc;
}
if (fRaiseTrap)
{
Log(("PGMPhysInterpretedWriteNoHandlers: GCPtrDst=%RGv cb=%#x -> Raised #PF(%#x)\n", GCPtrDst, cb, uErr));
}
Log(("PGMPhysInterpretedWriteNoHandlers: GCPtrDst=%RGv cb=%#x -> #PF(%#x) [!raised]\n", GCPtrDst, cb, uErr));
return rc;
}
/**
* Return the page type of the specified physical address.
*
* @returns The page type.
* @param pVM Pointer to the VM.
* @param GCPhys Guest physical address
*/
{
return enmPgType;
}
/**
* Converts a GC physical address to a HC ring-3 pointer, with some
* additional checks.
*
* @returns VBox status code (no informational statuses).
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_TLB_CATCH_WRITE and *ppv set if the page has a write
* access handler of some kind.
* @retval VERR_PGM_PHYS_TLB_CATCH_ALL if the page has a handler catching all
* accesses or is odd in any way.
* @retval VERR_PGM_PHYS_TLB_UNASSIGNED if the page doesn't exist.
*
* @param pVM Pointer to the VM.
* @param GCPhys The GC physical address to convert. Since this is only
* used for filling the REM TLB, the A20 mask must be
* applied before calling this API.
* @param fWritable Whether write access is required.
* @param ppv Where to store the pointer corresponding to GCPhys on
* success.
* @param pLock
*
* @remarks This is more or a less a copy of PGMR3PhysTlbGCPhys2Ptr.
*/
VMM_INT_DECL(int) PGMPhysIemGCPhys2Ptr(PVM pVM, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers,
{
if (RT_SUCCESS(rc))
{
if (PGM_PAGE_IS_BALLOONED(pPage))
else if (PGM_PAGE_IS_SPECIAL_ALIAS_MMIO(pPage))
else if ( !PGM_PAGE_HAS_ANY_HANDLERS(pPage)
rc = VINF_SUCCESS;
else
{
{
}
{
}
}
if (RT_SUCCESS(rc))
{
int rc2;
/* Make sure what we return is writable. */
if (fWritable)
switch (PGM_PAGE_GET_STATE(pPage))
{
case PGM_PAGE_STATE_ALLOCATED:
break;
case PGM_PAGE_STATE_BALLOONED:
AssertFailed();
case PGM_PAGE_STATE_ZERO:
case PGM_PAGE_STATE_SHARED:
break;
}
#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
void *pv;
&pv
if (RT_FAILURE(rc))
return rc;
#else
/* Get a ring-3 mapping of the address. */
/* Lock it and calculate the address. */
if (fWritable)
else
#endif
Log6(("PGMPhysIemGCPhys2Ptr: GCPhys=%RGp rc=%Rrc pPage=%R[pgmpage] *ppv=%p\n", GCPhys, rc, pPage, *ppv));
}
else
/* else: handler catching all access, no pointer returned. */
}
else
return rc;
}
/**
* Checks if the give GCPhys page requires special handling for the given access
* because it's MMIO or otherwise monitored.
*
* @returns VBox status code (no informational statuses).
* @retval VINF_SUCCESS on success.
* @retval VERR_PGM_PHYS_TLB_CATCH_WRITE and *ppv set if the page has a write
* access handler of some kind.
* @retval VERR_PGM_PHYS_TLB_CATCH_ALL if the page has a handler catching all
* accesses or is odd in any way.
* @retval VERR_PGM_PHYS_TLB_UNASSIGNED if the page doesn't exist.
*
* @param pVM Pointer to the VM.
* @param GCPhys The GC physical address to convert. Since this is only
* used for filling the REM TLB, the A20 mask must be
* applied before calling this API.
* @param fWritable Whether write access is required.
*
* @remarks This is a watered down version PGMPhysIemGCPhys2Ptr and really just
* a stop gap thing that should be removed once there is a better TLB
* for virtual address accesses.
*/
VMM_INT_DECL(int) PGMPhysIemQueryAccess(PVM pVM, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers)
{
if (RT_SUCCESS(rc))
{
if (PGM_PAGE_IS_BALLOONED(pPage))
else if (PGM_PAGE_IS_SPECIAL_ALIAS_MMIO(pPage))
else if ( !PGM_PAGE_HAS_ANY_HANDLERS(pPage)
rc = VINF_SUCCESS;
else
{
{
}
{
}
}
}
return rc;
}