/openjdk7/hotspot/src/cpu/zero/vm/ |
H A D | register_zero.cpp | 31 ConcreteRegisterImpl::max_gpr + FloatRegisterImpl::number_of_registers; 37 const char* FloatRegisterImpl::name() const {
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H A D | register_zero.hpp | 71 class FloatRegisterImpl; 72 typedef FloatRegisterImpl* FloatRegister; 79 class FloatRegisterImpl : public AbstractRegisterImpl { class in inherits:AbstractRegisterImpl 109 FloatRegisterImpl::number_of_registers
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H A D | vmreg_zero.inline.hpp | 33 inline VMReg FloatRegisterImpl::as_VMReg() {
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/openjdk7/hotspot/src/cpu/sparc/vm/ |
H A D | register_sparc.cpp | 29 const int ConcreteRegisterImpl::max_fpr = ConcreteRegisterImpl::max_gpr + FloatRegisterImpl::number_of_registers; 42 const char* FloatRegisterImpl::name() const {
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H A D | vmreg_sparc.inline.hpp | 33 inline VMReg FloatRegisterImpl::as_VMReg() { return VMRegImpl::as_VMReg( ConcreteRegisterImpl::max_gpr + encoding() ); }
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H A D | assembler_sparc.cpp | 272 fadd( FloatRegisterImpl::S, F0, F1, F2 ); 273 fsub( FloatRegisterImpl::D, F34, F0, F62 ); 275 fcmp( FloatRegisterImpl::Q, fcc0, F0, F60); 276 fcmpe( FloatRegisterImpl::S, fcc1, F31, F30); 278 ftox( FloatRegisterImpl::D, F2, F4 ); 279 ftoi( FloatRegisterImpl::Q, F4, F8 ); 281 ftof( FloatRegisterImpl::S, FloatRegisterImpl::Q, F3, F12 ); 283 fxtof( FloatRegisterImpl::S, F4, F5 ); 284 fitof( FloatRegisterImpl [all...] |
H A D | sharedRuntime_sparc.cpp | 214 for( int i=0; i<FloatRegisterImpl::number_of_registers; i+=2 ) { 216 __ stf(FloatRegisterImpl::D, f, SP, offset+STACK_BIAS); 234 for( int i=0; i<FloatRegisterImpl::number_of_registers; i+=2 ) { 235 __ ldf(FloatRegisterImpl::D, SP, d00_offset+i*sizeof(float)+STACK_BIAS, as_FloatRegister(i)); 304 __ ldf(FloatRegisterImpl::D, SP, d00_offset+STACK_BIAS, as_FloatRegister(0)); 635 __ stf(FloatRegisterImpl::D, r_1->as_FloatRegister(), base, next_arg_slot(st_off)); 638 __ stf(FloatRegisterImpl::S, r_1->as_FloatRegister(), base, next_arg_slot(st_off)); 639 __ stf(FloatRegisterImpl::S, r_2->as_FloatRegister(), base, arg_slot(st_off) ); 645 __ stf(FloatRegisterImpl::S, f, base, arg_slot(st_off)); 962 __ ldf(FloatRegisterImpl [all...] |
H A D | assembler_sparc.hpp | 1003 static int fd( FloatRegister r, FloatRegisterImpl::Width fwa) { return u_field(r->encoding(fwa), 29, 25); }; 1004 static int fs1(FloatRegister r, FloatRegisterImpl::Width fwa) { return u_field(r->encoding(fwa), 18, 14); }; 1005 static int fs2(FloatRegister r, FloatRegisterImpl::Width fwa) { return u_field(r->encoding(fwa), 4, 0); }; 1008 static int alt_op3(int op, FloatRegisterImpl::Width w) { 1011 case FloatRegisterImpl::S: r = op + 0; break; 1012 case FloatRegisterImpl::D: r = op + 3; break; 1013 case FloatRegisterImpl::Q: r = op + 2; break; 1127 static void v8_s_only(FloatRegisterImpl::Width w) { if (w != FloatRegisterImpl::S) v9_only(); } 1317 void fadd( FloatRegisterImpl [all...] |
H A D | templateTable_sparc.cpp | 272 __ ldf(FloatRegisterImpl::S, G3_scratch, a.low10(), Ftos_f); 287 __ ldf(FloatRegisterImpl::D, G3_scratch, a.low10(), Ftos_d); 354 __ delayed()->ldf(FloatRegisterImpl::S, O0, O1, Ftos_f); 362 // __ ldf(FloatRegisterImpl::S, O0, O1, Ftos_f); 434 __ ldf(FloatRegisterImpl::D, G3_scratch, base_offset, Ftos_d); 437 __ ldf(FloatRegisterImpl::S, G3_scratch, base_offset, f); 438 __ ldf(FloatRegisterImpl::S, G3_scratch, base_offset + sizeof(jdouble)/2, 606 __ ldf(FloatRegisterImpl::S, O3, arrayOopDesc::base_offset_in_bytes(T_FLOAT), Ftos_f); 615 __ ldf(FloatRegisterImpl::D, O3, arrayOopDesc::base_offset_in_bytes(T_DOUBLE), Ftos_d); 682 __ ldf( FloatRegisterImpl [all...] |
H A D | register_sparc.hpp | 215 class FloatRegisterImpl; 216 typedef FloatRegisterImpl* FloatRegister; 226 class FloatRegisterImpl: public AbstractRegisterImpl { class in inherits:AbstractRegisterImpl 388 FloatRegisterImpl::number_of_registers +
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H A D | interpreterRT_sparc.cpp | 72 __ ldf(FloatRegisterImpl::S, Llocals, Interpreter::local_offset_in_bytes(offset()), Rtmp); 86 __ ldf(FloatRegisterImpl::D, Llocals, Interpreter::local_offset_in_bytes(offset() + 1), Rtmp);
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H A D | interpreter_sparc.cpp | 200 __ ldf( FloatRegisterImpl::S, a, ldarg.as_float_register(), 4); 205 __ ldf( FloatRegisterImpl::D, a, ldarg.as_double_register() );
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H A D | c1_LIRAssembler_sparc.cpp | 687 FloatRegisterImpl::Width w = is_double ? FloatRegisterImpl::D : FloatRegisterImpl::S; 690 __ fmov(FloatRegisterImpl::S, rsrc, rdst); 700 __ fcmp(FloatRegisterImpl::S, Assembler::fcc0, rsrc, rsrc); 706 __ ftoi(FloatRegisterImpl::S, rsrc, rsrc); 708 __ stf(FloatRegisterImpl::S, rsrc, addr.base(), addr.disp()); 730 FloatRegisterImpl::Width vw = is_double ? FloatRegisterImpl::S : FloatRegisterImpl [all...] |
H A D | interp_masm_sparc.cpp | 221 case ftos: ldf(FloatRegisterImpl::S, val_addr, Ftos_f); break; 222 case dtos: ldf(FloatRegisterImpl::D, val_addr, Ftos_d); break; 332 ldf(FloatRegisterImpl::D, r1, offset, d); 334 ldf(FloatRegisterImpl::S, r1, offset, d); 335 ldf(FloatRegisterImpl::S, r1, offset + Interpreter::stackElementSize, d->successor()); 344 stf(FloatRegisterImpl::D, d, r1, offset); 348 stf(FloatRegisterImpl::S, d, r1, offset); 349 stf(FloatRegisterImpl::S, d->successor(), r1, offset + Interpreter::stackElementSize); 403 ldf(FloatRegisterImpl::S, Lesp, Interpreter::expr_offset_in_bytes(0), f); 447 stf(FloatRegisterImpl [all...] |
H A D | jniFastGetField_sparc.cpp | 227 case T_FLOAT: __ ldf (FloatRegisterImpl::S, O5, O4, F0); break; 228 case T_DOUBLE: __ ldf (FloatRegisterImpl::D, O5, O4, F0); break;
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H A D | nativeInst_sparc.cpp | 622 a->ldf( FloatRegisterImpl::D, O2, -1, F14 ); idx++; 624 a->ldf( FloatRegisterImpl::S, O0, I3, F15 ); idx++; 641 a->stf( FloatRegisterImpl::S, F18, O2, -1 ); idx++; 643 a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++; 766 a->ldf( FloatRegisterImpl::D, O2, -1, F14 ); idx++; 768 a->ldf( FloatRegisterImpl::S, O0, I3, F15 ); idx++; 785 a->stf( FloatRegisterImpl::S, F18, O2, -1 ); idx++; 787 a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++;
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H A D | assembler_sparc.inline.hpp | 114 inline void Assembler::ldf(FloatRegisterImpl::Width w, Register s1, RegisterOrConstant s2, FloatRegister d) { 119 inline void Assembler::ldf(FloatRegisterImpl::Width w, Register s1, Register s2, FloatRegister d) { emit_long( op(ldst_op) | fd(d, w) | alt_op3(ldf_op3, w) | rs1(s1) | rs2(s2) ); } 120 inline void Assembler::ldf(FloatRegisterImpl::Width w, Register s1, int simm13a, FloatRegister d, RelocationHolder const& rspec) { emit_data( op(ldst_op) | fd(d, w) | alt_op3(ldf_op3, w) | rs1(s1) | immed(true) | simm(simm13a, 13), rspec); } 122 inline void Assembler::ldf(FloatRegisterImpl::Width w, const Address& a, FloatRegister d, int offset) { relocate(a.rspec(offset)); ldf( w, a.base(), a.disp() + offset, d); } 254 inline void Assembler::stf( FloatRegisterImpl::Width w, FloatRegister d, Register s1, RegisterOrConstant s2) { 259 inline void Assembler::stf( FloatRegisterImpl::Width w, FloatRegister d, Register s1, Register s2) { emit_long( op(ldst_op) | fd(d, w) | alt_op3(stf_op3, w) | rs1(s1) | rs2(s2) ); } 260 inline void Assembler::stf( FloatRegisterImpl::Width w, FloatRegister d, Register s1, int simm13a) { emit_data( op(ldst_op) | fd(d, w) | alt_op3(stf_op3, w) | rs1(s1) | immed(true) | simm(simm13a, 13)); } 262 inline void Assembler::stf( FloatRegisterImpl::Width w, FloatRegister d, const Address& a, int offset) { 809 fmov(FloatRegisterImpl::S, s, a.as_float_register() ); 813 stf(FloatRegisterImpl [all...] |
H A D | methodHandles_sparc.cpp | 571 __ stf(FloatRegisterImpl::D, Ftos_d, d_save); 587 __ ldf(FloatRegisterImpl::D, d_save, Ftos_d);
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H A D | stubGenerator_sparc.cpp | 288 __ delayed()->stf(FloatRegisterImpl::S, F0, addr, G0); 292 __ delayed()->stf(FloatRegisterImpl::D, F0, addr, G0); 525 __ set((intptr_t)&zero, L0); __ ldf( FloatRegisterImpl::S, L0, 0, F0); 526 __ set((intptr_t)&one, L0); __ ldf( FloatRegisterImpl::S, L0, 0, F1); // 1.0 to F1 530 __ fadd( FloatRegisterImpl::S, F1, as_FloatRegister(i-1), as_FloatRegister(i)); 534 __ ftof( FloatRegisterImpl::S, FloatRegisterImpl::D, F2, F16 ); 535 __ ftof( FloatRegisterImpl::S, FloatRegisterImpl::D, F18, F18 ); 539 __ fadd( FloatRegisterImpl [all...] |
H A D | cppInterpreter_sparc.cpp | 89 __ stf(FloatRegisterImpl::D, F0, STATE(_native_fresult)); 100 __ ldf(FloatRegisterImpl::D, STATE(_native_fresult), F0); 216 __ stf(FloatRegisterImpl::S, F0, L1_scratch, 0); 223 __ stf(FloatRegisterImpl::D, F0, L1_scratch, -wordSize); 321 __ ldf(FloatRegisterImpl::S, O0, 0, F0); 332 __ ldf(FloatRegisterImpl::D, O0, 0, F0);
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H A D | c1_Runtime1_sparc.cpp | 201 __ stf(FloatRegisterImpl::S, r, SP, (sp_offset * BytesPerWord) + STACK_BIAS); 219 __ ldf(FloatRegisterImpl::S, SP, (fpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
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/openjdk7/hotspot/src/cpu/x86/vm/ |
H A D | register_x86.cpp | 36 2 * FloatRegisterImpl::number_of_registers; 51 const char* FloatRegisterImpl::name() const {
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H A D | c1_Defs_x86.hpp | 43 pd_nof_fpu_regs_frame_map = FloatRegisterImpl::number_of_registers, // number of registers used during code emission
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H A D | register_x86.hpp | 96 class FloatRegisterImpl; 97 typedef FloatRegisterImpl* FloatRegister; 104 class FloatRegisterImpl: public AbstractRegisterImpl { class in inherits:AbstractRegisterImpl 218 2 * FloatRegisterImpl::number_of_registers +
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H A D | vmreg_x86.inline.hpp | 37 inline VMReg FloatRegisterImpl::as_VMReg() {
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