0N/A/*
1879N/A * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
0N/A *
0N/A */
0N/A
1879N/A#ifndef CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP
1879N/A#define CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP
1879N/A
0N/Ainline VMReg RegisterImpl::as_VMReg() {
0N/A if( this==noreg ) return VMRegImpl::Bad();
0N/A return VMRegImpl::as_VMReg(encoding() << 1 );
0N/A}
0N/A
0N/Ainline VMReg FloatRegisterImpl::as_VMReg() { return VMRegImpl::as_VMReg( ConcreteRegisterImpl::max_gpr + encoding() ); }
0N/A
0N/A
0N/Ainline bool VMRegImpl::is_Register() { return value() >= 0 && value() < ConcreteRegisterImpl::max_gpr; }
0N/Ainline bool VMRegImpl::is_FloatRegister() { return value() >= ConcreteRegisterImpl::max_gpr &&
0N/A value() < ConcreteRegisterImpl::max_fpr; }
0N/Ainline Register VMRegImpl::as_Register() {
0N/A
0N/A assert( is_Register() && is_even(value()), "even-aligned GPR name" );
0N/A // Yuk
0N/A return ::as_Register(value()>>1);
0N/A}
0N/A
0N/Ainline FloatRegister VMRegImpl::as_FloatRegister() {
0N/A assert( is_FloatRegister(), "must be" );
0N/A // Yuk
0N/A return ::as_FloatRegister( value() - ConcreteRegisterImpl::max_gpr );
0N/A}
0N/A
0N/Ainline bool VMRegImpl::is_concrete() {
0N/A assert(is_reg(), "must be");
0N/A int v = value();
0N/A if ( v < ConcreteRegisterImpl::max_gpr ) {
0N/A return is_even(v);
0N/A }
0N/A // F0..F31
0N/A if ( v <= ConcreteRegisterImpl::max_gpr + 31) return true;
0N/A if ( v < ConcreteRegisterImpl::max_fpr) {
0N/A return is_even(v);
0N/A }
0N/A assert(false, "what register?");
0N/A return false;
0N/A}
1879N/A
1879N/A#endif // CPU_SPARC_VM_VMREG_SPARC_INLINE_HPP