/*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
*
*/
#ifndef CPU_X86_VM_REGISTER_X86_HPP
#define CPU_X86_VM_REGISTER_X86_HPP
#include "asm/register.hpp"
#include "vm_version_x86.hpp"
class VMRegImpl;
// Use Register as shortcut
class RegisterImpl;
// The implementation of integer registers for the ia32 architecture
}
public:
enum {
#ifndef AMD64
#else
number_of_registers = 16,
#endif // AMD64
};
// derived registers, offsets, and addresses
// construction
// accessors
bool has_byte_register() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_byte_registers; }
const char* name() const;
};
#ifdef AMD64
#endif // AMD64
// Use FloatRegister as shortcut
class FloatRegisterImpl;
}
// The implementation of floating point registers for the ia32 architecture
public:
enum {
};
// construction
// derived registers, offsets, and addresses
// accessors
const char* name() const;
};
// Use XMMRegister as shortcut
class XMMRegisterImpl;
// Use MMXRegister as shortcut
class MMXRegisterImpl;
}
}
// The implementation of XMM registers for the IA32 architecture
public:
enum {
#ifndef AMD64
#else
number_of_registers = 16
#endif // AMD64
};
// construction
// derived registers, offsets, and addresses
// accessors
int encoding() const { assert(is_valid(), err_msg("invalid register (%d)", (int)(intptr_t)this )); return (intptr_t)this; }
const char* name() const;
};
// The XMM registers, for P3 and up chips
#ifdef AMD64
#endif // AMD64
// Only used by the 32bit stubGenerator. These can't be described by vmreg and hence
// can't be described in oopMaps and therefore can't be used by the compilers (at least
// were deopt might wan't to see them).
// The MMX registers, for P3 and up chips
// Need to know the total number of registers of all sorts for SharedInfo.
// Define a class that exports it.
public:
enum {
// A big enough number for C2: all the registers plus flags
// This number must be large enough to cover REG_COUNT (defined by c2) registers.
// There is no requirement that any ordering here matches any ordering c2 gives
// it's optoregs.
#ifdef AMD64
#endif // AMD64
1 // eflags
};
static const int max_gpr;
static const int max_fpr;
static const int max_xmm;
};
#endif // CPU_X86_VM_REGISTER_X86_HPP