Searched refs:read_reg (Results 1 - 23 of 23) sorted by relevance

/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_phy.c86 phy->ops.read_reg = e1000_null_read_reg;
227 if (!phy->ops.read_reg)
231 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
237 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);
1014 ret_val = hw->phy.ops.read_reg(hw, PHY_1000T_CTRL, &phy_data);
1064 ret_val = hw->phy.ops.read_reg(hw, I82577_CFG_REG, &phy_data);
1078 ret_val = hw->phy.ops.read_reg(hw, I82577_PHY_CTRL_2, &phy_data);
1122 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1195 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
1240 ret_val = phy->ops.read_reg(h
[all...]
H A De1000_82541.c103 phy->ops.read_reg = e1000_read_phy_reg_igp;
391 ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO,
466 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_EXP, &data);
473 ret_val = phy->ops.read_reg(hw, PHY_LP_ABILITY, &data);
705 ret_val = phy->ops.read_reg(hw,
729 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);
735 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS,
762 ret_val = phy->ops.read_reg(hw, 0x2F5B,
779 ret_val = phy->ops.read_reg(hw,
820 ret_val = phy->ops.read_reg(h
[all...]
H A De1000_80003es2lan.c121 phy->ops.read_reg = e1000_read_phy_reg_gg82563_80003es2lan;
670 if (!(hw->phy.ops.read_reg))
676 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
687 ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data);
726 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
765 if (!(hw->phy.ops.read_reg))
768 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_DSP_DISTANCE, &phy_data);
1050 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, &data);
1069 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL, &data);
1126 ret_val = hw->phy.ops.read_reg(h
[all...]
H A De1000_82571.c126 phy->ops.read_reg = e1000_read_phy_reg_igp;
139 phy->ops.read_reg = e1000_read_phy_reg_m88;
155 phy->ops.read_reg = e1000_read_phy_reg_bm2;
487 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
493 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);
994 if (!(phy->ops.read_reg))
997 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);
1009 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1028 ret_val = phy->ops.read_reg(hw,
1041 ret_val = phy->ops.read_reg(h
[all...]
H A De1000_82540.c82 phy->ops.read_reg = e1000_read_phy_reg_m88;
430 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL,
539 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_PAGE_SELECT,
548 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
563 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
H A De1000_ich8lan.c464 phy->ops.read_reg = e1000_read_phy_reg_hv;
555 phy->ops.read_reg = e1000_read_phy_reg_igp;
570 phy->ops.read_reg = e1000_read_phy_reg_bm;
610 phy->ops.read_reg = e1000_read_phy_reg_bm;
1054 ret_val = hw->phy.ops.read_reg(hw, I217_INBAND_CTRL, &reg);
1763 hw->phy.ops.read_reg(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg);
2603 ret_val = hw->phy.ops.read_reg(hw, HV_KMRN_MODE_CTRL, &data);
2777 hw->phy.ops.read_reg(hw, PHY_REG(769, 20), &phy_reg);
2843 hw->phy.ops.read_reg(hw, PHY_REG(769, 23), &data);
2849 hw->phy.ops.read_reg(h
[all...]
H A De1000_82575.c206 phy->ops.read_reg = e1000_read_phy_reg_sgmii_82575;
213 phy->ops.read_reg = e1000_read_phy_reg_82580;
218 phy->ops.read_reg = e1000_read_phy_reg_gs40g;
222 phy->ops.read_reg = e1000_read_phy_reg_igp;
263 ret_val = phy->ops.read_reg(hw,
819 if (!(hw->phy.ops.read_reg))
822 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);
834 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
852 ret_val = phy->ops.read_reg(hw,
865 ret_val = phy->ops.read_reg(h
[all...]
H A De1000_82543.c110 phy->ops.read_reg = (hw->mac.type == e1000_82543)
802 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
806 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
1411 if (!(hw->phy.ops.read_reg))
1423 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
H A De1000_api.c984 if (hw->phy.ops.read_reg)
985 return hw->phy.ops.read_reg(hw, offset, data);
H A De1000_mac.c1389 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
1392 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
1407 ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,
1411 ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,
H A De1000_i210.c777 ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data);
H A De1000_hw.h747 s32 (*read_reg)(struct e1000_hw *, u32, u16 *); member in struct:e1000_phy_operations
/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_x550.c646 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_EEE_ADVT,
684 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_EEE_ADVT,
1249 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,
1258 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG,
1268 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_ALARM_1,
1282 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_FAULT_MSG,
1298 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,
1306 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2,
1338 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PMA_TX_VEN_LASI_INT_MASK,
1353 status = hw->phy.ops.read_reg(h
[all...]
H A Dixgbe_phy.c325 phy->ops.read_reg = ixgbe_read_phy_reg_generic;
384 hw->phy.ops.read_reg(hw,
459 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH,
481 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH,
487 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_LOW,
577 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL,
820 hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,
836 hw->phy.ops.read_reg(hw,
854 hw->phy.ops.read_reg(hw,
873 hw->phy.ops.read_reg(h
[all...]
H A Dixgbe_82598.c614 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,
658 hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg);
659 hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg);
660 hw->phy.ops.read_reg(hw, 0xC00C, IXGBE_TWINAX_DEV,
672 hw->phy.ops.read_reg(hw, 0xC79F,
675 hw->phy.ops.read_reg(hw, 0xC00C,
1240 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,
H A Dixgbe_common.c261 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,
579 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL,
581 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH,
583 hw->phy.ops.read_reg(hw, IXGBE_LDPCECL,
585 hw->phy.ops.read_reg(hw, IXGBE_LDPCECH,
2985 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,
2988 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_LP,
H A Dixgbe_x540.c327 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,
H A Dixgbe_api.c536 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
H A Dixgbe_82599.c2178 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,
H A Dixgbe_type.h3753 s32 (*read_reg)(struct ixgbe_hw *, u32, u32, u16 *); member in struct:ixgbe_phy_operations
/illumos-gate/usr/src/uts/common/io/audio/drv/audiols/
H A Daudiols.c175 read_reg(audigyls_dev_t *dev, int reg) function
255 tmp = read_reg(dev, I2C_A) & ~0x6fe;
262 tmp = read_reg(dev, I2C_A);
285 tmp = read_reg(dev, SPI);
292 tmp = read_reg(dev, SPI);
355 tmp = read_reg(dev, SA);
366 tmp = read_reg(dev, SA);
387 tmp = read_reg(dev, SA);
395 tmp = read_reg(dev, SA);
/illumos-gate/usr/src/uts/common/io/e1000g/
H A De1000g_workarounds.c237 ret_val = hw->phy.ops.read_reg(hw,
/illumos-gate/usr/src/uts/common/io/audio/drv/audiop16x/
H A Daudiop16x.c132 read_reg(p16x_dev_t *dev, int reg, int chn) function
319 offset = read_reg(dev, CPFA, 0);
321 offset = read_reg(dev, CRFA, 0);

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