/******************************************************************************
Copyright (c) 2001-2015, Intel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
3. Neither the name of the Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
******************************************************************************/
/*$FreeBSD$*/
#include "ixgbe_x550.h"
#include "ixgbe_x540.h"
#include "ixgbe_type.h"
#include "ixgbe_api.h"
#include "ixgbe_common.h"
#include "ixgbe_phy.h"
/**
* ixgbe_init_ops_X550 - Inits func ptrs and MAC type
* @hw: pointer to hardware structure
*
* Initialize the function pointers and assign the MAC type for X550.
* Does not touch the hardware.
**/
{
DEBUGFUNC("ixgbe_init_ops_X550");
}
return ret_val;
}
/**
* ixgbe_read_cs4227 - Read CS4227 register
* @hw: pointer to hardware structure
* @reg: register number to write
* @value: pointer to receive value read
*
* Returns status code
**/
{
}
/**
* ixgbe_write_cs4227 - Write CS4227 register
* @hw: pointer to hardware structure
* @reg: register number to write
* @value: value to write to register
*
* Returns status code
**/
{
}
/**
* ixgbe_read_pe - Read register from port expander
* @hw: pointer to hardware structure
* @reg: register number to read
* @value: pointer to receive read value
*
* Returns status code
**/
{
if (status != IXGBE_SUCCESS)
"port expander access failed with %d\n", status);
return status;
}
/**
* ixgbe_write_pe - Write register to port expander
* @hw: pointer to hardware structure
* @reg: register number to write
* @value: value to write
*
* Returns status code
**/
{
if (status != IXGBE_SUCCESS)
"port expander access failed with %d\n", status);
return status;
}
/**
* ixgbe_reset_cs4227 - Reset CS4227 using port expander
* @hw: pointer to hardware structure
*
* This function assumes that the caller has acquired the proper semaphore.
* Returns error code
**/
{
/* Trigger hard reset. */
if (status != IXGBE_SUCCESS)
return status;
reg |= IXGBE_PE_BIT1;
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
reg &= ~IXGBE_PE_BIT1;
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
reg &= ~IXGBE_PE_BIT1;
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
reg |= IXGBE_PE_BIT1;
if (status != IXGBE_SUCCESS)
return status;
/* Wait for the reset to complete. */
&value);
if (status == IXGBE_SUCCESS &&
break;
}
if (retry == IXGBE_CS4227_RETRIES) {
"CS4227 reset did not complete.");
return IXGBE_ERR_PHY;
}
if (status != IXGBE_SUCCESS ||
!(value & IXGBE_CS4227_EEPROM_LOAD_OK)) {
"CS4227 EEPROM did not load successfully.");
return IXGBE_ERR_PHY;
}
return IXGBE_SUCCESS;
}
/**
* ixgbe_check_cs4227 - Check CS4227 and reset as needed
* @hw: pointer to hardware structure
**/
{
if (status != IXGBE_SUCCESS) {
"semaphore failed with %d", status);
continue;
}
/* Get status of reset flow. */
if (status == IXGBE_SUCCESS &&
goto out;
if (status != IXGBE_SUCCESS ||
break;
/* Reset is pending. Wait and check again. */
}
/* If still pending, assume other instance failed. */
if (retry == IXGBE_CS4227_RETRIES) {
if (status != IXGBE_SUCCESS) {
"semaphore failed with %d", status);
return;
}
}
/* Reset the CS4227. */
if (status != IXGBE_SUCCESS) {
"CS4227 reset failed: %d", status);
goto out;
}
/* Reset takes so long, temporarily release semaphore in case the
* other driver instance is waiting for the reset indication.
*/
msec_delay(10);
if (status != IXGBE_SUCCESS) {
"semaphore failed with %d", status);
return;
}
/* Record completion for next time. */
out:
}
/**
* ixgbe_setup_mux_ctl - Setup ESDP register for I2C mux control
* @hw: pointer to hardware structure
**/
{
}
}
/**
* ixgbe_identify_phy_x550em - Get PHY type based on device id
* @hw: pointer to hardware structure
*
* Returns error code
*/
{
/* set up for CS4227 usage */
return ixgbe_identify_module_generic(hw);
break;
break;
case IXGBE_DEV_ID_X550EM_X_KR:
break;
return ixgbe_identify_phy_generic(hw);
default:
break;
}
return IXGBE_SUCCESS;
}
{
return IXGBE_NOT_IMPLEMENTED;
}
{
return IXGBE_NOT_IMPLEMENTED;
}
/**
* ixgbe_init_ops_X550EM - Inits func ptrs and MAC type
* @hw: pointer to hardware structure
*
* Initialize the function pointers and for MAC type X550EM.
* Does not touch the hardware.
**/
{
DEBUGFUNC("ixgbe_init_ops_X550EM");
/* Similar to X550 so start there. */
/* Since this function eventually calls
* ixgbe_init_ops_540 by design, we are setting
* the pointers to NULL explicitly here to overwrite
* the values being set in the x540 function.
*/
/* FCOE not supported in x550EM */
/* IPsec not supported in x550EM */
/* AUTOC register is not present in x550EM. */
/* X550EM bus type is internal*/
}
else
/* PHY */
/* EEPROM */
return ret_val;
}
/**
* ixgbe_dmac_config_X550
* @hw: pointer to hardware structure
*
* Configure DMA coalescing. If enabling dmac, dmac is activated.
* When disabling dmac, dmac enable dmac bit is cleared.
**/
{
DEBUGFUNC("ixgbe_dmac_config_X550");
/* Disable DMA coalescing before configuring */
reg &= ~IXGBE_DMACR_DMAC_EN;
/* Disable DMA Coalescing if the watchdog timer is 0 */
goto out;
/* Configure DMA Coalescing Control Register */
/* Set the watchdog timer in units of 40.96 usec */
/* If fcoe is enabled, set high priority traffic class */
}
/* Enable DMA coalescing after configuration */
out:
return IXGBE_SUCCESS;
}
/**
* ixgbe_dmac_config_tcs_X550
* @hw: pointer to hardware structure
*
* Configure DMA coalescing threshold per TC. The dmac enable bit must
* be cleared before configuring.
**/
{
DEBUGFUNC("ixgbe_dmac_config_tcs_X550");
/* Configure DMA coalescing enabled */
break;
break;
default:
break;
}
IXGBE_MHADD_MFS_SHIFT) / 1024);
/* Set the per Rx packet buffer receive threshold */
/* Get Rx PB size */
/* Calculate receive buffer threshold in kilobytes */
if (rx_pb_size > pb_headroom)
else
rx_pb_size = 0;
/* Minimum of MFS shall be set for DMCTH */
}
}
return IXGBE_SUCCESS;
}
/**
* ixgbe_dmac_update_tcs_X550
* @hw: pointer to hardware structure
*
* Disables dmac, updates per TC settings, and then enables dmac.
**/
{
DEBUGFUNC("ixgbe_dmac_update_tcs_X550");
/* Disable DMA coalescing before configuring */
reg &= ~IXGBE_DMACR_DMAC_EN;
/* Enable DMA coalescing after configuration */
return IXGBE_SUCCESS;
}
/**
* ixgbe_init_eeprom_params_X550 - Initialize EEPROM params
* @hw: pointer to hardware structure
*
* Initializes the EEPROM parameters ixgbe_eeprom_info within the
* ixgbe_hw struct in order to set up EEPROM access.
**/
{
DEBUGFUNC("ixgbe_init_eeprom_params_X550");
DEBUGOUT2("Eeprom params: type = %d, size = %d\n",
}
return IXGBE_SUCCESS;
}
/**
* @hw: pointer to the HW structure
* @enable_eee: boolean flag to enable EEE
*
* Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
* are modified.
*
**/
{
DEBUGFUNC("ixgbe_setup_eee_X550");
/* Enable or disable EEE per flag */
if (enable_eee) {
/* Advertise EEE capability */
/* Not supported on first revision. */
if (!(fuse & IXGBE_FUSES0_REV1))
return IXGBE_SUCCESS;
if (status != IXGBE_SUCCESS)
return status;
/* Don't advertise FEC capability when EEE enabled. */
if (status != IXGBE_SUCCESS)
return status;
}
} else {
/* Disable advertised EEE capability */
if (status != IXGBE_SUCCESS)
return status;
/* Advertise FEC capability when EEE is disabled. */
if (status != IXGBE_SUCCESS)
return status;
}
}
return IXGBE_SUCCESS;
}
/**
* @hw: pointer to hardware structure
* @enable: enable or disable source address pruning
* @pool: Rx pool to set source address pruning for
**/
unsigned int pool)
{
/* max rx pool is 63 */
if (pool > 63)
return;
if (enable)
else
}
/**
* @hw: pointer to hardware structure
* @enable: enable or disable switch for Ethertype anti-spoofing
* @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
*
**/
{
DEBUGFUNC("ixgbe_set_ethertype_anti_spoofing_X550");
if (enable)
else
}
/**
* ixgbe_iosf_wait - Wait for IOSF command completion
* @hw: pointer to hardware structure
* @ctrl: pointer to location to receive final IOSF control value
*
* Returns failing status on timeout
*
* Note: ctrl can be NULL if the IOSF control register value is not needed
**/
{
/* Check every 10 usec to see if the address cycle completed.
* The SB IOSF BUSY bit will clear when the operation is
* complete
*/
for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
if ((command & IXGBE_SB_IOSF_CTRL_BUSY) == 0)
break;
usec_delay(10);
}
if (ctrl)
if (i == IXGBE_MDIO_COMMAND_TIMEOUT) {
return IXGBE_ERR_PHY;
}
return IXGBE_SUCCESS;
}
/**
* ixgbe_write_iosf_sb_reg_x550 - Writes a value to specified register of the IOSF
* device
* @hw: pointer to hardware structure
* @reg_addr: 32 bit PHY register to write
* @device_type: 3 bit device type
* @data: Data to write to the register
**/
{
if (ret != IXGBE_SUCCESS)
return ret;
if (ret != IXGBE_SUCCESS)
goto out;
/* Write IOSF control register */
/* Write IOSF data register */
if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) {
"Failed to write, error %x\n", error);
ret = IXGBE_ERR_PHY;
}
out:
return ret;
}
/**
* ixgbe_read_iosf_sb_reg_x550 - Writes a value to specified register of the IOSF
* device
* @hw: pointer to hardware structure
* @reg_addr: 32 bit PHY register to write
* @device_type: 3 bit device type
* @phy_data: Pointer to read data from the register
**/
{
if (ret != IXGBE_SUCCESS)
return ret;
if (ret != IXGBE_SUCCESS)
goto out;
/* Write IOSF control register */
if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) {
"Failed to read, error %x\n", error);
ret = IXGBE_ERR_PHY;
}
if (ret == IXGBE_SUCCESS)
out:
return ret;
}
/**
* ixgbe_disable_mdd_X550
* @hw: pointer to hardware structure
*
* Disable malicious driver detection
**/
{
DEBUGFUNC("ixgbe_disable_mdd_X550");
/* Disable MDD for TX DMA and interrupt */
/* Disable MDD for RX and interrupt */
}
/**
* ixgbe_enable_mdd_X550
* @hw: pointer to hardware structure
*
* Enable malicious driver detection
**/
{
DEBUGFUNC("ixgbe_enable_mdd_X550");
/* Enable MDD for TX DMA and interrupt */
/* Enable MDD for RX and interrupt */
}
/**
* ixgbe_restore_mdd_vf_X550
* @hw: pointer to hardware structure
* @vf: vf index
*
* Restore VF that was disabled during malicious driver detection event
**/
{
DEBUGFUNC("ixgbe_restore_mdd_vf_X550");
/* Map VF to queues */
switch (reg & IXGBE_MRQC_MRQE_MASK) {
case IXGBE_MRQC_VMDQRT8TCEN:
bitmask = 0x000000FF;
break;
case IXGBE_MRQC_VMDQRSS32EN:
case IXGBE_MRQC_VMDQRT4TCEN:
bitmask = 0x0000000F;
break;
default: /* 64 VFs / pools */
num_qs = 2;
bitmask = 0x00000003;
break;
}
/* Release vf's queues by clearing WQBR_TX and WQBR_RX (RW1C) */
reg = 0;
}
/**
* ixgbe_mdd_event_X550
* @hw: pointer to hardware structure
* @vf_bitmap: vf bitmap of malicious vfs
*
* Handle malicious driver detection event.
**/
{
DEBUGFUNC("ixgbe_mdd_event_X550");
/* figure out pool size for mapping to vf's */
switch (reg & IXGBE_MRQC_MRQE_MASK) {
case IXGBE_MRQC_VMDQRT8TCEN:
break;
case IXGBE_MRQC_VMDQRSS32EN:
case IXGBE_MRQC_VMDQRT4TCEN:
break;
default:
break;
}
/* Read WQBR_TX and WQBR_RX and check for malicious queues */
for (i = 0; i < 4; i++) {
if (!wqbr)
continue;
/* Get malicious queue */
for (j = 0; j < 32 && wqbr; j++) {
if (!(wqbr & (1 << j)))
continue;
/* Get queue from bitmask */
q = j + (i * 32);
/* Map queue to vf */
/* Set vf bit in vf_bitmap */
wqbr &= ~(1 << j);
}
}
}
/**
* ixgbe_get_media_type_X550em - Get media type
* @hw: pointer to hardware structure
*
* Returns the media type (fiber, copper, backplane)
*/
{
DEBUGFUNC("ixgbe_get_media_type_X550em");
/* Detect if there is a copper PHY attached. */
case IXGBE_DEV_ID_X550EM_X_KR:
break;
break;
break;
default:
break;
}
return media_type;
}
/**
* ixgbe_supported_sfp_modules_X550em - Check if SFP module type is supported
* @hw: pointer to hardware structure
* @linear: TRUE if SFP module is linear
*/
{
DEBUGFUNC("ixgbe_supported_sfp_modules_X550em");
return IXGBE_ERR_SFP_NOT_PRESENT;
break;
break;
case ixgbe_sfp_type_unknown:
default:
return IXGBE_ERR_SFP_NOT_SUPPORTED;
}
return IXGBE_SUCCESS;
}
/**
* ixgbe_identify_sfp_module_X550em - Identifies SFP modules
* @hw: pointer to hardware structure
*
* Searches for and identifies the SFP module and assigns appropriate PHY type.
**/
{
bool linear;
DEBUGFUNC("ixgbe_identify_sfp_module_X550em");
if (status != IXGBE_SUCCESS)
return status;
/* Check if SFP module is supported */
return status;
}
/**
* ixgbe_setup_sfp_modules_X550em - Setup MAC link ops
* @hw: pointer to hardware structure
*/
{
bool linear;
DEBUGFUNC("ixgbe_setup_sfp_modules_X550em");
/* Check if SFP module is supported */
if (status != IXGBE_SUCCESS)
return status;
return IXGBE_SUCCESS;
}
/**
* ixgbe_init_mac_link_ops_X550em - init mac link function pointers
* @hw: pointer to hardware structure
*/
{
DEBUGFUNC("ixgbe_init_mac_link_ops_X550em");
case ixgbe_media_type_fiber:
/* CS4227 does not support autoneg, so disable the laser control
* functions for SFP+ fiber
*/
break;
case ixgbe_media_type_copper:
break;
default:
break;
}
}
/**
* ixgbe_get_link_capabilities_x550em - Determines link capabilities
* @hw: pointer to hardware structure
* @speed: pointer to link speed
* @autoneg: TRUE when autoneg or autotry is enabled
*/
bool *autoneg)
{
DEBUGFUNC("ixgbe_get_link_capabilities_X550em");
/* SFP */
/* CS4227 SFP must not enable auto-negotiation */
/* Check if 1G SFP module. */
return IXGBE_SUCCESS;
}
/* Link capabilities are based on SFP */
else
} else {
}
return IXGBE_SUCCESS;
}
/**
* ixgbe_get_lasi_ext_t_x550em - Determime external Base T PHY interrupt cause
* @hw: pointer to hardware structure
* @lsc: pointer to boolean flag which indicates whether external Base T
* PHY interrupt is lsc
*
* Determime if external Base T PHY interrupt cause is high temperature
* failure alarm or link status change.
*
* Return IXGBE_ERR_OVERTEMP if interrupt is high temperature
* failure alarm, else return PHY access status.
*/
{
/* Vendor alarm triggered */
®);
if (status != IXGBE_SUCCESS ||
return status;
/* Vendor Auto-Neg alarm triggered or Global alarm 1 triggered */
®);
if (status != IXGBE_SUCCESS ||
return status;
/* Global alarm triggered */
®);
if (status != IXGBE_SUCCESS)
return status;
/* If high temperature failure, then return over temp error and exit */
if (reg & IXGBE_MDIO_GLOBAL_ALM_1_HI_TMP_FAIL) {
/* power down the PHY in case the PHY FW didn't already */
return IXGBE_ERR_OVERTEMP;
} else if (reg & IXGBE_MDIO_GLOBAL_ALM_1_DEV_FAULT) {
/* device fault alarm triggered */
®);
if (status != IXGBE_SUCCESS)
return status;
/* if device fault was due to high temp alarm handle and exit */
if (reg == IXGBE_MDIO_GLOBAL_FAULT_MSG_HI_TMP) {
/* power down the PHY in case the PHY FW didn't */
return IXGBE_ERR_OVERTEMP;
}
}
/* Vendor alarm 2 triggered */
if (status != IXGBE_SUCCESS ||
return status;
/* link connect/disconnect event occurred */
if (status != IXGBE_SUCCESS)
return status;
/* Indicate LSC */
if (reg & IXGBE_MDIO_AUTO_NEG_VEN_LSC)
return IXGBE_SUCCESS;
}
/**
* ixgbe_enable_lasi_ext_t_x550em - Enable external Base T PHY interrupts
* @hw: pointer to hardware structure
*
* Enable link status change and temperature failure alarm for the external
* Base T PHY
*
* Returns PHY access status
*/
{
bool lsc;
/* Clear interrupt flags */
/* Enable link status change alarm */
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
/* Enables high temperature failure alarm */
®);
if (status != IXGBE_SUCCESS)
return status;
reg);
if (status != IXGBE_SUCCESS)
return status;
/* Enable vendor Auto-Neg alarm and Global Interrupt Mask 1 alarm */
®);
if (status != IXGBE_SUCCESS)
return status;
reg);
if (status != IXGBE_SUCCESS)
return status;
/* Enable chip-wide vendor alarm */
®);
if (status != IXGBE_SUCCESS)
return status;
reg);
return status;
}
/**
* ixgbe_setup_kr_speed_x550em - Configure the KR PHY for link speed.
* @hw: pointer to hardware structure
* @speed: link speed
*
* Configures the integrated KR PHY.
**/
{
if (status)
return status;
/* Advertise 10G support. */
if (speed & IXGBE_LINK_SPEED_10GB_FULL)
/* Advertise 1G support. */
if (speed & IXGBE_LINK_SPEED_1GB_FULL)
/* Restart auto-negotiation. */
return status;
}
/**
* @hw: pointer to hardware structure
*
* Initialize any function pointers that were not able to be
* not known. Perform the SFP init if necessary.
*/
{
DEBUGFUNC("ixgbe_init_phy_ops_X550em");
/* Save NW management interface connected on board. This is used
* to determine internal PHY mode.
*/
}
}
/* Identify the PHY or SFP module */
if (ret_val == IXGBE_ERR_SFP_NOT_SUPPORTED)
return ret_val;
/* Setup function pointers based on detected hardware */
/* Set functions pointers based on phy type */
case ixgbe_phy_x550em_kx4:
break;
case ixgbe_phy_x550em_kr:
break;
case ixgbe_phy_x550em_ext_t:
/* Save NW management interface connected on board. This is used
* to determine internal PHY mode
*/
/* If internal link mode is XFI, then setup iXFI internal link,
* else setup KR now.
*/
} else {
}
/* setup SW LPLU only for first revision */
IXGBE_FUSES0_GROUP(0))))
break;
default:
break;
}
return ret_val;
}
/**
* ixgbe_reset_hw_X550em - Perform hardware reset
* @hw: pointer to hardware structure
*
* Resets the hardware by resetting the transmit and receive units, masks
* and clears all interrupts, perform a PHY reset, and perform a link (MAC)
* reset.
*/
{
u32 i;
DEBUGFUNC("ixgbe_reset_hw_X550em");
if (status != IXGBE_SUCCESS)
return status;
/* flush pending Tx transactions */
/* Config MDIO clock speed before the first MDIO PHY access */
}
/* PHY ops must be identified and initialized prior to reset */
if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)
return status;
/* start the external PHY */
if (status)
return status;
}
/* Setup SFP module if there is one present. */
}
if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)
return status;
/* Reset PHY */
/* Issue global reset to the MAC. Needs to be SW reset if link is up.
* If link reset is used when link is up, it might reset the PHY when
* mng is using it. If link is down or the flag to force full link
* reset is set, then perform link reset.
*/
if (!hw->force_full_reset) {
if (link_up)
}
/* Poll for reset bit to self-clear meaning reset is complete */
for (i = 0; i < 10; i++) {
usec_delay(1);
if (!(ctrl & IXGBE_CTRL_RST_MASK))
break;
}
if (ctrl & IXGBE_CTRL_RST_MASK) {
DEBUGOUT("Reset polling failed to complete.\n");
}
msec_delay(50);
/* Double resets are required for recovery from certain error
* conditions. Between resets, it is necessary to stall to
* allow time for any pending HW events to complete.
*/
goto mac_reset_top;
}
/* Store the permanent mac address */
/* Store MAC address from RAR0, clear receive address registers, and
* clear the multicast table. Also reset num_rar_entries to 128,
* since we modify this value when programming the SAN MAC address.
*/
return status;
}
/**
* ixgbe_init_ext_t_x550em - Start (unstall) the external Base T PHY.
* @hw: pointer to hardware structure
*/
{
®);
if (status != IXGBE_SUCCESS)
return status;
/* If PHY FW reset completed bit is set then this is the first
* SW instance after a power on so the PHY FW must be un-stalled.
*/
®);
if (status != IXGBE_SUCCESS)
return status;
reg);
if (status != IXGBE_SUCCESS)
return status;
}
return status;
}
/**
* ixgbe_setup_kr_x550em - Configure the KR PHY.
* @hw: pointer to hardware structure
*
* Configures the integrated KR PHY.
**/
{
}
/**
* @hw: pointer to hardware structure
*
* Configure the external PHY and the integrated KR PHY for SFP support.
**/
bool autoneg_wait_to_complete)
{
/* Check if SFP module is supported and linear */
/* If no SFP module present, then return success. Return success since
* there is no reason to configure CS4227 and SFP not present error is
* not excepted in the setup MAC link flow.
*/
if (ret_val == IXGBE_ERR_SFP_NOT_PRESENT)
return IXGBE_SUCCESS;
if (ret_val != IXGBE_SUCCESS)
return ret_val;
/* Configure CS4227 LINE side to 10G SR. */
reg_val);
reg_val);
/* Configure CS4227 for HOST connection rate then type. */
reg_val);
if (setup_linear)
else
reg_val);
/* Setup XFI internal link. */
} else {
/* Configure CS4227 LINE side to proper mode. */
if (setup_linear)
else
reg_val);
}
return ret_val;
}
/**
* ixgbe_setup_ixfi_x550em - Configure the KR PHY for iXFI mode.
* @hw: pointer to hardware structure
* @speed: the link speed to force
*
* Configures the integrated KR PHY to use iXFI mode. Used to connect an
* internal and external PHY at a specific speed, without autonegotiation.
**/
{
/* Disable AN and force speed to 10G Serial. */
if (status != IXGBE_SUCCESS)
return status;
/* Select forced link speed for internal PHY. */
switch (*speed) {
break;
break;
default:
/* Other link speeds are not supported by internal KR PHY. */
return IXGBE_ERR_LINK_SETUP;
}
if (status != IXGBE_SUCCESS)
return status;
/* Disable training protocol FSM. */
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
/* Disable Flex from training TXFFE. */
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
/* Enable override for coefficients. */
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
/* Toggle port SW reset by AN reset. */
if (status != IXGBE_SUCCESS)
return status;
return status;
}
/**
* ixgbe_ext_phy_t_x550em_get_link - Get ext phy link status
* @hw: address of hardware structure
* @link_up: address of boolean to indicate link status
*
* Returns error code if unable to get link status.
*/
{
/* read this twice back to back to indicate current status */
if (ret != IXGBE_SUCCESS)
return ret;
if (ret != IXGBE_SUCCESS)
return ret;
return IXGBE_SUCCESS;
}
/**
* ixgbe_setup_internal_phy_t_x550em - Configure KR PHY to X557 link
* @hw: point to hardware structure
*
* Configures the link between the integrated KR PHY and the external X557 PHY
* The driver will call this function when it gets a link status change
* interrupt from the X557 PHY. This function configures the link speed
* between the PHYs to match the link speed of the BASE-T link.
*
* A return of a non-zero value indicates an error, and the base driver should
* not report link up.
*/
{
bool link_up;
return IXGBE_ERR_CONFIG;
/* If link is not up, then there is no setup necessary so return */
if (status != IXGBE_SUCCESS)
return status;
if (!link_up)
return IXGBE_SUCCESS;
&speed);
if (status != IXGBE_SUCCESS)
return status;
/* If link is not still up, then no setup is necessary so return */
if (status != IXGBE_SUCCESS)
return status;
if (!link_up)
return IXGBE_SUCCESS;
/* clear everything but the speed and duplex bits */
switch (speed) {
break;
break;
default:
/* Internal PHY does not support anything else */
return IXGBE_ERR_INVALID_LINK_SETTINGS;
}
}
/**
* ixgbe_setup_phy_loopback_x550em - Configure the KR PHY for loopback.
* @hw: pointer to hardware structure
*
* Configures the integrated KR PHY to use internal loopback mode.
**/
{
/* Disable AN and force speed to 10G Serial. */
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
/* Set near-end loopback clocks. */
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
/* Set loopback enable. */
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
/* Training bypass. */
if (status != IXGBE_SUCCESS)
return status;
return status;
}
/**
* ixgbe_read_ee_hostif_X550 - Read EEPROM word using a host interface command
* assuming that the semaphore is already obtained.
* @hw: pointer to hardware structure
* @offset: offset of word in the EEPROM to read
* @data: word read from the EEPROM
*
* Reads a 16 bit word from the EEPROM using the hostif.
**/
{
DEBUGFUNC("ixgbe_read_ee_hostif_data_X550");
/* convert offset from words to bytes */
/* one word */
sizeof(buffer),
if (status)
return status;
return 0;
}
/**
* ixgbe_read_ee_hostif_X550 - Read EEPROM word using a host interface command
* @hw: pointer to hardware structure
* @offset: offset of word in the EEPROM to read
* @data: word read from the EEPROM
*
* Reads a 16 bit word from the EEPROM using the hostif.
**/
{
DEBUGFUNC("ixgbe_read_ee_hostif_X550");
} else {
}
return status;
}
/**
* ixgbe_read_ee_hostif_buffer_X550- Read EEPROM word(s) using hostif
* @hw: pointer to hardware structure
* @offset: offset of word in the EEPROM to read
* @words: number of words
* @data: word(s) read from the EEPROM
*
* Reads a 16 bit word(s) from the EEPROM using the hostif.
**/
{
u32 i;
DEBUGFUNC("ixgbe_read_ee_hostif_buffer_X550");
/* Take semaphore for the entire operation. */
if (status) {
DEBUGOUT("EEPROM read buffer - semaphore failed\n");
return status;
}
while (words) {
else
/* convert offset from words to bytes */
sizeof(buffer),
FALSE);
if (status) {
DEBUGOUT("Host interface command failed\n");
goto out;
}
for (i = 0; i < words_to_read; i++) {
2 * i;
current_word++;
i++;
if (i < words_to_read) {
value >>= 16;
current_word++;
}
}
words -= words_to_read;
}
out:
return status;
}
/**
* ixgbe_write_ee_hostif_X550 - Write EEPROM word using hostif
* @hw: pointer to hardware structure
* @offset: offset of word in the EEPROM to write
* @data: word write to the EEPROM
*
* Write a 16 bit word to the EEPROM using the hostif.
**/
{
DEBUGFUNC("ixgbe_write_ee_hostif_data_X550");
/* one word */
sizeof(buffer),
return status;
}
/**
* ixgbe_write_ee_hostif_X550 - Write EEPROM word using hostif
* @hw: pointer to hardware structure
* @offset: offset of word in the EEPROM to write
* @data: word write to the EEPROM
*
* Write a 16 bit word to the EEPROM using the hostif.
**/
{
DEBUGFUNC("ixgbe_write_ee_hostif_X550");
} else {
DEBUGOUT("write ee hostif failed to get semaphore");
}
return status;
}
/**
* ixgbe_write_ee_hostif_buffer_X550 - Write EEPROM word(s) using hostif
* @hw: pointer to hardware structure
* @offset: offset of word in the EEPROM to write
* @words: number of words
* @data: word(s) write to the EEPROM
*
* Write a 16 bit word(s) to the EEPROM using the hostif.
**/
{
u32 i = 0;
DEBUGFUNC("ixgbe_write_ee_hostif_buffer_X550");
/* Take semaphore for the entire operation. */
if (status != IXGBE_SUCCESS) {
DEBUGOUT("EEPROM write buffer - semaphore failed\n");
goto out;
}
for (i = 0; i < words; i++) {
data[i]);
if (status != IXGBE_SUCCESS) {
DEBUGOUT("Eeprom buffered write failed\n");
break;
}
}
out:
return status;
}
/**
* ixgbe_checksum_ptr_x550 - Checksum one pointer region
* @hw: pointer to hardware structure
* @ptr: pointer offset in eeprom
* @size: size of section pointed by ptr, if 0 first word will be used as size
* @csum: address of checksum to update
*
* Returns error status for any failure
*/
{
/* Read a chunk at the pointer location */
if (!buffer) {
if (status) {
DEBUGOUT("Failed to read EEPROM image\n");
return status;
}
local_buffer = buf;
} else {
if (buffer_size < ptr)
return IXGBE_ERR_PARAM;
}
if (size) {
start = 0;
} else {
start = 1;
length = local_buffer[0];
/* Skip pointer section if length is invalid. */
return IXGBE_SUCCESS;
}
return IXGBE_ERR_PARAM;
i = 0;
/* Read a chunk at the pointer location */
if (status) {
DEBUGOUT("Failed to read EEPROM image\n");
return status;
}
}
*csum += local_buffer[i];
}
return IXGBE_SUCCESS;
}
/**
* ixgbe_calc_checksum_X550 - Calculates and returns the checksum
* @hw: pointer to hardware structure
* @buffer: pointer to buffer containing calculated checksum
* @buffer_size: size of buffer
*
* Returns a negative error code on error, or the 16-bit checksum
**/
{
DEBUGFUNC("ixgbe_calc_eeprom_checksum_X550");
if (!buffer) {
/* Read pointer area */
if (status) {
DEBUGOUT("Failed to read EEPROM image\n");
return status;
}
} else {
return IXGBE_ERR_PARAM;
}
/*
* For X550 hardware include 0x0-0x41 in the checksum, skip the
* checksum word itself
*/
for (i = 0; i <= IXGBE_EEPROM_LAST_WORD; i++)
if (i != IXGBE_EEPROM_CHECKSUM)
checksum += local_buffer[i];
/*
* Include all data from pointers 0x3, 0x6-0xE. This excludes the
*/
for (i = IXGBE_PCIE_ANALOG_PTR_X550; i < IXGBE_FW_PTR; i++) {
if (i == IXGBE_PHY_PTR || i == IXGBE_OPTION_ROM_PTR)
continue;
pointer = local_buffer[i];
/* Skip pointer section if the pointer is invalid. */
continue;
switch (i) {
case IXGBE_PCIE_GENERAL_PTR:
break;
case IXGBE_PCIE_CONFIG0_PTR:
case IXGBE_PCIE_CONFIG1_PTR:
break;
default:
size = 0;
break;
}
if (status)
return status;
}
}
/**
* ixgbe_calc_eeprom_checksum_X550 - Calculates and returns the checksum
* @hw: pointer to hardware structure
*
* Returns a negative error code on error, or the 16-bit checksum
**/
{
}
/**
* ixgbe_validate_eeprom_checksum_X550 - Validate EEPROM checksum
* @hw: pointer to hardware structure
* @checksum_val: calculated checksum
*
* Performs checksum calculation and validates the EEPROM checksum. If the
* caller does not need checksum_val, the value can be NULL.
**/
{
DEBUGFUNC("ixgbe_validate_eeprom_checksum_X550");
/* Read the first word from the EEPROM. If this times out or fails, do
* not continue or we could be in for a very long wait while every
* EEPROM read fails
*/
if (status) {
DEBUGOUT("EEPROM read failed\n");
return status;
}
if (status < 0)
return status;
if (status)
return status;
/* Verify read checksum from EEPROM is the same as
* calculated checksum
*/
if (read_checksum != checksum) {
"Invalid EEPROM checksum");
}
/* If the user cares, return the calculated checksum */
if (checksum_val)
*checksum_val = checksum;
return status;
}
/**
* ixgbe_update_eeprom_checksum_X550 - Updates the EEPROM checksum and flash
* @hw: pointer to hardware structure
*
* After writing EEPROM to shadow RAM using EEWR register, software calculates
* checksum and updates the EEPROM and instructs the hardware to update
* the flash.
**/
{
DEBUGFUNC("ixgbe_update_eeprom_checksum_X550");
/* Read the first word from the EEPROM. If this times out or fails, do
* not continue or we could be in for a very long wait while every
* EEPROM read fails
*/
if (status) {
DEBUGOUT("EEPROM read failed\n");
return status;
}
if (status < 0)
return status;
checksum);
if (status)
return status;
return status;
}
/**
* ixgbe_update_flash_X550 - Instruct HW to copy EEPROM to Flash device
* @hw: pointer to hardware structure
*
* Issue a shadow RAM dump to FW to copy EEPROM from shadow RAM to the flash.
**/
{
DEBUGFUNC("ixgbe_update_flash_X550");
sizeof(buffer),
return status;
}
/**
* ixgbe_get_supported_physical_layer_X550em - Returns physical layer type
* @hw: pointer to hardware structure
*
* Determines physical layer capabilities of the current configuration.
**/
{
DEBUGFUNC("ixgbe_get_supported_physical_layer_X550em");
case ixgbe_phy_x550em_kr:
break;
case ixgbe_phy_x550em_kx4:
break;
case ixgbe_phy_x550em_ext_t:
&ext_ability);
break;
default:
break;
}
return physical_layer;
}
/**
* ixgbe_get_bus_info_x550em - Set PCI bus info
* @hw: pointer to hardware structure
*
* Sets bus link width and speed to unknown because X550em is
* not a PCI device.
**/
{
DEBUGFUNC("ixgbe_get_bus_info_x550em");
return IXGBE_SUCCESS;
}
/**
* ixgbe_disable_rx_x550 - Disable RX unit
*
* Enables the Rx DMA unit for x550
**/
{
DEBUGFUNC("ixgbe_enable_rx_dma_x550");
if (rxctrl & IXGBE_RXCTRL_RXEN) {
if (pfdtxgswc & IXGBE_PFDTXGSWC_VT_LBEN) {
} else {
}
sizeof(struct ixgbe_hic_disable_rxen),
/* If we fail - disable RX using register write */
if (status) {
if (rxctrl & IXGBE_RXCTRL_RXEN) {
rxctrl &= ~IXGBE_RXCTRL_RXEN;
}
}
}
}
/**
* ixgbe_enter_lplu_x550em - Transition to low power states
* @hw: pointer to hardware structure
*
* Configures Low Power Link Up on transition to low power states
* (from D0 to non-D0). Link is required to enter LPLU so avoid resetting the
* X557 PHY immediately prior to entering LPLU.
**/
{
bool link_up;
/* SW LPLU not required on later HW revisions. */
return IXGBE_SUCCESS;
/* If blocked by MNG FW, then don't restart AN */
if (ixgbe_check_reset_blocked(hw))
return IXGBE_SUCCESS;
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
/* If link is down, LPLU disabled in NVM, WoL disabled, or manageability
* disabled, then force link down by entering low power mode.
*/
/* Determine LCD */
if (status != IXGBE_SUCCESS)
return status;
/* If no valid LCD link speed, then force link down and exit. */
if (lcd_speed == IXGBE_LINK_SPEED_UNKNOWN)
&speed);
if (status != IXGBE_SUCCESS)
return status;
/* If no link now, speed is invalid so take link down */
if (status != IXGBE_SUCCESS)
/* clear everything but the speed bits */
/* If current speed is already LCD, then exit. */
if (((speed == IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB) &&
(lcd_speed == IXGBE_LINK_SPEED_1GB_FULL)) ||
return status;
/* Clear AN completed indication */
&autoneg_reg);
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
&autoneg_reg);
if (status != IXGBE_SUCCESS)
return status;
/* Setup link at least common link speed */
/* restore autoneg from before setting lplu speed */
return status;
}
/**
* ixgbe_get_lcd_x550em - Determine lowest common denominator
* @hw: pointer to hardware structure
* @lcd_speed: pointer to lowest common link speed
*
* Determine lowest common link speed with link partner.
**/
{
&an_lp_status);
if (status != IXGBE_SUCCESS)
return status;
/* If link partner advertised 1G, return 1G */
return status;
}
/* If 10G disabled for LPLU via NVM D10GMP, then return no valid LCD */
return status;
/* Link partner not capable of lower speeds, return 10G */
return status;
}
/**
* ixgbe_setup_fc_X550em - Set up flow control
* @hw: pointer to hardware structure
*
* Called at init time to set up flow control.
**/
{
DEBUGFUNC("ixgbe_setup_fc_X550em");
/* Validate the requested mode */
"ixgbe_fc_rx_pause not valid in strict IEEE mode\n");
goto out;
}
/* 10gig parts do not have a word in the EEPROM to determine the
* default flow control setting, so we explicitly set it to full.
*/
/* Determine PAUSE and ASM_DIR bits. */
case ixgbe_fc_none:
pause = 0;
asm_dir = 0;
break;
case ixgbe_fc_tx_pause:
pause = 0;
asm_dir = 1;
break;
case ixgbe_fc_rx_pause:
/* Rx Flow control is enabled and Tx Flow control is
* disabled by software override. Since there really
* isn't a way to advertise that we are capable of RX
* Pause ONLY, we will advertise that we support both
* symmetric and asymmetric Rx PAUSE, as such we fall
* through to the fc_full statement. Later, we will
* disable the adapter's ability to send PAUSE frames.
*/
case ixgbe_fc_full:
pause = 1;
asm_dir = 1;
break;
default:
"Flow control param set incorrectly\n");
goto out;
}
if (ret_val != IXGBE_SUCCESS)
goto out;
if (pause)
if (asm_dir)
/* This device does not fully support AN. */
}
out:
return ret_val;
}
/**
* ixgbe_set_mux - Set mux for port 1 access with CS4227
* @hw: pointer to hardware structure
* @state: set mux if 1, clear if 0
*/
{
return;
if (state)
esdp |= IXGBE_ESDP_SDP1;
else
esdp &= ~IXGBE_ESDP_SDP1;
}
/**
* ixgbe_acquire_swfw_sync_X550em - Acquire SWFW semaphore
* @hw: pointer to hardware structure
* @mask: Mask to specify which semaphore to acquire
*
* Acquires the SWFW semaphore and sets the I2C MUX
**/
{
DEBUGFUNC("ixgbe_acquire_swfw_sync_X550em");
if (status)
return status;
if (mask & IXGBE_GSSR_I2C_MASK)
return IXGBE_SUCCESS;
}
/**
* ixgbe_release_swfw_sync_X550em - Release SWFW semaphore
* @hw: pointer to hardware structure
* @mask: Mask to specify which semaphore to release
*
* Releases the SWFW semaphore and sets the I2C MUX
**/
{
DEBUGFUNC("ixgbe_release_swfw_sync_X550em");
if (mask & IXGBE_GSSR_I2C_MASK)
ixgbe_set_mux(hw, 0);
}
/**
* ixgbe_handle_lasi_ext_t_x550em - Handle external Base T PHY interrupt
* @hw: pointer to hardware structure
*
* Handle external Base T PHY interrupt. If high temperature
* failure alarm then return error, else if link status change
*
* Return IXGBE_ERR_OVERTEMP if interrupt is high temperature
* failure alarm, else return PHY access status.
*/
{
bool lsc;
if (status != IXGBE_SUCCESS)
return status;
if (lsc)
return ixgbe_setup_internal_phy(hw);
return IXGBE_SUCCESS;
}
/**
* ixgbe_setup_mac_link_t_X550em - Sets the auto advertised link speed
* @hw: pointer to hardware structure
* @speed: new link speed
* @autoneg_wait_to_complete: TRUE when waiting for completion is needed
*
* external PHY auto advertised link speed.
*
* Returns error status for any failure
**/
bool autoneg_wait_to_complete)
{
DEBUGFUNC("ixgbe_setup_mac_link_t_X550em");
* only 1G is auto advertised then setup KX link.
*/
if (speed & IXGBE_LINK_SPEED_10GB_FULL)
else
/* If internal link mode is XFI, then setup XFI internal link. */
if (status != IXGBE_SUCCESS)
return status;
}
}
/**
* ixgbe_check_link_t_X550em - Determine link and speed status
* @hw: pointer to hardware structure
* @speed: pointer to link speed
* @link_up: TRUE when link is up
* @link_up_wait_to_complete: bool used to wait for link up or not
*
* Check that both the MAC and X557 external PHY have link.
**/
bool *link_up, bool link_up_wait_to_complete)
{
return IXGBE_ERR_CONFIG;
/* If check link fails or MAC link is not up, then return */
return status;
/* MAC link is up, so check external PHY link.
* Read this twice back to back to indicate current status.
*/
if (status != IXGBE_SUCCESS)
return status;
if (status != IXGBE_SUCCESS)
return status;
/* If external PHY link is not up, then indicate link not up */
return IXGBE_SUCCESS;
}
/**
* ixgbe_reset_phy_t_X550em - Performs X557 PHY reset and enables LASI
* @hw: pointer to hardware structure
**/
{
if (status != IXGBE_SUCCESS)
return status;
/* Configure Link Status Alarm and Temperature Threshold interrupts */
return ixgbe_enable_lasi_ext_t_x550em(hw);
}
/**
* ixgbe_led_on_t_X550em - Turns on the software controllable LEDs.
* @hw: pointer to hardware structure
* @led_idx: led number to turn on
**/
{
DEBUGFUNC("ixgbe_led_on_t_X550em");
if (led_idx >= IXGBE_X557_MAX_LED_INDEX)
return IXGBE_ERR_PARAM;
/* To turn on the LED, set mode to ON. */
return IXGBE_SUCCESS;
}
/**
* ixgbe_led_off_t_X550em - Turns off the software controllable LEDs.
* @hw: pointer to hardware structure
* @led_idx: led number to turn off
**/
{
DEBUGFUNC("ixgbe_led_off_t_X550em");
if (led_idx >= IXGBE_X557_MAX_LED_INDEX)
return IXGBE_ERR_PARAM;
/* To turn on the LED, set mode to ON. */
return IXGBE_SUCCESS;
}