75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/******************************************************************************
49b7860084dbba18bc00b29413d6182197f9fe93Robert Mustacchi Copyright (c) 2001-2015, Intel Corporation
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi All rights reserved.
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi Redistribution and use in source and binary forms, with or without
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi modification, are permitted provided that the following conditions are met:
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi 1. Redistributions of source code must retain the above copyright notice,
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi this list of conditions and the following disclaimer.
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi 2. Redistributions in binary form must reproduce the above copyright
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi notice, this list of conditions and the following disclaimer in the
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi documentation and/or other materials provided with the distribution.
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi 3. Neither the name of the Intel Corporation nor the names of its
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi contributors may be used to endorse or promote products derived from
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi this software without specific prior written permission.
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi POSSIBILITY OF SUCH DAMAGE.
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi******************************************************************************/
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82546EB_QUAD_COPPER 0x101D
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82546GB_QUAD_COPPER 0x1099
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82571EB_SERDES_DUAL 0x10D9
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82571EB_SERDES_QUAD 0x10DA
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82571EB_QUAD_COPPER 0x10A4
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82571PT_QUAD_COPPER 0x10D5
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82571EB_QUAD_FIBER 0x10A5
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82571EB_QUAD_COPPER_LP 0x10BC
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_80003ES2LAN_COPPER_DPT 0x1096
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_80003ES2LAN_SERDES_DPT 0x1098
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_80003ES2LAN_COPPER_SPT 0x10BA
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_80003ES2LAN_SERDES_SPT 0x10BB
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_PCH_LPTLP_I218_LM 0x155A
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_PCH_LPTLP_I218_V 0x1559
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchi#define E1000_DEV_ID_PCH_I218_LM3 0x15A2 /* Wildcat Point PCH */
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchi#define E1000_DEV_ID_PCH_I218_V3 0x15A3 /* Wildcat Point PCH */
49b7860084dbba18bc00b29413d6182197f9fe93Robert Mustacchi#define E1000_DEV_ID_PCH_SPT_I219_LM 0x156F /* Sunrise Point PCH */
49b7860084dbba18bc00b29413d6182197f9fe93Robert Mustacchi#define E1000_DEV_ID_PCH_SPT_I219_V 0x1570 /* Sunrise Point PCH */
49b7860084dbba18bc00b29413d6182197f9fe93Robert Mustacchi#define E1000_DEV_ID_PCH_SPT_I219_LM2 0x15B7 /* Sunrise Point-H PCH */
49b7860084dbba18bc00b29413d6182197f9fe93Robert Mustacchi#define E1000_DEV_ID_PCH_SPT_I219_V2 0x15B8 /* Sunrise Point-H PCH */
49b7860084dbba18bc00b29413d6182197f9fe93Robert Mustacchi#define E1000_DEV_ID_PCH_LBG_I219_LM3 0x15B9 /* LEWISBURG PCH */
ea4c6b78cebe2a3687fa43deeedf6212a124d817Robert Mustacchi#define E1000_DEV_ID_PCH_SPT_I219_LM4 0x15D7
ea4c6b78cebe2a3687fa43deeedf6212a124d817Robert Mustacchi#define E1000_DEV_ID_PCH_SPT_I219_LM5 0x15E3
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82576_QUAD_COPPER 0x10E8
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82576_QUAD_COPPER_ET2 0x1526
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82576_SERDES_QUAD 0x150D
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82580_COPPER_DUAL 0x1516
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_82580_QUAD_FIBER 0x1527
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_I210_COPPER_OEM1 0x1534
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchi#define E1000_DEV_ID_I210_COPPER_FLASHLESS 0x157B
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchi#define E1000_DEV_ID_I210_SERDES_FLASHLESS 0x157C
13485e69b5429e6c7d27301fb3c0deee0e93768aGarrett D'Amore#define E1000_DEV_ID_I354_BACKPLANE_1GBPS 0x1F40
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchi#define E1000_DEV_ID_I354_BACKPLANE_2_5GBPS 0x1F45
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi#define E1000_DEV_ID_DH89XXCC_BACKPLANE 0x043C
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi e1000_num_macs /* List is 1-based, so subtract 1 for TRUE count. */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* Receive Descriptor */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi __le64 buffer_addr; /* Address of the descriptor's data buffer */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi __le16 length; /* Length of data DMAed into data buffer */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* Receive Descriptor - Extended */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi __le32 status_error; /* ext status/error */
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchi/* Number of packet split data buffers (not including the header buffer) */
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchi#define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* Receive Descriptor - Packet Split */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi /* one buffer for protocol header(s), three data buffers */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi __le32 status_error; /* ext status/error */
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchi /* length of buffers 1-3 */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* Transmit Descriptor */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi __le64 buffer_addr; /* Address of the descriptor's data buffer */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* Offload Context Descriptor */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* Offload data descriptor */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi __le64 buffer_addr; /* Address of the descriptor's buffer address */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* Statistics counters collected by the MAC */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* Host Interface "Rev 1" */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi struct e1000_host_command_header command_header;
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* Host Interface "Rev 2" */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi struct e1000_host_mng_command_header command_header;
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* Function pointers for the MAC. */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi void (*shutdown_serdes)(struct e1000_hw *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi void (*power_up_serdes)(struct e1000_hw *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*setup_physical_interface)(struct e1000_hw *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi void (*write_vfta)(struct e1000_hw *, u32, u32);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi void (*config_collision_dist)(struct e1000_hw *);
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchi int (*rar_set)(struct e1000_hw *, u8*, u32);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*validate_mdi_setting)(struct e1000_hw *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*set_obff_timer)(struct e1000_hw *, u32);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*acquire_swfw_sync)(struct e1000_hw *, u16);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi void (*release_swfw_sync)(struct e1000_hw *, u16);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* When to use various PHY register access functions:
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi * Func Caller
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi * Function Does Does When to use
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi * ~~~~~~~~~~~~ ~~~~~ ~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi * X_reg L,P,A n/a for simple PHY reg accesses
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi * X_reg_locked P,A L for multiple accesses of different regs
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi * on different pages
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi * X_reg_page A L,P for multiple accesses of different regs
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi * on the same page
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi * Where X=[read|write], L=locking, P=sets page, A=register access
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*check_reset_block)(struct e1000_hw *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*force_speed_duplex)(struct e1000_hw *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*get_cable_length)(struct e1000_hw *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*read_reg)(struct e1000_hw *, u32, u16 *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*read_reg_locked)(struct e1000_hw *, u32, u16 *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*read_reg_page)(struct e1000_hw *, u32, u16 *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*write_reg)(struct e1000_hw *, u32, u16);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*write_reg_locked)(struct e1000_hw *, u32, u16);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*write_reg_page)(struct e1000_hw *, u32, u16);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*read_i2c_byte)(struct e1000_hw *, u8, u8, u8 *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*write_i2c_byte)(struct e1000_hw *, u8, u8, u8);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* Function pointers for the NVM. */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*read)(struct e1000_hw *, u16, u16, u16 *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*valid_led_default)(struct e1000_hw *, u16 *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*write)(struct e1000_hw *, u16, u16, u16 *);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi /* Maximum size of the MTA register table in all supported adapters */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi enum e1000_serdes_link_state serdes_link_state;
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi u32 high_water; /* Flow control high-water mark */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi u32 low_water; /* Flow control low-water mark */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi u16 pause_time; /* Flow control pause timer */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi u16 refresh_time; /* Flow control refresh timer */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi enum e1000_fc_mode current_mode; /* FC mode in effect */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi enum e1000_fc_mode requested_mode; /* FC mode requested by caller */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*read)(struct e1000_hw *, u32 *, u16, u16);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*write)(struct e1000_hw *, u32 *, u16, u16);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*check_for_msg)(struct e1000_hw *, u16);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*check_for_ack)(struct e1000_hw *, u16);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi s32 (*check_for_rst)(struct e1000_hw *, u16);
c124a83e09115de88ecccd4f689983f42a1d53bdRobert Mustacchi/* I218 PHY Ultra Low Power (ULP) states */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi struct e1000_shadow_ram shadow_ram[E1000_SHADOW_RAM_WORDS];
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi struct e1000_host_mng_dhcp_cookie mng_cookie;
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi struct e1000_dev_spec_80003es2lan _80003es2lan;
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchi/* These functions must be implemented by drivers */
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchivoid e1000_pci_clear_mwi(struct e1000_hw *hw);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchivoid e1000_pci_set_mwi(struct e1000_hw *hw);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchis32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchis32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
75eba5b6d79ed4d2ce3daf7b2806306b6b69a938Robert Mustacchivoid e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);