Searched refs:bpp (Results 1 - 11 of 11) sorted by relevance

/solaris-x11-s11/open-src/kernel/efb/src/
H A Ddrm_mode.h285 __u32 bpp; member in struct:drm_mode_fb_cmd
453 uint32_t bpp; member in struct:drm_mode_create_dumb
/solaris-x11-s11/open-src/kernel/sys/drm/
H A Ddrm_mode.h285 __u32 bpp; member in struct:drm_mode_fb_cmd
453 uint32_t bpp; member in struct:drm_mode_create_dumb
H A Ddrm_crtc.h1014 extern uint32_t drm_mode_legacy_fb_format(uint32_t bpp, uint32_t depth);
1059 int *bpp);
H A DdrmP.h1018 int bpp; member in struct:drm_cmdline_mode
/solaris-x11-s11/open-src/kernel/i915/src/
H A Dintel_dp.c107 * 119000. At 18bpp that's 2142000 kilobits per second.
114 intel_dp_link_required(int pixel_clock, int bpp) argument
116 return (pixel_clock * bpp + 9) / 10;
693 int bpp, mode_rate; local
720 /* Walk through all bpp values. Luckily they're all nicely spaced with 2
722 bpp = pipe_config->pipe_bpp;
724 bpp = min(bpp, dev_priv->vbt.edp_bpp);
726 for (; bpp >= 6*3; bpp
[all...]
H A Dintel_drv.h215 * Enable dithering, used when the selected pipe bpp doesn't match the
216 * plane bpp.
228 * crtc bandwidth limit, don't increase pipe bpp or clock if not really
682 extern int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
750 unsigned int bpp,
H A Dintel_display.c4044 DRM_DEBUG_KMS("fdi link bw constraint, reducing pipe bpp to %i\n",
4804 /* Bspec claims that we can't use dithering for 30bpp pipes. */
5597 int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp) argument
5604 u32 bps = target_clock * bpp * 21 / 20;
6736 intel_framebuffer_pitch_for_width(int width, int bpp) argument
6738 u32 pitch = DIV_ROUND_UP(width * bpp, 8);
6743 intel_framebuffer_size_for_mode(struct drm_display_mode *mode, int bpp) argument
6745 u32 pitch = intel_framebuffer_pitch_for_width(mode->hdisplay, bpp);
6752 int depth, int bpp)
6758 intel_framebuffer_size_for_mode(mode, bpp));
6750 intel_framebuffer_create_for_mode(struct drm_device *dev, struct drm_display_mode *mode, int depth, int bpp) argument
7707 int bpp = pipe_config->pipe_bpp; local
7736 int bpp; local
[all...]
H A Di915_drv.h175 void intel_link_compute_m_n(int bpp, int nlanes,
H A Di915_gem.c231 args->pitch = ALIGN(args->width * ((args->bpp + 7) / 8), 64);
/solaris-x11-s11/open-src/kernel/drm/src/
H A Ddrm_crtc.c2226 uint32_t drm_mode_legacy_fb_format(uint32_t bpp, uint32_t depth) argument
2230 switch (bpp) {
2252 DRM_ERROR("bad bpp, assuming x8r8g8b8 pixel format\n");
2290 r.pixel_format = drm_mode_legacy_fb_format(or->bpp, or->depth);
2581 r->bpp = fb->bits_per_pixel;
3641 int *bpp)
3648 *bpp = 8;
3659 *bpp = 16;
3664 *bpp = 16;
3669 *bpp
3640 drm_fb_get_bpp_depth(uint32_t format, unsigned int *depth, int *bpp) argument
3748 int bpp; local
[all...]
H A Ddrm_fb_helper.c124 cmdline_mode->bpp = fb_info.depth;
336 for both depth/bpp */
348 switch (cmdline_mode->bpp) {

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