| /openjdk7/hotspot/src/cpu/zero/vm/ |
| H A D | bytes_zero.hpp | 31 typedef union unaligned { union
35 } __attribute__((packed)) unaligned; typedef in typeref:union:unaligned
49 // Efficient reading and writing of unaligned unsigned data in
52 unaligned *up = (unaligned *) p;
57 unaligned *up = (unaligned *) p;
62 unaligned *up = (unaligned *) p;
67 unaligned *u
[all...] |
| /openjdk7/hotspot/src/cpu/sparc/vm/ |
| H A D | c1_LIRAssembler_sparc.hpp | 43 int store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide, bool unaligned);
46 int load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide, bool unaligned);
|
| H A D | c1_LIRAssembler_sparc.cpp | 796 int LIR_Assembler::store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide, bool unaligned) { argument
799 assert(!unaligned, "can't handle this");
816 if (unaligned || PatchALot) {
849 // split unaligned stores
850 if (unaligned || PatchALot) {
908 int LIR_Assembler::load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide, bool unaligned) { argument
912 assert(!unaligned, "can't handle this");
925 if (!unaligned) {
968 // split unaligned loads
969 if (unaligned || PatchALo
1346 mem2reg(LIR_Opr src_opr, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide, bool unaligned) argument
1434 bool unaligned = (addr.disp() - STACK_BIAS) % 8 != 0; local
1446 bool unaligned = (addr.disp() - STACK_BIAS) % 8 != 0; local
1493 reg2mem(LIR_Opr from_reg, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide, bool unaligned) argument
[all...] |
| /openjdk7/jdk/src/share/classes/java/nio/ |
| H A D | Direct-X-Buffer-bin.java.template | 35 if (unaligned) {
54 if (unaligned) {
91 if (!unaligned && ((address + off) % $BYTES_PER_VALUE$ != 0)) {
|
| H A D | Bits.java | 603 private static boolean unaligned; field in class:Bits
606 static boolean unaligned() { method in class:Bits
608 return unaligned;
611 unaligned = arch.equals("i386") || arch.equals("x86")
614 return unaligned;
|
| H A D | Direct-X-Buffer.java.template | 54 // Cached unaligned-access capability
55 protected static final boolean unaligned = Bits.unaligned();
|
| /openjdk7/hotspot/src/share/vm/c1/ |
| H A D | c1_LIRAssembler.hpp | 172 bool pop_fpu_stack, bool wide, bool unaligned);
177 CodeEmitInfo* info, bool wide, bool unaligned);
215 LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide);
|
| H A D | c1_LIRAssembler.cpp | 796 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) { argument
805 reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned);
834 mem2reg(src, dest, type, patch_code, info, wide, unaligned);
|
| H A D | c1_LIR.hpp | 1229 unaligned = 1 << 9, enumerator in enum:LIR_OpArrayCopy::Flags
|
| H A D | c1_LIRGenerator.cpp | 887 flags &= ~LIR_OpArrayCopy::unaligned;
|
| /openjdk7/jdk/src/share/classes/sun/security/provider/ |
| H A D | ByteArrayAccess.java | 41 * access at unaligned addresses (i.e. x86/amd64). The second is for big endian
67 // support full speed unaligned memory access.
72 // (Note that on SPARC unaligned memory access is possible, but it is
86 scaleOK && unaligned() && (byteOrder == ByteOrder.LITTLE_ENDIAN);
92 // at unaligned addresses.
95 private static boolean unaligned() { method in class:ByteArrayAccess
|
| /openjdk7/hotspot/src/cpu/x86/vm/ |
| H A D | c1_LIRAssembler_x86.cpp | 974 void LIR_Assembler::reg2mem(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide, bool /* unaligned */) {
1174 void LIR_Assembler::mem2reg(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide, bool /* unaligned */) {
3471 bool aligned = (flags & LIR_OpArrayCopy::unaligned) == 0;
|