/*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
*
* This code is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* version 2 for more details (a copy is included in the LICENSE file that
* accompanied this code).
*
* You should have received a copy of the GNU General Public License version
* 2 along with this work; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
* or visit www.oracle.com if you need additional information or have any
* questions.
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*/
private:
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
//
//
// The following "pseudo" sparc instructions (load/store) make it easier to use the indexed addressing mode
// by allowing 32 bit displacements:
//
// When disp <= 13 bits long, a single load or store instruction is emitted with (disp + [d]).
// When disp > 13 bits long, code is emitted to set the displacement into the O7 register,
// and then a load or store is emitted with ([O7] + [d]).
//
int shift_amount(BasicType t);
// Record the type of the receiver in ReceiverTypeData
// Setup pointers to MDO, MDO slot, also compute offset bias to access the slot.
public:
enum {
#ifdef _LP64
#else
call_stub_size = 20,
#endif // _LP64
#endif // CPU_SPARC_VM_C1_LIRASSEMBLER_SPARC_HPP