Searched defs:reg (Results 276 - 300 of 341) sorted by relevance

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/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/emlxs/
H A Demlxs_sli3.c4745 uint32_t reg; local
4762 reg = (ha_copy >> (ring_no * 4)) & 0x0f;
5016 if (reg & HA_R0RE_REQ) {
5035 if ((reg & HA_R0CE_RSP) || hba->channel_tx_count) {
/illumos-gate/usr/src/uts/intel/io/vgatext/
H A Dvgatext.c494 MYNAME ": can't find reg entry for registers");
502 MYNAME ": can't find reg entry for memory");
514 MYNAME ": can't find reg entry for registers");
524 MYNAME ": can't find reg entry for memory");
1431 * search the entries of the "reg" property for one which has the desired
1434 * This version searches a PCI-style "reg" property. It was prompted by
1445 * specific purpose of finding a couple of particular VGA reg entries and
1446 * may not be suitable for all reg-searching purposes.
1458 pci_regspec_t *reg; local
1461 "reg", (caddr_
1517 struct regspec *reg; local
[all...]
/illumos-gate/usr/src/uts/common/io/arn/
H A Darn_eeprom.c61 uint32_t reg, uint32_t mask,
66 regVal = REG_READ(ah, reg) & ~mask;
69 REG_WRITE(ah, reg, regVal);
60 ath9k_hw_analog_shift_rmw(struct ath_hal *ah, uint32_t reg, uint32_t mask, uint32_t shift, uint32_t val) argument
H A Darn_hw.c52 uint32_t reg, uint32_t value);
115 ath9k_hw_wait(struct ath_hal *ah, uint32_t reg, uint32_t mask, uint32_t val) argument
120 if ((REG_READ(ah, reg) & mask) == val)
126 "timeout on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
127 reg, REG_READ(ah, reg), mask, val));
994 uint32_t reg = local
1003 reg, val);
1356 uint32_t reg, uint32_t value)
1362 if (reg
1354 ath9k_hw_def_ini_fixup(struct ath_hal *ah, struct ar5416_eeprom_def *pEepData, uint32_t reg, uint32_t value) argument
1395 ath9k_hw_ini_fixup(struct ath_hal *ah, struct ar5416_eeprom_def *pEepData, uint32_t reg, uint32_t value) argument
1476 uint32_t reg = INI_RA(&ahp->ah_iniModes, i, 0); local
1503 uint32_t reg = INI_RA(&ahp->ah_iniCommon, i, 0); local
[all...]
/illumos-gate/usr/src/uts/i86pc/io/pcplusmp/
H A Dapic_common.c417 /* local intr reg 0 */
1074 uint32_t reg; local
1076 reg = addr + APIC_CURR_COUNT - apicadr;
1097 start_apic_tick = apic_reg_ops->apic_read(reg);
1109 end_apic_tick = apic_reg_ops->apic_read(reg);
1397 ioapic_read(int ioapic_ix, uint32_t reg) argument
1402 ioapic[APIC_IO_REG] = reg;
1407 ioapic_write(int ioapic_ix, uint32_t reg, uint32_t value) argument
1412 ioapic[APIC_IO_REG] = reg;
/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_api.c57 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
1322 * @reg: analog register to read
1327 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) argument
1329 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1336 * @reg: analog register to write
1341 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) argument
1343 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1397 * @reg: I2C device register to read from
1402 s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val) argument
1405 reg, va
1417 ixgbe_read_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val) argument
1469 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val) argument
1484 ixgbe_write_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val) argument
[all...]
H A Dixgbe_x550.c94 * @reg: register number to write
99 static s32 ixgbe_read_cs4227(struct ixgbe_hw *hw, u16 reg, u16 *value) argument
101 return ixgbe_read_i2c_combined_unlocked(hw, IXGBE_CS4227, reg, value);
107 * @reg: register number to write
112 static s32 ixgbe_write_cs4227(struct ixgbe_hw *hw, u16 reg, u16 value) argument
114 return ixgbe_write_i2c_combined_unlocked(hw, IXGBE_CS4227, reg, value);
120 * @reg: register number to read
125 static s32 ixgbe_read_pe(struct ixgbe_hw *hw, u8 reg, u8 *value) argument
129 status = ixgbe_read_i2c_byte_unlocked(hw, reg, IXGBE_PE, value);
139 * @reg
144 ixgbe_write_pe(struct ixgbe_hw *hw, u8 reg, u8 value) argument
167 u8 reg; local
466 u32 reg, high_pri_tc; local
514 u32 tc, reg, pb_headroom, rx_pb_size, maxframe_size_kb; local
568 u32 reg; local
905 u32 reg; local
928 u32 reg; local
952 u32 idx, reg, num_qs, start_q, bitmask; local
993 u32 i, j, reg, q, shift, vf, idx; local
1244 u16 reg; local
1331 u16 reg; local
1655 u16 reg; local
2170 u32 reg = IXGBE_FLEX_MNG + (FW_NVM_DATA_OFFSET << 2) + local
[all...]
/illumos-gate/usr/src/uts/common/io/usb/usba/
H A Dusba.c311 /* the dip should have an address and reg property */
331 DDI_PROP_DONTPASS, "reg",
1645 * name and reg property of each child. If there is a match
1658 odip, DDI_PROP_DONTPASS, "reg",
1683 child, DDI_PROP_DONTPASS, "reg",
1700 "reg: %x %x %x - %x %x %x",
1767 int reg[1]; local
1819 reg[0] = port;
1825 DDI_DEV_T_NONE, child_dip, "reg", reg,
2298 int reg[2]; local
2543 int reg[2]; local
[all...]
/illumos-gate/usr/src/boot/sys/boot/fdt/
H A Dfdt_loader_cmd.c434 fdt_reg_valid(uint32_t *reg, int len, int addr_cells, int size_cells) argument
447 cur_start = fdt64_to_cpu(reg[i * cells_in_tuple]);
449 cur_start = fdt32_to_cpu(reg[i * cells_in_tuple]);
452 cur_size = fdt64_to_cpu(reg[i * cells_in_tuple + 2]);
454 cur_size = fdt32_to_cpu(reg[i * cells_in_tuple + 1]);
459 debugf(" reg#%d (start: 0x%0x size: 0x%0x) valid!\n",
607 if ((err = fdt_setprop(fdtp, memory, "reg", sb, len)) < 0)
1572 sprintf(line, "reg#%d: (start: 0x%jx, size: 0x%jx)\n",
/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_ich8lan.c1013 u16 reg; local
1022 &reg);
1029 reg &
1042 reg);
1054 ret_val = hw->phy.ops.read_reg(hw, I217_INBAND_CTRL, &reg);
1059 reg &= ~I217_INBAND_CTRL_LINK_STAT_TX_TIMEOUT_MASK;
1063 reg |= 5 << I217_INBAND_CTRL_LINK_STAT_TX_TIMEOUT_SHIFT;
1069 reg |= 50 <<
1076 ret_val = hw->phy.ops.write_reg(hw, I217_INBAND_CTRL, reg);
1119 u32 reg local
2481 u32 reg = 0; local
3083 u16 reg; local
4951 u32 ctrl, reg; local
5155 u32 reg; local
5538 u32 reg; local
[all...]
/illumos-gate/usr/src/lib/libdevinfo/
H A Ddevinfo_devlink.c2049 regex_t reg; local
2063 if (regcomp(&reg, re, REG_EXTENDED) != 0)
2065 linkd.regp = &reg;
2082 regfree(&reg);
3747 regex_t reg; local
3761 if (regcomp(&reg, re, REG_EXTENDED) != 0)
3763 linkd.regp = &reg;
3773 regfree(&reg);
/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Dforcedeth.c371 #define MII_ADVERTISE 0x04 /* Advertisement control reg */
372 #define MII_LPA 0x05 /* Link partner ability reg */
397 u32 reg; local
402 reg = readl(base + NvRegAdapterControl);
403 if (reg & NVREG_ADAPTCTL_RUNNING) {
405 writel(reg & ~NVREG_ADAPTCTL_RUNNING,
408 reg = readl(base + NvRegMIIControl);
409 if (reg & NVREG_MIICTL_INUSE) {
414 reg =
418 reg |
[all...]
H A Dtg3.c104 #define tw32(reg,val) tg3_write_indirect_reg32((reg),(val))
105 #define tw32_mailbox(reg, val) writel(((val) & 0xffffffff), tg3.regs + (reg))
106 #define tw16(reg,val) writew(((val) & 0xffff), tg3.regs + (reg))
107 #define tw8(reg,val) writeb(((val) & 0xff), tg3.regs + (reg))
108 #define tr32(reg) readl(tg3.regs + (reg))
112 tw32_carefully(uint32_t reg, uint32_t val) argument
119 tw32_mailbox2(uint32_t reg, uint32_t val) argument
172 tg3_readphy(struct tg3 *tp, int reg, uint32_t *val) argument
212 tg3_writephy(struct tg3 *tp, int reg, uint32_t val) argument
[all...]
/illumos-gate/usr/src/cmd/picl/plugins/sun4u/psvc/psvcobj/
H A Dpsvcobj.c2369 i2c_reg_t reg; local
2385 reg.reg_num = 0;
2386 ret = ioctl_retry(fp, I2C_GET_REG, (void *)&reg);
2661 i2c_reg_t reg; local
2684 reg.reg_num = 0x10;
2685 ret = ioctl_retry(fp, I2C_GET_REG, (void *)&reg);
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc.h257 u16 reg; member in struct:elink_reg_set
529 u8 devad, u16 reg, u16 *ret_val);
532 u8 devad, u16 reg, u16 val);
/illumos-gate/usr/src/uts/common/io/
H A Dbscbus.c318 * reg set 0 is chan 0
319 * reg set 1 is chan 1 ...
458 bscbus_put_reg(struct bscbus_channel_state *csp, uint_t reg, uint8_t val) argument
462 csp->ch_regs + reg, val);
467 bscbus_get_reg(struct bscbus_channel_state *csp, uint_t reg) argument
473 csp->ch_regs + reg);
1343 * "reg" entry and ddi_regs_map_setup() call.
1704 * reg set 0 is chan 0
1705 * reg set 1 is chan 1 ...
1761 * if using the old reg propert
[all...]
H A Dbscv.c869 DDI_PROP_DONTPASS, "reg", &props, &nelements);
877 BSCV_TRACE(ssp, 'A', "bscv_map_regs", "lookup reg returned"
4431 uint8_t reg; local
4435 reg = EBUS_PROGRAM_PCR_PROGOFF_JUMPTOADDR;
4439 reg = EBUS_PROGRAM_PCR_PRGMODE_OFF;
4445 BSCVA(EBUS_CMD_SPACE_PROGRAM, EBUS_PROGRAM_PCSR), reg);
H A Dpcic.c345 static uint32_t pcic_getcb(pcicdev_t *pcic, int reg);
346 static void pcic_putcb(pcicdev_t *pcic, int reg, uint32_t value);
730 "pci-control-reg-number", pci_control_reg_num);
732 "pci-config-reg-number", pci_config_reg_num);
824 * The reg properties on a PCI node are different than those
896 pcic_err(dip, 9, "\tsize of reg %d is 0x%x\n",
1770 pci_regspec_t *reg; local
1881 "write reg 0x%x=%x \n",
1904 " write reg 0x%x=%x \n",
1920 " write reg
5696 pcic_getb(pcicdev_t *pcic, int socket, int reg) argument
5722 pcic_putb(pcicdev_t *pcic, int socket, int reg, int8_t value) argument
6192 pcic_getcb(pcicdev_t *pcic, int reg) argument
6201 pcic_putcb(pcicdev_t *pcic, int reg, uint32_t value) argument
[all...]
/illumos-gate/usr/src/uts/common/io/hme/
H A Dhme.c159 "ddi_regs_map_setup(9F) for global reg failed";
162 "ddi_map_regs for etx reg failed";
165 "ddi_map_regs for erx reg failed";
168 "ddi_map_regs for bmac reg failed";
171 "ddi_map_regs for mif reg failed";
351 #define GET_MIFREG(reg) \
352 ddi_get32(hmep->hme_mifregh, (uint32_t *)&hmep->hme_mifregp->reg)
353 #define PUT_MIFREG(reg, value) \
354 ddi_put32(hmep->hme_mifregh, (uint32_t *)&hmep->hme_mifregp->reg, value)
356 #define GET_ETXREG(reg) \
952 int reg; local
[all...]
/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_mac.c2508 "nxge_neptune_serdes_init: read internal signal reg port<%d> "
2562 nxgep->phy_prop.arr[i].reg, \
2567 "From OBP, write<dev.reg.val> = " \
2570 nxgep->phy_prop.arr[i].reg, \
2879 uint16_t reg, uint8_t *data)
2892 phy_data = ((address + 1) << NLP2020_XCVR_I2C_ADDR_SH) | reg;
3413 uint16_t dev, reg, val; local
3497 reg = initseq[i].dev_reg & 0xffff;
3500 if (reg == NLP_INI_WAIT) {
3504 dev, reg, va
2878 nxge_nlp2020_i2c_read(p_nxge_t nxgep, uint8_t ctrl_port, uint16_t address, uint16_t reg, uint8_t *data) argument
[all...]
/illumos-gate/usr/src/uts/common/io/urtw/
H A Durtw.c205 uint32_t reg; member in struct:urtw_pair
210 uint8_t reg; member in struct:urtw_pair_idx
1887 if (rate == urtw_ratetable[i].reg)
1902 return (urtw_ratetable[i].reg);
2332 if (error = urtw_8225_write_c(sc, urtw_8225_rf_part1[i].reg,
2372 urtw_8225_rf_part2[i].reg,
2383 urtw_8225_rf_part3[i].reg,
2709 if (error = urtw_8225_write_c(sc, urtw_8225v2_rf_part1[i].reg,
2781 urtw_8225v2_rf_part2[i].reg,
2792 urtw_8225v2_rf_part3[i].reg,
[all...]
/illumos-gate/usr/src/uts/common/io/usb/clients/audio/usb_ac/
H A Dusb_ac.c4166 * Also do not register if earlier reg data
4295 /* take the stream reg struct with the same index */
4358 usb_as_registration_t *reg)
4362 for (n = 0; n < reg->reg_n_formats; n++) {
4365 reg->reg_formats[n].fmt_alt,
4366 reg->reg_formats[n].fmt_chns,
4367 reg->reg_formats[n].fmt_precision,
4368 reg->reg_formats[n].fmt_encoding);
4374 (void *)&reg->reg_formats[n]);
4357 usb_ac_print_reg_data(usb_ac_state_t *uacp, usb_as_registration_t *reg) argument
/illumos-gate/usr/src/uts/common/io/xge/hal/xgehal/
H A Dxgehal-device.c118 * @reg: register to poll for
127 __hal_device_register_poll(xge_hal_device_t *hldev, u64 *reg, argument
137 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0, reg);
146 val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0, reg);
1268 __hal_serial_mem_write64(xge_hal_device_t *hldev, u64 value, u64 *reg) argument
1271 (u32)(value>>32), reg);
1274 (u32)value, reg);
1280 __hal_serial_mem_read64(xge_hal_device_t *hldev, u64 *reg) argument
1283 reg);
2686 __hal_device_handle_serr(xge_hal_device_t *hldev, char *reg, u6 argument
2706 __hal_device_handle_eccerr(xge_hal_device_t *hldev, char *reg, u64 value) argument
2729 __hal_device_handle_parityerr(xge_hal_device_t *hldev, char *reg, u64 value) argument
[all...]
/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Dpcisch.c501 "reg", &len) || (len / sizeof (pci_nexus_regspec_t) < 4))
524 cmn_err(CE_WARN, "%s%d: unable to map reg entry %d\n",
569 ib_map_reg_get_cpu(volatile uint64_t reg) argument
571 return (((reg & COMMON_INTR_MAP_REG_TID) >>
573 ((reg & SCHIZO_INTR_MAP_REG_NID) >>
723 DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg=%llx\n", l);
850 DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg=%llx\n", l);
895 DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg=%llx\n", l);
921 DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg=%llx\n", l);
930 DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf command reg
[all...]
/illumos-gate/usr/src/uts/sun4u/lw2plus/io/
H A Dlombus.c419 sio_put_reg(struct lombus_state *ssp, uint_t reg, uint8_t val) argument
421 lombus_trace(ssp, 'P', "sio_put_reg", "REG[%d] <- $%02x", reg, val);
450 ddi_put8(ssp->sio_handle, ssp->sio_regs + reg, val);
458 sio_get_reg(struct lombus_state *ssp, uint_t reg) argument
463 val = ddi_get8(ssp->sio_handle, ssp->sio_regs + reg);
467 lombus_trace(ssp, 'G', "sio_get_reg", "$%02x <- REG[%d]", val, reg);
1254 * "reg" entry and ddi_regs_map_setup() call.
1896 * First, look up and validate the "reg" property.
1910 DDI_PROP_DONTPASS, "reg", &regs, &nregs);

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