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3db86aab554edbb4244c8d1a1c90f152eee768afstevel * CDDL HEADER END
11c2b4c0e543fe2e1e5910cde1f4422cc3218160rw * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Use is subject to license terms.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * PCIC device/interrupt handler
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * The "pcic" driver handles the Intel 82365SL, Cirrus Logic
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * and Toshiba (and possibly other clones) PCMCIA adapter chip
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * sets. It implements a subset of Socket Services as defined
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * in the Solaris PCMCIA design documents
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * currently defined "properties"
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * clock-frequency bus clock frequency
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * smi system management interrupt override
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * need-mult-irq need status IRQ for each pair of sockets
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * disable-audio don't route audio signal to speaker
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China#if defined(__i386) || defined(__amd64)
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China#include <sys/pci_cfgspace.h>
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_getinfo(dev_info_t *, ddi_info_cmd_t, void *, void **);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_attach(dev_info_t *, ddi_attach_cmd_t);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_detach(dev_info_t *, ddi_detach_cmd_t);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_ioctl(dev_t, int, intptr_t, int, cred_t *, int *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_apply_avail_ranges(dev_info_t *, pcm_regs_t *,
3db86aab554edbb4244c8d1a1c90f152eee768afstevelint pci_resource_setup_avail(dev_info_t *, pci_regspec_t *, int);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * On x86 platforms the ddi_iobp_alloc(9F) and ddi_mem_alloc(9F) calls
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * are xlated into DMA ctlops. To make this nexus work on x86, we
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * need to have the default ddi_dma_mctl ctlops in the bus_ops
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * structure, just to pass the request to the parent. The correct
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * ctlops should be ddi_no_dma_mctl because so far we don't do DMA.
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void pcic_err(dev_info_t *dip, int level, const char *fmt, ...);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelextern int cardbus_validate_iline(dev_info_t *dip, ddi_acc_handle_t handle);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void xxdmp_all_regs(pcicdev_t *, int, uint32_t);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(NULL, 10, "Clear lock at %d\n", __LINE__); \
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/* bit patterns to select voltage levels */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel 0, 0, 0, 0, 0, 0,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel 0, 0, 0, 0, 0, 0,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Base used to allocate ranges of PCI memory on x86 systems
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Each instance gets a chunk above the base that is used to map
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * in the memory and I/O windows for that device.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Pages below the base are also allocated for the EXCA registers,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * one per instance.
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_wait_insert_time = 5000000; /* In micro-seconds */
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_debounce_time = 200000; /* In micro-seconds */
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void pcic_set_cdtimers(pcicdev_t *, int, uint32_t, int);
11c2b4c0e543fe2e1e5910cde1f4422cc3218160rwextern void pcmcia_cb_suspended(int);
11c2b4c0e543fe2e1e5910cde1f4422cc3218160rwextern void pcmcia_cb_resumed(int);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_callback(dev_info_t *, int (*)(), int);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_inquire_adapter(dev_info_t *, inquire_adapter_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_get_adapter(dev_info_t *, get_adapter_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_get_socket(dev_info_t *, get_socket_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_get_status(dev_info_t *, get_ss_status_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_get_window(dev_info_t *, get_window_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_inquire_socket(dev_info_t *, inquire_socket_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_inquire_window(dev_info_t *, inquire_window_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_set_window(dev_info_t *, set_window_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_set_socket(dev_info_t *, set_socket_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_set_interrupt(dev_info_t *, set_irq_handler_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_clear_interrupt(dev_info_t *, clear_irq_handler_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void pcic_pm_detection(void *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void pcic_iomem_pci_ctl(ddi_acc_handle_t, uchar_t *, unsigned);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void clext_reg_write(pcicdev_t *, int, uchar_t, uchar_t);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_card_state(pcicdev_t *, pcic_socket_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void pcic_82092_smiirq_ctl(pcicdev_t *, int, int, int);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void pcic_handle_cd_change(pcicdev_t *, pcic_socket_t *, uint8_t);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_set_vcc_level(pcicdev_t *, set_socket_t *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void pcic_rm_debqueue(void *);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic boolean_t pcic_load_cardbus(pcicdev_t *pcic, const pcic_socket_t *sockp);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void pcic_unload_cardbus(pcicdev_t *pcic, const pcic_socket_t *sockp);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void pcic_putcb(pcicdev_t *pcic, int reg, uint32_t value);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void pcic_enable_io_intr(pcicdev_t *pcic, int socket, int irq);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void pcic_disable_io_intr(pcicdev_t *pcic, int socket);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_exca_powerctl(pcicdev_t *pcic, int socket, int powerlevel);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_cbus_powerctl(pcicdev_t *pcic, int socket);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pcic_fault(enum pci_fault_ops op, void *arg);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcmcia interface operations structure
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * this is the private interface that is exported to the nexus
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * chip type identification routines
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * this list of functions is searched until one of them succeeds
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * or all fail. i82365SL is assumed if failed.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel &mod_driverops, /* Type of module. This one is a driver */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Allocate soft state */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_getinfo()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * provide instance/device information about driver
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/*ARGSUSED*/
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_getinfo(dev_info_t *dip, ddi_info_cmd_t cmd, void *arg, void **result)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (!(anp = ddi_get_soft_state(pcic_soft_state_p, minor)))
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * find a PCIC device (any vendor)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * while there can be up to 4 such devices in
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * a system, we currently only look for 1
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * per probe. There will be up to 2 chips per
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * instance since they share I/O space
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (ddi_regs_map_setup(dip, PCIC_ISA_CONTROL_REG_NUM,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "\tchip revision register = %x\n", value);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we probably have a PCIC chip in the system
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * do a little more checking. If we find one,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * reset everything in case of softboot
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* should read back as zero */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (value == 0) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we do have one and it is off the bus
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * These are just defaults they can also be changed via a property in the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * conf file.
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pci_config_reg_num = PCIC_PCI_CONFIG_REG_NUM;
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic int pci_control_reg_num = PCIC_PCI_CONTROL_REG_NUM;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * enable insertion/removal interrupt for 32bit cards
3db86aab554edbb4244c8d1a1c90f152eee768afstevel attr.devacc_attr_endian_flags = DDI_STRUCTURE_LE_ACC;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* CSC Interrupt: Card detect interrupt on */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel ddi_put32(iohandle, (uint32_t *)(ioaddr+CB_STATUS_MASK),
193974072f41a843678abf5f61979c748687e66bSherry Moore (uint32_t *)(ioaddr+CB_STATUS_MASK)) | CB_SE_CCDMASK);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel ddi_put32(iohandle, (uint32_t *)(ioaddr+CB_STATUS_EVENT),
193974072f41a843678abf5f61979c748687e66bSherry Moore ddi_get32(iohandle, (uint32_t *)(ioaddr+CB_STATUS_EVENT)));
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (1);
5644143a6cf1e70bc2e78d5140970830aae0e8cdQuaker Fang * quiesce(9E) entry point.
5644143a6cf1e70bc2e78d5140970830aae0e8cdQuaker Fang * This function is called when the system is single-threaded at high
5644143a6cf1e70bc2e78d5140970830aae0e8cdQuaker Fang * PIL with preemption disabled. Therefore, this function must not be
5644143a6cf1e70bc2e78d5140970830aae0e8cdQuaker Fang * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
5644143a6cf1e70bc2e78d5140970830aae0e8cdQuaker Fang * DDI_FAILURE indicates an error condition and should almost never happen.
5644143a6cf1e70bc2e78d5140970830aae0e8cdQuaker Fang /* disable interrupts and put card into RESET */
5644143a6cf1e70bc2e78d5140970830aae0e8cdQuaker Fang /* poweroff socket */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_attach()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * attach the PCIC (Intel 82365SL/CirrusLogic/Toshiba) driver
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * to the system. This is a child of "sysbus" since that is where
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the hardware lives, but it provides services to the "pcmcia"
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * nexus driver. It gives a pointer back via its private data
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * structure which contains both the dip and socket services entry
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * for now, this is a simulated resume.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * a real one may need different things.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (pcic != NULL && pcic->pc_flags & PCF_SUSPENDED) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* should probe for new sockets showing up */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * for complete implementation need END_RESUME (later)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Allocate soft state associated with this instance.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic->pc_numpower = sizeof (pcic_power)/sizeof (pcic_power[0]);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pci_ctrn = ddi_getprop(DDI_DEV_T_ANY, dip, DDI_PROP_CANSLEEP,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pci_cfrn = ddi_getprop(DDI_DEV_T_ANY, dip, DDI_PROP_CANSLEEP,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic->pc_irq is really the IPL level we want to run at
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * set the default values here and override from intr spec
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic->pc_irq = ddi_getprop(DDI_DEV_T_ANY, dip, DDI_PROP_CANSLEEP,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* see if intrspec tells us different */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel 0, 1, &actual, DDI_INTR_ALLOC_NORMAL) == DDI_SUCCESS) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Check our parent bus type. We do different things based on which
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * bus we're on.
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic%d: can't find parent bus type\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* ddi_prop_op("device_type") */
b8a60a54bb33ac7b5184fd07e6a63ae6d365fd69rw cmn_err(CE_WARN, "!pcic%d: non-pci mode (%s) not supported, "
193974072f41a843678abf5f61979c748687e66bSherry Moore "set BIOS to yenta mode if applicable\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if ((pcic->bus_speed = ddi_getprop(DDI_DEV_T_ANY, ddi_get_parent(dip),
193974072f41a843678abf5f61979c748687e66bSherry Moore "clock-frequency", 0)) == 0) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * OBP can declare the speed in Hz...
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* ddi_prop_op("clock-frequency") */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic->pc_io_type = PCIC_IO_TYPE_82365SL; /* default mode */
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic%d: parent bus type = [%s], speed = %d MHz\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * The reg properties on a PCI node are different than those
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * on a non-PCI node. Handle that difference here.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * If it turns out to be a CardBus chip, we have even more
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * differences.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* usually need to get at config space so map first */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel attr.devacc_attr_endian_flags = DDI_STRUCTURE_LE_ACC;
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic%d: unable to map config space"
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* ddi_regs_map_setup */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Get access to the adapter registers on the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * PCI bus. A 4K memory page
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "cfghndl 0x%p nregs %d",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel attr.devacc_attr_endian_flags = DDI_STRUCTURE_LE_ACC;
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic%d: unable to map PCI regs\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* ddi_regs_map_setup */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Find out the chip type - If we're on a PCI bus,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the adapter has that information in the PCI
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * config space.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Note that we call pcic_find_pci_type here since
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * it needs a valid mapped pcic->handle to
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * access some of the adapter registers in
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * some cases.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Get access to the adapter IO registers on the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * PCI bus config space.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel attr.devacc_attr_endian_flags = DDI_STRUCTURE_LE_ACC;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * We need a default mapping to the adapter's IO
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * control register space. For most adapters
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * that are of class PCIC_PCI_PCMCIA (or of
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * a default class) the control registers
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * will be using the 82365-type control/data
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic%d: unable to map PCI regs\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* ddi_regs_map_setup */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Find out the chip type - If we're on a PCI bus,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the adapter has that information in the PCI
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * config space.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Note that we call pcic_find_pci_type here since
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * it needs a valid mapped pcic->handle to
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * access some of the adapter registers in
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * some cases.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Some PCI-PCMCIA(R2) adapters are Yenta-compliant
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * for extended registers even though they are
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * not CardBus adapters. For those adapters,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * re-map pcic->handle to be large enough to
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * encompass the Yenta registers.
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic%d: unable to map "
193974072f41a843678abf5f61979c748687e66bSherry Moore "PCI regs\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* ddi_regs_map_setup */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* switch (pcic->pc_type) */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* switch (class_code) */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * We're not on a PCI bus, so assume an ISA bus type
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * register property. Get access to the adapter IO
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * registers on a non-PCI bus.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (ddi_regs_map_setup(dip, PCIC_ISA_CONTROL_REG_NUM,
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic%d: unable to map ISA registers\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* ddi_regs_map_setup */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* ISA bus is limited to 24-bits, but not first 640K */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* !PCF_PCIBUS */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "pcic_attach pc_flags=%x pc_type=%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Setup various adapter registers for the PCI case. For the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * non-PCI case, find out the chip type.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel iline = cardbus_validate_iline(dip, pcic->cfg_handle);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* set flags and socket counts based on chip type */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* we can only support 4 Socket version */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic%d: Intel 82092 adapter "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "in unsupported configuration: 0x%x",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* PCIC_82092_4_SOCKETS */
193974072f41a843678abf5f61979c748687e66bSherry Moore "interrupts", 0);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* if not interrupt pin then must use ISA style IRQs */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we have the option to use PCI interrupts.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * this might not be optimal but in some cases
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * is the only thing possible (sparc case).
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we now deterine what is possible.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* this chip doesn't do CardBus but looks like one */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* FALLTHROUGH */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* FALLTHROUGH */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* indicate feature even if not supported */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Not sure if these apply to all these chips */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * We're not on a PCI bus so do some more
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * checking for adapter type here.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * For the non-PCI bus case:
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * It could be any one of a number of different chips
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * If we can't determine anything else, it is assumed
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * to be an Intel 82365SL. The Cirrus Logic PD6710
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * has an extension register that provides unique
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * identification. Toshiba chip isn't detailed as yet.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Init the CL id mode */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* default to Intel i82365SL and then refine */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (value = 0; pcic_ci_funcs[value] != NULL; value++) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* go until one succeeds or none left */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* any chip specific flags get set here */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (i = 0; i < PCIC_MAX_SOCKETS; i++) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * look for total number of sockets.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * basically check each possible socket for
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * presence like in probe
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* turn all windows off */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * if a zero is read back, then this socket
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * might be present. It would be except for
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * some systems that map the secondary PCIC
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * chip space back to the first.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (value != 0) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* definitely not so skip */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* note: this is for Compaq support */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* further tests */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * at this point we know if we have hardware
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * of some type and not just the bus holding
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * a pattern for us. We still have to determine
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the case where more than 2 sockets are
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * really the same due to peculiar mappings of
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * hardware.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* put PC Card into RESET, just in case */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * need to think this through again in light of
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Compaq not following the model that all the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * chip vendors recommend. IBM 755 seems to be
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * afflicted as well. Basically, if the vendor
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * wired things wrong, socket 0 responds for socket 2
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * accesses, etc.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (i = 0; i < count; i++) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* put pattern into socket 0 */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* put pattern into socket 2 */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* read back socket 0 */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* read back chip 1 socket 0 */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (j == value) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* !PCF_PCIBUS */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * some platforms/busses need to have resources setup
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * this is temporary until a real resource allocator is
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * implemented.
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic%d: %d register sets, %d interrupts\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel while (nregs--) {
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tregnum %d size %ld (0x%lx)"
193974072f41a843678abf5f61979c748687e66bSherry Moore " mapped at: 0x%p\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tddi_dev_regsize(rnumber"
193974072f41a843678abf5f61979c748687e66bSherry Moore "= %d) returns DDI_FAILURE\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* while */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* if (pcic_debug) */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (!ddi_getprop(DDI_DEV_T_NONE, dip, DDI_PROP_DONTPASS,
193974072f41a843678abf5f61979c748687e66bSherry Moore "disable-audio", 0))
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (ddi_getprop(DDI_DEV_T_ANY, dip, DDI_PROP_CANSLEEP,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "disable-cardbus", 0))
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (void) ddi_prop_update_string(DDI_DEV_T_NONE, dip, PCICPROP_CTL,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Init all socket SMI levels to 0 (no SMI)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (i = 0; i < PCIC_MAX_SOCKETS; i++) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic->pc_lastreg = -1; /* just to make sure we are in sync */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Setup the IRQ handler(s)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * On a non-PCI bus, we just use whatever SMI IRQ level was
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * specified above, and the IO IRQ levels are allocated
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * dynamically.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* init to same so share is easy */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* any special handling of IRQ levels */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if ((i & 1) == 0) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic->pc_intr_htblp = kmem_alloc(pcic->pc_numsockets *
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (i = 0, irqlevel = -1; i < pcic->pc_numsockets; i++) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * now convert the allocated IRQ into an intrspec
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * and ask our parent to add it. Don't use
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the ddi_add_intr since we don't have a
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * default intrspec in all cases.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * note: this sort of violates DDI but we don't
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * get hardware intrspecs for many of the devices.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * at the same time, we know how to allocate them
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * so we do the right thing.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * See earlier note:
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Since some devices don't have 'intrspec'
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we make one up in rootnex.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * However, it is not properly initialized as
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the data it needs is present in this driver
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * and there is no interface to pass that up.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Specially 'irqlevel' is very important and
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * it is part of pcic struct.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Set 'intrspec' up here; otherwise adding the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * interrupt will fail.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Stay compatible w/ PCMCIA */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (i == 0) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "%s: ddi_intr_add_handler failed",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (j = i; j < 0; j--)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * If we're on a PCI bus, we route all interrupts, both SMI
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * and IO interrupts, through a single interrupt line.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Assign the SMI IRQ level to the IO IRQ level here.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic->pc_pci_intr_hdlp = kmem_alloc(sizeof (ddi_intr_handle_t),
3db86aab554edbb4244c8d1a1c90f152eee768afstevel mutex_init(&pcic->intr_lock, NULL, MUTEX_DRIVER, pcic->pc_pri);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel mutex_init(&pcic->pc_lock, NULL, MUTEX_DRIVER, NULL);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Stay compatible w/ PCMCIA */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* init to same (PCI) so share is easy */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Setup the adapter hardware to some reasonable defaults.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* mark the driver state as attached */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "type = %s sockets = %d\n", typename,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Give the Cardbus misc module a chance to do it's per-adapter
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * instance setup. Note that there is no corresponding detach()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (cardbus_attach(dip, &pcic_cbnexus_ops) != DDI_SUCCESS) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic_attach: cardbus_attach failed\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Give the PCMCIA misc module a chance to do it's per-adapter
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * instance setup.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if ((i = pcmcia_attach(dip, pcic_nexus)) != DDI_SUCCESS)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* This assumes that all instances run at the same IPL. */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_maxinst = max(pcic_maxinst, ddi_get_instance(dip));
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Setup a debounce timeout to do an initial card detect
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * and enable interrupts.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (i);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (j = i; j < 0; j--)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (void) pcmcia_return_intr(dip, pcic->pc_sockets[i].pcs_smi);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel kmem_free(pcic->pc_pci_intr_hdlp, sizeof (ddi_intr_handle_t));
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_detach()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * request to detach from the system
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* don't detach if the nexus still talks to us */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* kill off the pm simulation */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* turn everything off for all sockets and chips */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* disable interrupts and put card into RESET */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (void) ddi_intr_remove_handler(pcic->pc_pci_intr_hdlp[0]);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel kmem_free(pcic->pc_pci_intr_hdlp, sizeof (ddi_intr_handle_t));
3db86aab554edbb4244c8d1a1c90f152eee768afstevel ddi_soft_state_free(pcic_soft_state_p, ddi_get_instance(dip));
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we got a suspend event (either real or imagined)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * so notify the nexus proper that all existing cards
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * should go away.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* turn everything off for all sockets and chips */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* disable interrupts and put card into RESET */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (pcic->pc_sockets[i].pcs_flags & PCS_CARD_PRESENT) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Because we are half way through a save
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * all this does is schedule a removal event
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * to cs for when the system comes back.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * This doesn't actually matter.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * when true power management exists, save the adapter
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * state here to enable a recovery. For the emulation
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * condition, the state is gone
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic uint32_t pcic_tisysctl_onbits = ((1<<27) | (1<<15) | (1<<14));
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China#if defined(__i386) || defined(__amd64)
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China pci_regspec_t *reg;
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China uchar_t bus, dev, func;
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China uint_t classcode;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * all PCI-to-PCMCIA bus bridges need memory and I/O enabled
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_iomem_pci_ctl(pcic->cfg_handle, pcic->cfgaddr, flags);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* enable each socket */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* find out the socket capabilities (I/O vs memory) */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (value == PCIC_REV_ID_IO || value == PCIC_REV_ID_BOTH)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* disable all windows just in case */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* enable extended registers for Vadem */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* enable card status change interrupt for socket */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, 0, PCIC_MISC_CTL_2, PCIC_LED_ENABLE);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * On the CL_6730, we need to set up the interrupt
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * signalling mode (PCI mode) and set the SMI and
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * IRQ interrupt lines to PCI/level-mode.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * On the CL_6729, we set the SMI and IRQ interrupt
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * lines to PCI/level-mode. as well as program the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * correct clock speed divider bit.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "write reg 0x%x=%x \n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel " write reg 0x%x=%x \n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cfg |= (PCIC_DEVCTL_INTR_DFLT | PCIC_DEVCTL_3VCAPABLE);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel " write reg 0x%x=%x \n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel " write reg 0x%x=%x \n",
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China /* functional intr routed by ExCA register */
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China /* IRQ serialized interrupts */
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China cfg = ddi_get8(pcic->cfg_handle,
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China cfg &= ~PCIC_DEVCTL_INTR_MASK;
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China cfg |= PCIC_DEVCTL_INTR_ISA;
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China ddi_put8(pcic->cfg_handle,
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China /* CSC interrupt routed to PCI */
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China cfg = ddi_get8(pcic->cfg_handle,
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China pcic->cfgaddr + PCIC_DIAG_REG);
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China cfg |= (PCIC_DIAG_CSC | PCIC_DIAG_ASYNC);
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China ddi_put8(pcic->cfg_handle,
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China pcic->cfgaddr + PCIC_DIAG_REG, cfg);
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China#if defined(__i386) || defined(__amd64)
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China * Some TI chips have 2 cardbus slots(function0 and
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China * function1), and others may have just 1 cardbus slot.
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China * The interrupt routing register is shared between the
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China * 2 functions and can only be accessed through
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China * function0. Here we check the presence of the second
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China * cardbus slot and do the right thing.
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China if (ddi_getlongprop(DDI_DEV_T_ANY, pcic->dip,
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China DDI_PROP_DONTPASS, "reg", (caddr_t)®,
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China &length) != DDI_PROP_SUCCESS) {
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_setup_adapter(), failed to"
193974072f41a843678abf5f61979c748687e66bSherry Moore " read reg property\n");
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China bus = PCI_REG_BUS_G(reg->pci_phys_hi);
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China dev = PCI_REG_DEV_G(reg->pci_phys_hi);
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China func = PCI_REG_FUNC_G(reg->pci_phys_hi);
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China kmem_free((caddr_t)reg, length);
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China if (func != 0) {
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China classcode = (*pci_getl_func)(bus, dev, 1,
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China classcode >>= 8;
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China if (classcode != 0x060700 &&
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China classcode != 0x060500) {
e12b469ade633bb8f834d51aab6173e6f6f8c6d9rui wang - Sun Microsystems - Beijing China /* Parallel PCI interrupts only */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* tie INTA and INTB together */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* switch */
bb3a048dd74d073e10c2a5d4aa060b4405ba7dfdrw * The default value in the EEPROM (loaded on reset) for
bb3a048dd74d073e10c2a5d4aa060b4405ba7dfdrw * MFUNC0/MFUNC1 may be incorrect. Here we make sure that
bb3a048dd74d073e10c2a5d4aa060b4405ba7dfdrw * MFUNC0 is connected to INTA, and MFUNC1 is connected to
bb3a048dd74d073e10c2a5d4aa060b4405ba7dfdrw * INTB. This applies to all TI CardBus controllers.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* setup general card status change interrupt */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* take card out of RESET */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* turn power off and let CS do this */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* final chip specific initialization */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* FALLTHROUGH */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* clear any pending interrupts */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* The 82092 uses PCI config space to enable interrupts */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (pcic->bus_speed >= PCIC_PCI_DEF_SYSCLK && i == 0) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* switch */
193974072f41a843678abf5f61979c748687e66bSherry Moore "socket %d value=%x, flags = %x (%s)\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_intr(caddr_t, caddr_t)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * interrupt handler for the PCIC style adapter
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * handles all basic interrupts and also checks
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * for status changes and notifies the nexus if
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * necessary
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * On PCI bus adapters, also handles all card
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * IO interrupts.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/*ARGSUSED*/
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_intr: enter pc_flags=0x%x PCF_ATTACHED=0x%x"
193974072f41a843678abf5f61979c748687e66bSherry Moore " pc_numsockets=%d \n",
193974072f41a843678abf5f61979c748687e66bSherry Moore pcic->pc_flags, PCF_ATTACHED, pcic->pc_numsockets);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * need to change to only ACK and touch the slot that
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * actually caused the interrupt. Currently everything
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we need to look at all known sockets to determine
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * what might have happened, so step through the list
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Set the bitmask for IO interrupts to initially include all sockets
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* get the socket's I/O addresses */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "card_type = %d, value_cb = 0x%x\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tchange on socket %d (%x)\n", i,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* find out what happened */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* acknowledge the interrupt */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* if not callback handler, nothing to do */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Card Detect */
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tcd_detect: status=%x,"
193974072f41a843678abf5f61979c748687e66bSherry Moore " flags=%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Turn off all interrupts for this socket here.
0d282d1376eb7ba06504448622a6d65726e4bd3erw * Put the socket in debouncing state so that
0d282d1376eb7ba06504448622a6d65726e4bd3erw * the leaf driver won't receive interrupts.
0d282d1376eb7ba06504448622a6d65726e4bd3erw * Crucial for handling surprise-removal.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* PCIC_CD_DETECT */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Ready/Change Detect */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (card_type == IF_MEMORY && value & PCIC_RD_DETECT) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Battery Warn Detect */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Battery Dead Detect */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * need to work out event if RI not enabled
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * and card_type == IF_IO
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * information in pin replacement
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * register if one is available
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* IF_MEMORY */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* PCIC_BD_DETECT */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* if pcic_change */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * for any controllers that we can detect whether a socket
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * had an interrupt for the PC Card, we should sort that out
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* for pc_numsockets */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * If we're on a PCI bus, we may need to cycle through each IO
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * interrupt handler that is registered since they all
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * share the same interrupt line.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic_intr: pc_intr_mode=%d pc_type=%x io_ints=0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic_intr: ret=%d value=%d DDI_INTR_CLAIMED=%d\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_change()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * check to see if this socket had a change in state
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * by checking the status change register
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (pcic_getb(pcic, socket, PCIC_CARD_STATUS_CHANGE));
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_do_io_intr - calls client interrupt handlers
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_do_io_intr: pcic=%p sockets=%d irq_top=%p\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore (void *)pcic, (int)sockets, (void *)pcic->irq_top);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "\t pcs_flags=0x%x PCS_CARD_PRESENT=0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "\t sockets=%d cur=%d intr=%p arg1=%p "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "arg2=%p\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if ((*pcic->irq_current->intr)(pcic->irq_current->arg1,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "\t ret=%d DDI_INTR_CLAIMED=%d\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if ((pcic->irq_current = pcic->irq_current->next) == NULL)
193974072f41a843678abf5f61979c748687e66bSherry Moore if ((pcic->irq_current = pcic->irq_current->next) == NULL)
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_do_io_intr: exit ret=%d DDI_INTR_CLAIMED=%d\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_inquire_adapter()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * SocketServices InquireAdapter function
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * get characteristics of the physical adapter
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/*ARGSUSED*/
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_inquire_adapter(dev_info_t *dip, inquire_adapter_t *config)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel config->NumWindows = pcic->pc_numsockets * PCIC_NUMWINSOCK;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel config->power_entry = pcic->pc_power; /* until we resolve this */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "\tNumSockets=%d\n", config->NumSockets);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "\tNumWindows=%d\n", config->NumWindows);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel config->ResourceFlags |= RES_OWN_IRQ | RES_IRQ_NEXUS |
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_callback()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * The PCMCIA nexus calls us via this function
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * in order to set the callback function we are
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * to call the nexus with
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/*ARGSUSED*/
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_callback(dev_info_t *dip, int (*handler)(), int arg)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we're now registered with the nexus
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * it is acceptable to do callbacks at this point.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * don't call back from here though since it could block
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_calc_speed (pcicdev_t *pcic, uint32_t speed)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * calculate the speed bits from the specified memory speed
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * there may be more to do here
3db86aab554edbb4244c8d1a1c90f152eee768afstevel uint32_t wspeed = 1; /* assume 1 wait state when unknown */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Intel chip wants it in waitstates */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* switch */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * These values are taken from the PC Card Standard Electrical Specification.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Generally the larger value is taken if 2 are possible.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel uint16_t cycle; /* Speed as found in the atribute space of he card. */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel uint16_t setup; /* Corresponding address setup time. */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel uint16_t hold; /* Corresponding data or address hold time. */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Note: The rounded up times for 250, 200 & 150 have been increased
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * due to problems with the 3-Com ethernet cards (pcelx) on UBIIi.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * See BugID 00663.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Rounded up times Original times from
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * that add up to the the PCMCIA Spec.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * cycle time.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_set_cdtimers
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * This is specific to several Cirrus Logic chips
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_set_cdtimers(pcicdev_t *pcic, int socket, uint32_t speed, int tset)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if ((tset == IOMEM_CLTIMER_SET_1) || (tset == SYSMEM_CLTIMER_SET_1))
193974072f41a843678abf5f61979c748687e66bSherry Moore for (ctp = pcic_card_times; speed < ctp->cycle; ctp++)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Add (clk_pulse/2) and an extra 1 to account for rounding errors.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel set = ((ctp->setup + 10 + 1 + (clk_pulse/2))/clk_pulse) - 1;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmd = ((ctp->width + 10 + 1 + (clk_pulse/2))/clk_pulse) - 1;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel rec = ((ctp->hold + 10 + 1 + (clk_pulse/2))/clk_pulse) - 2;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(pcic->dip, 8, "pcic_set_cdtimers(%d, Timer Set %d)\n"
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "ct=%d, cp=%d, cmd=0x%x, setup=0x%x, rec=0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_TIME_COMMAND_0 + offset, cmd);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_TIME_SETUP_0 + offset, set);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_TIME_RECOVER_0 + offset, rec);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_set_window
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * essentially the same as the Socket Services specification
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * We use socket and not adapter since they are identifiable
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * but the rest is the same
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * dip pcic driver's device information
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * window parameters for the request
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_set_window(dev_info_t *dip, set_window_t *window)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_socket_t *sockp = &pcic->pc_sockets[window->socket];
193974072f41a843678abf5f61979c748687e66bSherry Moore "\twindow=%d, socket=%d, WindowSize=%d, speed=%d\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore window->window, window->socket, window->WindowSize,
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tbase=%x, state=%x\n", (unsigned)window->base,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * do some basic sanity checking on what we support
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we don't do paged mode
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_WARN, "pcic_set_window: BAD_ATTRIBUTE\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we don't care about previous mappings.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Card Services will deal with that so don't
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * even check
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* this is memory window mapping */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* only windows 2-6 can do memory mapping */
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tattempt to map to non-mem window\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel else if ((window->WindowSize & (PCIC_PAGE-1)) != 0) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel mutex_enter(&pcic->pc_lock); /* protect the registers */
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tneed to remap window\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "\tpcmcia_alloc_mem() failed\n");
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tsetwindow: new base=%x\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore "failed\n");
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tmap=%x, hostmem=%p\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* report the handle back to caller */
193974072f41a843678abf5f61979c748687e66bSherry Moore "\twindow mapped to %x@%x len=%d\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* find the register set offset */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * at this point, the register window indicator has
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * been converted to be an offset from the first
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * set of registers that are used for programming
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the window mapping and the offset used to select
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the correct set of registers to access the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * specified socket. This allows basing everything
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * off the _0 window
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* map the physical page base address */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel which = (window->state & WS_16BIT) ? SYSMEM_DATA_16 : 0;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* need to select register set */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Some adapters can decode window addresses greater
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * than 16-bits worth, so handle them here.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Note that the TI chip has one upper byte
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * per socket so all windows get bound to a
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * 16MB segment. This must be detected and
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * handled appropriately. We can detect that
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * it is done by seeing if the pc_base has
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * changed and changing when the register
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * is first set. This will force the bounds
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * to be correct.
193974072f41a843678abf5f61979c748687e66bSherry Moore "cardbus vendor:0x%X\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* switch */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * specify the length of the mapped range
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we convert to pages (rounding up) so that
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the hardware gets the right thing
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Setup this window's timing.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* switch */
193974072f41a843678abf5f61979c748687e66bSherry Moore "\twindow %d speed bits = %x for "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_SYSMEM_0_STOPLOW + select,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_SYSMEM_0_STOPHI + select,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * now map the card's memory pages - we start with page
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we also default to AM -- set page might change it
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * enable the window even though redundant
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * and SetPage may do it again.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_MAPPING_ENABLE, select);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * not only do we unmap the memory, the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * window has been turned off.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* disable current mapping */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel select = pcic_getb(pcic, socket, PCIC_MAPPING_ENABLE);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_MAPPING_ENABLE, select);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * This is a request for an IO window
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* I/O windows */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* only windows 0 and 1 can do I/O */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (win >= PCIC_IOWINDOWS || tmp != window->socket) {
193974072f41a843678abf5f61979c748687e66bSherry Moore "\twindow is out of range (%d)\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel mutex_enter(&pcic->pc_lock); /* protect the registers */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (window->WindowSize != 1 && window->WindowSize & 1) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* we don't want an odd-size window */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * if the I/O address wasn't allocated, allocate
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * it now. If it was allocated, it better
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * be free to use.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * The winp->pcw_offset value is set and used
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * later on if the particular adapter
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * that we're running on has the ability
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * to translate IO accesses to the card
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * (such as some adapters in the Cirrus
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Logic family).
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Setup the request parameters for the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * requested base and length. If
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we're on an adapter that has
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * IO window offset registers, then
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we don't need a specific base
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * address, just a length, and then
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * we'll cause the correct IO address
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * to be generated on the socket by
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * setting up the IO window offset
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * registers.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * For adapters that support this capability, we
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * always use the IO window offset registers,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * even if the passed base/length would be in
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* need to rethink this */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Try to allocate the space. If we fail this,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * return the appropriate error depending
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * on whether the caller specified a
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * specific base address or not.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* pcmcia_alloc_io */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Don't change the original base. Either we use
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the offset registers below (PCF_IO_REMAP is set)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * or it was allocated correctly anyway.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "\tsetwindow: new base=%x orig base 0x%x\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore "failed\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* find the register set offset */
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tenable: window=%d, select=%x, "
193974072f41a843678abf5f61979c748687e66bSherry Moore "base=%x, handle=%p\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * at this point, the register window indicator has
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * been converted to be an offset from the first
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * set of registers that are used for programming
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the window mapping and the offset used to select
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the correct set of registers to access the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * specified socket. This allows basing everything
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * off the _0 window
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* map the I/O base in */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * We've got the requested IO space, now see if we
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * need to adjust the IO window offset registers
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * so that the correct IO address is generated
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * at the socket. If this window doesn't have
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * this capability, then we're all done setting
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * up the IO resources.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Note that only 16 bits are used to program
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the registers but leave 32 bits on pcw_offset
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * so that we can generate the original base
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * in get_window()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* PCF_IO_REMAP */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* now get the other details (size, etc) right */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Set the data size control bits here. Most of the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * adapters will ignore IOMEM_16BIT when
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * IOMEM_IOCS16 is set, except for the Intel
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * 82092, which only pays attention to the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * IOMEM_16BIT bit. Sigh... Intel can't even
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * make a proper clone of their own chip.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * The 82092 also apparently can't set the timing
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * of I/O windows.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Select Timer Set 1 - this will take
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * effect when the PCIC_IO_CONTROL
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * register is written to later on;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the call to pcic_set_cdtimers
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * just sets up the timer itself.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* switch (pc_type) */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Setup the data width and timing
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Enable the IO window
3db86aab554edbb4244c8d1a1c90f152eee768afstevel select = pcic_getb(pcic, socket, PCIC_MAPPING_ENABLE);
193974072f41a843678abf5f61979c748687e66bSherry Moore "\twhich = %x, select = %x (%x)\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * not only do we unmap the IO space, the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * window has been turned off.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* disable current mapping */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* now make sure we don't accidentally re-enable */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* find the register set offset */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_card_state()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * compute the instantaneous Card State information
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_card_state(pcicdev_t *pcic, pcic_socket_t *sockp)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel mutex_enter(&pcic->pc_lock); /* protect the registers */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel value = pcic_getb(pcic, sockp->pcs_socket, PCIC_INTERFACE_STATUS);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "pcic_card_state(%p) if status = %b for %d\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore "\020\1BVD1\2BVD2\3CD1\4CD2\5WP\6RDY\7PWR\10~GPI",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Lie to socket services if we are not ready.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * This is when we are starting up or during debounce timeouts
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * or if the card is a cardbus card.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (!(sockp->pcs_flags & (PCS_STARTING|PCS_CARD_ISCARDBUS)) &&
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (value & PCIC_ISTAT_CD_MASK) == PCIC_CD_PRESENT_OK) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (value & PCIC_WRITE_PROTECT || !(value & PCIC_POWER_ON))
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic_card_state(%p) if status = %b for %d (rval=0x%x)\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "\020\1BVD1\2BVD2\3CD1\4CD2\5WP\6RDY\7PWR\10~GPI",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_set_page()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * SocketServices SetPage function
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * set the page of PC Card memory that should be in the mapped
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/*ARGSUSED*/
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* get real socket/window numbers */
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_set_page: window=%d, socket=%d, page=%d\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* only windows 2-6 work on memory */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* only one page supported (but any size) */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel mutex_enter(&pcic->pc_lock); /* protect the registers */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel memp = &pcic->pc_sockets[socket].pcs_windows[window].mem;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "\tpcw_base=%x, pcw_hostmem=%p, pcw_len=%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* window must be enabled */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* find the register set offset */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * now map the card's memory pages - we start with page 0
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * if caller says Write Protect, enforce it.
193974072f41a843678abf5f61979c748687e66bSherry Moore (which & CARDMEM_REG_ACTIVE) ? "attribute" : "common");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "\tpage offset=%x pcw_base=%x (%x)\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore (int)page->offset - (int)memp->pcw_base & 0xffffff);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* address computation based on 64MB range and not larger */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (void) pcic_getb(pcic, socket, PCIC_CARDMEM_0_LOW + select);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (void) pcic_getb(pcic, socket, PCIC_CARDMEM_0_HI + select);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * while not really necessary, this just makes sure
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * nothing turned the window off behind our backs
3db86aab554edbb4244c8d1a1c90f152eee768afstevel which = pcic_getb(pcic, socket, PCIC_MAPPING_ENABLE);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_set_vcc_level()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * set voltage based on adapter information
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * this routine implements a limited solution for support of 3.3v cards.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the general solution, which would fully support the pcmcia spec
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * as far as allowing client drivers to request which voltage levels
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * to be set, requires more framework support and driver changes - ess
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_set_vcc_level(pcicdev_t *pcic, set_socket_t *socket)
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_set_vcc_level(pcic=%p, VccLevel=%d)\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * check VccLevel
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * if this is zero, power is being turned off
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * if it is non-zero, power is being turned on.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (0);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * range checking for sanity's sake
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Yenta-compliant adapters have vcc info in the extended registers
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Other adapters can be added as needed, but the 'default' case
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * has been left as it was previously so as not to break existing
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * adapters.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Here we ignore the VccLevel passed in and read the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * card type from the adapter socket present state register
193974072f41a843678abf5f61979c748687e66bSherry Moore ddi_get32(pcic->handle, (uint32_t *)(pcic->ioaddr +
193974072f41a843678abf5f61979c748687e66bSherry Moore "socket present state = 0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* fall through */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * if no card is present, this can be the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * case of a client making a SetSocket call
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * after card removal. In this case we return
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the current power level
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* enable Vcc */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_set_socket()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Socket Services SetSocket call
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * sets basic socket configuration
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_set_socket(dev_info_t *dip, set_socket_t *socket)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_socket_t *sockp = &pcic->pc_sockets[socket->socket];
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic_set_socket(dip=%p, socket=%d)"
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * check VccLevel, etc. before setting mutex
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * if this is zero, power is being turned off
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * if it is non-zero, power is being turned on.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the default case is to assume Vcc only.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* this appears to be very implementation specific */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (socket->VccLevel == 0 || !(sockp->pcs_flags & PCS_CARD_PRESENT)) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(dip, 9, "\tVcc=%d Vpp1Level=%d, Vpp2Level=%d\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel socket->VccLevel, socket->Vpp1Level, socket->Vpp2Level);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* valid Vcc power level? */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "%s%d: Bad Request for 3.3V "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "(Controller incapable)\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* FALLTHROUGH */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * This is actually a 3.3V card.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Solaris Card Services
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * doesn't understand 3.3V
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * so we cheat and change
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the setting to the one appropriate to 3.3V.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Note that this is the entry number
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * in the pcic_power[] array.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* enable Vcc */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * this adapter doesn't allow separate Vpp1/Vpp2
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * if one is turned on, both are turned on and only
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the Vpp1 bits should be set
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* must be the same if one not zero */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "%s%d: Bad Power Request "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "(Vpp1/2 not the same)\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel mutex_enter(&pcic->pc_lock); /* protect the registers */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* turn socket->IREQRouting off while programming */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel interrupt = pcic_getb(pcic, socket->socket, PCIC_INTERRUPT);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket->socket, PCIC_INTERRUPT, interrupt);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_82092_smiirq_ctl(pcic, socket->socket, PCIC_82092_CTL_IRQ,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* switch */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* the SCIntMask specifies events to detect */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel mirq = pcic_getb(pcic, socket->socket, PCIC_MANAGEMENT_INT);
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tSCIntMask=%x, interrupt=%x, mirq=%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel mirq &= ~(PCIC_BD_DETECT|PCIC_BW_DETECT|PCIC_RD_DETECT);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* save the mask we want to use */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Until there is a card present it's not worth enabling
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * any interrupts except "Card detect". This is done
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * elsewhere in the driver so don't change things if
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * there is no card!
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* now update the hardware to reflect events desired */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (sockp->pcs_intmask & SBM_BVD1 || socket->IFType == IF_IO)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * card just came ready.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * make sure enough time elapses
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * before touching it.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "\tstatus change set to %x\n", mirq);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * The Intel version has different options. This is a
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * special case of GPI which might be used for eject
3db86aab554edbb4244c8d1a1c90f152eee768afstevel irq = pcic_getb(pcic, socket->socket, PCIC_CARD_DETECT);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket->socket, PCIC_CARD_DETECT, irq);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket->socket, PCIC_MISC_CTL_2, 0x0);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel value = pcic_getb(pcic, socket->socket, PCIC_MISC_CTL_1);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if ((socket->IFType == IF_IO) && (pcic->pc_flags & PCF_AUDIO)) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket->socket, PCIC_MISC_CTL_1, value);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if ((socket->IFType == IF_IO) && (pcic->pc_flags & PCF_AUDIO))
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if ((socket->IFType == IF_IO) && (pcic->pc_flags & PCF_AUDIO)) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * ctlind processing -- we can ignore this
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * there aren't any outputs on the chip for this and
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the GUI will display what it thinks is correct
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * If outputs are enabled and the power is going off
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * turn off outputs first.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* power setup -- if necessary */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel orig_pwrctl = pcic_getb(pcic, socket->socket, PCIC_POWER_CONTROL);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if ((orig_pwrctl & POWER_OUTPUT_ENABLE) && sockp->pcs_vcc == 0) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (void) pcic_getb(pcic, socket->socket, PCIC_POWER_CONTROL);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel value = pcic_exca_powerctl(pcic, socket->socket, powerlevel);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * If outputs were disabled and the power is going on
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * turn on outputs afterwards.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (!(orig_pwrctl & POWER_OUTPUT_ENABLE) && sockp->pcs_vcc != 0) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (void) pcic_getb(pcic, socket->socket, PCIC_POWER_CONTROL);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Once we have done the power stuff can re-enable management
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * interrupts.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket->socket, PCIC_MANAGEMENT_INT, mirq);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(dip, 8, "\tmanagement int set to %x pwrctl to 0x%x "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "cbctl 0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel mirq, pcic_getb(pcic, socket->socket, PCIC_POWER_CONTROL),
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* irq processing */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* IRQ only for I/O */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel value = pcic_getb(pcic, socket->socket, PCIC_INTERRUPT);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* to enable I/O operation */
193974072f41a843678abf5f61979c748687e66bSherry Moore "SetSocket: IRQ mismatch %x != %x!\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket->socket, PCIC_INTERRUPT, value);
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tsocket type is I/O and irq %x is %s\n", irq,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* make sure I/O mode is off */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel value = pcic_getb(pcic, socket->socket, PCIC_INTERRUPT);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket->socket, PCIC_INTERRUPT, value);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_inquire_socket()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * SocketServices InquireSocket function
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * returns basic characteristics of the socket
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/*ARGSUSED*/
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_inquire_socket(dev_info_t *dip, inquire_socket_t *socket)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel socket->SocketCaps = (value & PCS_SOCKET_IO) ? IF_IO : IF_MEMORY;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* these are the usable IRQs */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_inquire_window()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * SocketServices InquireWindow function
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * returns detailed characteristics of the window
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * this is where windows get tied to sockets
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/*ARGSUSED*/
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_inquire_window(dev_info_t *dip, inquire_window_t *window)
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_inquire_window: window = %d/%d socket=%d\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* initialize the socket map - one socket per window */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel mem->MemWndCaps = WC_BASE|WC_SIZE|WC_WENABLE|WC_8BIT|
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_get_adapter()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * SocketServices GetAdapter function
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * this is nearly a no-op.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/*ARGSUSED*/
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_get_adapter(dev_info_t *dip, get_adapter_t *adapt)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_get_page()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * SocketServices GetPage function
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * returns info about the window
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/*ARGSUSED*/
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* I/O windows are the first two */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (window < PCIC_IOWINDOWS || socket >= pcic->pc_numsockets) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel winp = &pcic->pc_sockets[socket].pcs_windows[window].mem;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_get_socket()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * SocketServices GetSocket
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * returns information about the current socket setting
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/*ARGSUSED*/
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_get_socket(dev_info_t *dip, get_socket_t *socket)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_get_status()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * SocketServices GetStatus
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * returns status information about the PC Card in
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the selected socket
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/*ARGSUSED*/
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_get_status(dev_info_t *dip, get_ss_status_t *status)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel irq_enabled = (sockp->pcs_flags & PCS_CARD_ENABLED) ?
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "pcic_get_status: socket=%d, CardState=%x,"
193974072f41a843678abf5f61979c748687e66bSherry Moore "SocketState=%x\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore socknum, status->CardState, status->SocketState);
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_get_status: present_state=0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_get_window()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * SocketServices GetWindow function
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * returns state information about the specified window
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/*ARGSUSED*/
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_get_window(dev_info_t *dip, get_window_t *window)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "pcic_get_window(socket=%d, window=%d)\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel window->base = (uint32_t)winp->pcw_base + winp->pcw_offset;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "\tsize=%d, speed=%d, base=%p, state=%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_ll_reset
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * low level reset
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * separated out so it can be called when already locked
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * There are two variables that control the RESET timing:
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_prereset_time - time in mS before asserting RESET
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_reset_time - time in mS to assert RESET
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* save windows that were on */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel windowbits = pcic_getb(pcic, socket, PCIC_MAPPING_ENABLE);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* turn all windows off */
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_ll_reset(socket %d) powerlevel=%x cbctl 0x%x cbps 0x%x\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore socket, pcic_getb(pcic, socket, PCIC_POWER_CONTROL),
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Set VPP to VCC for the duration of the reset - for aironet
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putcb(pcic, CB_CONTROL, (pwr&~CB_C_VPPMASK)|CB_C_VPPVCC);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(pcic->dip, 8, "pcic_ll_reset pre_wait %d mS\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* turn interrupts off and start a reset */
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_ll_reset turn interrupts off and start a reset\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_82092_smiirq_ctl(pcic, socket, PCIC_82092_CTL_IRQ,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* switch */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(pcic->dip, 8, "pcic_ll_reset reset_wait %d mS\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(pcic->dip, 8, "pcic_ll_reset take it out of reset now\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* take it out of RESET now */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_INTERRUPT, PCIC_RESET | iobits);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * can't access the card for 20ms, but we really don't
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * want to sit around that long. The pcic is still usable.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * memory accesses must wait for RDY to come up.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(pcic->dip, 8, "pcic_ll_reset post_wait %d mS\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Return VPP power to whatever it was before.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(pcic->dip, 7, "pcic_ll_reset returning 0x%x\n", windowbits);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_reset_socket()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * SocketServices ResetSocket function
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * puts the PC Card in the socket into the RESET state
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * and then takes it out after the the cycle time
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * The socket is back to initial state when done
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_reset_socket(dev_info_t *dip, int socket, int mode)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "pcic_reset_socket(%p, %d, %d/%s)\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel mutex_enter(&pcic->pc_lock); /* protect the registers */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Turn off management interupts. */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_MANAGEMENT_INT, mint & ~PCIC_CHANGE_MASK);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* disable and unmap all mapped windows */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (i = 0; i < PCIC_NUMWINSOCK; i++) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* turn windows back on */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* wait the rest of the time here */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_set_interrupt()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * SocketServices SetInterrupt function
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_set_interrupt(dev_info_t *dip, set_irq_handler_t *handler)
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_set_interrupt: entered pc_intr_mode=0x%x\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore "\t irq_top=%p handler=%p handler_id=%x\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore (void *)pcic->irq_top, (void *)handler->handler,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * If we're on a PCI bus, we route all IO IRQs through a single
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * PCI interrupt (typically INT A#) so we don't have to do
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * much other than add the caller to general interrupt handler
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * and set some state.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel intr = kmem_zalloc(sizeof (inthandler_t), KM_NOSLEEP);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * We only allow above-lock-level IO IRQ handlers
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * in the PCI bus case.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * need to revisit this to see if interrupts can be
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * shared someday. Note that IRQ is set in the common
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * need to fill in cookies in event of multiple high priority
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * interrupt handlers on same IRQ
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_set_interrupt: exit irq_top=%p value=%d\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_clear_interrupt()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * SocketServices ClearInterrupt function
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Interrupts for PCIC are complicated by the fact that we must
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * follow several different models for interrupts.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * ISA: there is an interrupt per adapter and per socket and
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * they can't be shared.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * PCI: some adapters have one PCI interrupt available while others
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * have up to 4. Solaris may or may not allow us to use more
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * than 1 so we essentially share them all at this point.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Hybrid: PCI bridge but interrupts wired to host interrupt controller.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * This is like ISA but we have to fudge and create an intrspec
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * that PCI's parent understands and bypass the PCI nexus.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * multifunction: this requires sharing the interrupts on a per-socket
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_clear_interrupt(dev_info_t *dip, clear_irq_handler_t *handler)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * If we're on a PCI bus, we route all IO IRQs through a single
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * PCI interrupt (typically INT A#) so we don't have to do
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * much other than remove the caller from the general
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * interrupt handler callout list.
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_clear_interrupt: entered pc_intr_mode=0x%x\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore "\t irq_top=%p handler=%p handler_id=%x\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore (void *)pcic->irq_top, (void *)handler->handler,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* multi-handler form */
193974072f41a843678abf5f61979c748687e66bSherry Moore "removing interrupt %d at %s "
193974072f41a843678abf5f61979c748687e66bSherry Moore "ddi_remove_intr(%p, %x, %p)\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore } /* if (handler_id) */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* while */
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_clear_interrupt: exit irq_top=%p\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel {"ident ", 0},
3db86aab554edbb4244c8d1a1c90f152eee768afstevel {"if-status ", 1, "\020\1BVD1\2BVD2\3CD1\4CD2\5WP\6RDY\7PWR\10~GPI"},
3db86aab554edbb4244c8d1a1c90f152eee768afstevel {"power ", 2, "\020\1Vpp1c0\2Vpp1c1\3Vpp2c0\4Vpp2c1\5PE\6AUTO"
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "\7DRD\10OE"},
3db86aab554edbb4244c8d1a1c90f152eee768afstevel {"cardstatus", 4, "\020\1BD\2BW\3RC\4CD\5GPI\6R1\7R2\010R3"},
3db86aab554edbb4244c8d1a1c90f152eee768afstevel {"enable ", 6, "\020\1MW0\2MW1\3MW2\4MW3\5MW4\6MEM16\7IO0\10IO1"},
3db86aab554edbb4244c8d1a1c90f152eee768afstevel {"cd-gcr ", 0x16, "\020\1MDI16\2CRE\3GPIE\4GPIT\5CDR\6S/W"},
3db86aab554edbb4244c8d1a1c90f152eee768afstevel {"volt-sense", 0x1f, "\020\1A_VS1\2A_VS2\3B_VS1\4B_VS2"},
3db86aab554edbb4244c8d1a1c90f152eee768afstevel {"volt-sel ", 0x2f, "\020\5EXTCONF\6BUSSELECT\7MIXEDV\10ISAV"},
3db86aab554edbb4244c8d1a1c90f152eee768afstevel {"VG ext A ", 0x3c, "\20\3IVS\4CABLE\5CSTEP\6TEST\7RIO"},
3db86aab554edbb4244c8d1a1c90f152eee768afstevel {"io-ctrl ", 7, "\020\1DS0\2IOCS0\3ZWS0\4WS0\5DS1\6IOS1\7ZWS1\10WS1"},
3db86aab554edbb4244c8d1a1c90f152eee768afstevel {"misc-ctl1 ", 0x16, "\20\2VCC3\3PMI\4PSI\5SPKR\10INPACK"},
3db86aab554edbb4244c8d1a1c90f152eee768afstevel {"misc-ctl2 ", 0x1e, "\20\1XCLK\2LOW\3SUSP\4CORE5V\5TCD\10RIOUT"},
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "\20\1VCCLCK\2AUTOCLR\3LED\4INVIRQC\5INVIRQM\6PUC"},
3db86aab554edbb4244c8d1a1c90f152eee768afstevelxxdmp_cl_regs(pcicdev_t *pcic, int socket, uint32_t len)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "--------- Cirrus Logic Registers --------\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (buff[0] = '\0', i = 0; cregs[i].name != NULL && len-- != 0; i++) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (i & 1) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "\tsetup-tim0\t%x\tsetup-tim1\t%x\n", i, j);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "\tcmd-tim0 \t%x\tcmd-tim1 \t%x\n", i, j);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "\trcvr-tim0 \t%x\trcvr-tim1 \t%x\n", i, j);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "--------- Extended Registers --------\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (buff[0] = '\0', i = 0; cxregs[i].name != NULL && len-- != 0; i++) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (i & 1) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevelxxdmp_all_regs(pcicdev_t *pcic, int socket, uint32_t len)
193974072f41a843678abf5f61979c748687e66bSherry Moore "----------- PCIC Registers for socket %d---------\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore "\tname value name value\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (buff[0] = '\0', i = 0; iregs[i].name != NULL && len-- != 0; i++) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (i & 1) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_mswait(ms)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * sleep ms milliseconds
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * call drv_usecwait once for each ms
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_check_ready(pcic, index, off)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Wait for card to come ready
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * We only wait if the card is NOT in RESET
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * and power is on.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel ifstate = pcic_getb(pcic, socket, PCIC_INTERFACE_STATUS);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel ((ifstate & (PCIC_READY|PCIC_POWER_ON|PCIC_ISTAT_CD_MASK)) ==
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(NULL, 5, "pcic_check_read: Card not ready, intstate = 0x%x, "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Cirrus Logic extended register read/write routines
3db86aab554edbb4244c8d1a1c90f152eee768afstevelclext_reg_read(pcicdev_t *pcic, int sn, uchar_t ext_reg)
3db86aab554edbb4244c8d1a1c90f152eee768afstevelclext_reg_write(pcicdev_t *pcic, int sn, uchar_t ext_reg, uchar_t value)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Misc PCI functions
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_iomem_pci_ctl(ddi_acc_handle_t handle, uchar_t *cfgaddr, unsigned flags)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* if (PCIC_ENABLE_IO | PCIC_ENABLE_MEM) */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_find_pci_type - Find and return PCI-PCMCIA adapter type
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Some 6730's incorrectly identify themselves
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * as a 6729, so we need to do some more tests
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * here to see if the device that's claiming
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * to be a 6729 is really a 6730.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if ((clext_reg_read(pcic, 0, PCIC_CLEXT_MISC_CTL_3) &
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_82092_smiirq_ctl(pcicdev_t *pcic, int socket, int intr, int state)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel ddi_put8(pcic->cfg_handle, pcic->cfgaddr + PCIC_82092_PPIRR,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel status = pcic_getb(sockp->pcs_pcic, sockp->pcs_socket,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_handle_cd_change(sockp->pcs_pcic, sockp, status);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic uint32_t pcic_cbps_off = CB_PS_NOTACARD | CB_PS_CCDMASK |
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic uint32_t pcic_cbps_off = CB_PS_NOTACARD | CB_PS_CCDMASK |
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_handle_cd_change(pcicdev_t *pcic, pcic_socket_t *sockp, uint8_t status)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel int debounce_time = drv_usectohz(pcic_debounce_time);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Always reset debounce but may need to check original state later.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Check to see whether a card is present or not. There are
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * only two states that we are concerned with - the state
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * where both CD pins are asserted, which means that the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * card is fully seated, and the state where neither CD
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pin is asserted, which means that the card is not
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * The CD signals are generally very noisy and cause a lot of
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * contact bounce as the card is being inserted and
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * removed, so we need to do some software debouncing.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic%d handle_cd_change: socket %d card status 0x%x"
193974072f41a843678abf5f61979c748687e66bSherry Moore sockp->pcs_flags &= ~(PCS_CARD_REMOVED|PCS_CARD_CBREM);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(pcic->dip, 8, "New card (0x%x)\n", sockp->pcs_flags);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Check the CB bits are sane.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "%s%d: Odd Cardbus Present State 0x%x\n",
193974072f41a843678abf5f61979c748687e66bSherry Moore pcic_putcb(pcic, CB_EVENT_FORCE, CB_EF_CVTEST);
193974072f41a843678abf5f61979c748687e66bSherry Moore /* calls pcm_adapter_callback() */
193974072f41a843678abf5f61979c748687e66bSherry Moore "32 bit Cardbus not"
193974072f41a843678abf5f61979c748687e66bSherry Moore " supported in"
193974072f41a843678abf5f61979c748687e66bSherry Moore " this device driver\n");
193974072f41a843678abf5f61979c748687e66bSherry Moore * Ignore the card
193974072f41a843678abf5f61979c748687e66bSherry Moore "32 bit Cardbus not"
193974072f41a843678abf5f61979c748687e66bSherry Moore " supported on this"
193974072f41a843678abf5f61979c748687e66bSherry Moore " device\n");
193974072f41a843678abf5f61979c748687e66bSherry Moore "Unsupported PCMCIA card"
193974072f41a843678abf5f61979c748687e66bSherry Moore " inserted\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * It is possible to come through here if the system
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * starts up with cards already inserted. Do nothing
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * and don't worry about it.
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic%d: Odd card insertion indication on socket %d\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Someone has started to insert a card so delay a while.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Otherwise this is basically the same as not present
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * so fall through.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* FALLTHRU */
193974072f41a843678abf5f61979c748687e66bSherry Moore if (debounce && (sockp->pcs_flags & PCS_CARD_REMOVED)) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Ensure that we do the unloading in the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * debounce handler, that way we're not doing
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * nasty things in an interrupt handler. e.g.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * a USB device will wait for data which will
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * obviously never come because we've
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * unplugged the device, but the wait will
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * wait forever because no interrupts can
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * come in...
193974072f41a843678abf5f61979c748687e66bSherry Moore /* pcic_dump_all(pcic); */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel } /* switch */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Delay doing
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * anything for a while so that things can settle
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * down a little. Interrupts are already disabled.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Reset the state and we'll reevaluate the
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * whole kit 'n kaboodle when the timeout fires
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(pcic->dip, 8, "Queueing up debounce timeout for "
193974072f41a843678abf5f61979c748687e66bSherry Moore "socket %d.%d\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * We bug out here without re-enabling interrupts. They will
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * be re-enabled when the debounce timeout swings through
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Turn on Card detect interrupts. Other interrupts will be
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * enabled during set_socket calls.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Note that set_socket only changes interrupt settings when there
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * is a card present.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel irq = pcic_getb(pcic, sockp->pcs_socket, PCIC_MANAGEMENT_INT);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, sockp->pcs_socket, PCIC_MANAGEMENT_INT, irq);
0d282d1376eb7ba06504448622a6d65726e4bd3erw /* Out from debouncing state */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(pcic->dip, 7, "Leaving pcic_handle_cd_change\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * pcic_getb()
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * get an I/O byte based on the yardware decode method
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "pcic_getb0: pcic=%p socket=%d reg=%d\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_CONT, "pcic_getb1: type=%d handle=%p ioaddr=%p \n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_putb(pcicdev_t *pcic, int socket, int reg, int8_t value)
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_putb0: pcic=%p socket=%d reg=%d value=%x \n",
193974072f41a843678abf5f61979c748687e66bSherry Moore "pcic_putb1: type=%d handle=%p ioaddr=%p \n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel ddi_put8(pcic->handle, pcic->ioaddr + CB_R2_OFFSET + reg,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * chip identification functions
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * chip identification: Cirrus Logic PD6710/6720/6722
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Init the CL id mode */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* chip is a Cirrus Logic and not Intel */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* now fine tune things just in case a 6722 */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel value1 = clext_reg_read(pcic, 0, PCIC_CLEXT_DMASK_0);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (value1 == 0) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel value1 = clext_reg_read(pcic, 0, PCIC_CLEXT_SCRATCH);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (1);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (0);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * chip identification: Vadem (VG365/465/468/469)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel ddi_put8(pcic->handle, pcic->ioaddr, pcic->pc_lastreg);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (pcic_getb(pcic, 0, PCIC_CHIP_REVISION) & PCIC_REV_MASK) ==
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* want to lock but leave mouse or other on */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (1);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (0);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * chip identification: Ricoh
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (1);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (1);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (0);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * set up available address spaces in busra
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (ddi_getlongprop(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "available", (caddr_t)&pcic_avail_p, &len) == DDI_PROP_SUCCESS) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * found "available" property at the cardbus/pcmcia node
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * need to translate address space entries from pcmcia
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * format to pci format
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pci_avail_p = kmem_alloc(sizeof (pci_regspec_t) * entries,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (pcic_apply_avail_ranges(dip, pcic_avail_p, pci_avail_p,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel kmem_free(pci_avail_p, entries * sizeof (pci_regspec_t));
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * "legacy" platforms will have "available" property in pci node
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (pdip = ddi_get_parent(dip); pdip; pdip = ddi_get_parent(pdip)) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (ddi_getlongprop(DDI_DEV_T_ANY, pdip, DDI_PROP_DONTPASS,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* (void) pci_resource_setup(pdip); */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "?pcic_init_assigned: no available property for pcmcia\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * This code is taken from pci_resource_setup() but does
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * not attempt to use the "available" property to populate
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the ndi maps that are created.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * The fact that we will actually
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * free some resource below (that was allocated by OBP)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * should be enough to be going on with.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel for (par = dip; par != NULL; par = ddi_get_parent(par)) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "device_type",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (ndi_ra_map_setup(par, NDI_RA_TYPE_MEM) != NDI_SUCCESS ||
3db86aab554edbb4244c8d1a1c90f152eee768afstevel ndi_ra_map_setup(par, NDI_RA_TYPE_IO) != NDI_SUCCESS))
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (ddi_getlongprop(DDI_DEV_T_ANY, pdip, 0, "bus-range",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "!No spare PCI bus numbers, range is "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "%u->%u, cardbus isn't usable\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "have been set up\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Have a valid parent with the "available" property
3db86aab554edbb4244c8d1a1c90f152eee768afstevel ddi_getlongprop(DDI_DEV_T_NONE, dip, DDI_PROP_DONTPASS,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "assigned-addresses",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * On the UltraBook IIi the ranges are assigned under
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * openboot. If we don't free them here the first I/O
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * space that can be used is up above 0x10000 which
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * doesn't work for this driver due to restrictions
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * on the PCI I/O addresses the controllers can cope with.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * They are never going to be used by anything else
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * so free them up to the general pool. AG.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel regs[1].pci_size_low == 0x4000)) /* UB-IIi || UB-I */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * translate "available" from pcmcia format to pci format
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_apply_avail_ranges(dev_info_t *dip, pcm_regs_t *pcic_p,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if (ddi_getlongprop(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, "ranges",
193974072f41a843678abf5f61979c748687e66bSherry Moore (caddr_t)&pcic_range_p, &range_len) != DDI_PROP_SUCCESS) {
193974072f41a843678abf5f61979c748687e66bSherry Moore "no ranges property for pcmcia\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* for each "available" entry to be translated */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pci_p->pci_phys_hi = -1u; /* default invalid value */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* for each "ranges" entry to be searched */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel uint64_t avail_end = pcic_p->phys_lo + pcic_p->phys_len;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel if ((range_p->pcic_range_caddrhi != pcic_p->phys_hi) ||
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_open(dev_t *dev, int flag, int otyp, cred_t *cred)
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_close(dev_t dev, int flag, int otyp, cred_t *cred)
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *cred,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (cardbus_ioctl(dev, cmd, arg, mode, cred, rval));
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_load_cardbus(pcicdev_t *pcic, const pcic_socket_t *sockp)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel s.State = (unsigned)~0;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic_load_cardbus: unsupported card voltage\n");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel s.State = (unsigned)~0;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel retval = cardbus_load_cardbus(dip, sockp->pcs_socket, pcic->pc_base);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_unload_cardbus(pcicdev_t *pcic, const pcic_socket_t *sockp)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (uint32_t *)(pcic->ioaddr + CB_CB_OFFSET + reg), value);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_enable_io_intr(pcicdev_t *pcic, int socket, int irq)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel value = pcic_getb(pcic, socket, PCIC_INTERRUPT) & ~PCIC_INTR_MASK;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_INTERRUPT, value | irq);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_82092_smiirq_ctl(pcic, socket, PCIC_82092_CTL_IRQ,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* route card functional interrupts to PCI interrupts */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic_enable_io_intr brdgctl(0x%x) was: 0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Flush the write */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel value = pcic_getb(pcic, socket, PCIC_INTERRUPT) & ~PCIC_INTR_MASK;
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_82092_smiirq_ctl(pcic, socket, PCIC_82092_CTL_IRQ,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Flush the write */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * This maps I/O interrupts to ExCA which
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * have been turned off by the write to
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * PCIC_INTERRUPT above. It would appear to
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * be the only way to actually turn I/O Ints off
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * while retaining CS Ints.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic_disable_io_intr brdgctl(0x%x) was: 0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Flush the write */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_enable_io_intr(pcic, 0, pcic->pc_sockets[0].pcs_irq);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel switch (op) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (void) sprintf(nm, "%s-%d", ddi_driver_name(pcic->dip),
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_WARN, "%s: primary err (%x):\n", nm, pci_cfg_stat);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_WARN, "%s: sec err (%x):\n", nm, pci_cfg_sec_stat);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pci_config_put16(pcic->cfg_handle, 0x16, pci_cfg_sec_stat);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (1);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel return (1);
11c2b4c0e543fe2e1e5910cde1f4422cc3218160rw pcic_mutex_enter(&pcic->pc_lock); /* protect the registers */
11c2b4c0e543fe2e1e5910cde1f4422cc3218160rw /* Enable interrupts on PCI if needs be */
11c2b4c0e543fe2e1e5910cde1f4422cc3218160rw pcic_mutex_exit(&pcic->pc_lock); /* protect the registers */
11c2b4c0e543fe2e1e5910cde1f4422cc3218160rw * The CardBus controller may be in RESET state after the
11c2b4c0e543fe2e1e5910cde1f4422cc3218160rw * system is resumed from sleeping. The RESET bit is in
11c2b4c0e543fe2e1e5910cde1f4422cc3218160rw * the Bridge Control register. This is true for all(TI,
11c2b4c0e543fe2e1e5910cde1f4422cc3218160rw * Toshiba ToPIC95/97, RICOH, and O2Micro) CardBus
11c2b4c0e543fe2e1e5910cde1f4422cc3218160rw * controllers. Need to clear the RESET bit explicitly.
193974072f41a843678abf5f61979c748687e66bSherry Moore "Failed to take pcic out of reset");
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic_debounce(0x%p, dip=0x%p) socket %d st 0x%x "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "chg 0x%x flg 0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (void *)pcs, (void *) pcs->pcs_pcic->dip, pcs->pcs_socket,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcs->pcs_pcic, pcs->pcs_socket, PCIC_CARD_STATUS_CHANGE,
3db86aab554edbb4244c8d1a1c90f152eee768afstevelstatic void *
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(NULL, 6, "pcic: Failed to find debounce id 0x%p\n", id);
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_exca_powerctl(pcicdev_t *pcic, int socket, int powerlevel)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* power setup -- if necessary */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel orig_pwrctl = pcic_getb(pcic, socket, PCIC_POWER_CONTROL);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic_exca_powerctl(socket %d) powerlevel=%x orig 0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* Preserve the PCIC_OUTPUT_ENABLE (control lines output enable) bit. */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * set power to socket
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * note that the powerlevel was calculated earlier
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_POWER_CONTROL, powerlevel);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * this second write to the power control register
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * is needed to resolve a problem on
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * the IBM ThinkPad 750
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * where the first write doesn't latch.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * The second write appears to always work and
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * doesn't hurt the operation of other chips
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * so we can just use it -- this is good since we can't
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * determine what chip the 750 actually uses
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * (I suspect an early Ricoh).
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_POWER_CONTROL, powerlevel);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "\tpowerlevel reg = %x (ifs %x)\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "CBus regs: PS 0x%x, Control 0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * since power was touched, make sure it says it
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * is on. This lets it become stable.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic socket %d: Power didn't get turned"
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "on!\nif status 0x%x pwrc 0x%x(x%x) "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "misc1 0x%x igc 0x%x ind %d\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "\tind = %d, if status %x pwrc 0x%x "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "misc1 0x%x igc 0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* explicitly turned off the power */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putb(pcic, socket, PCIC_POWER_CONTROL, powerlevel);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_putcb(pcic, CB_STATUS_EVENT, CB_SE_POWER_CYCLE);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic_cbus_powerctl(socket %d) vcc %d vpp1 %d "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "cbctl 0x%x->0x%x\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel socket, sockp->pcs_vcc, sockp->pcs_vpp1, orig_cbctl, cbctl);
193974072f41a843678abf5f61979c748687e66bSherry Moore (orig_cbctl & (CB_C_VCCMASK|CB_C_VPPMASK)) == 0) {
193974072f41a843678abf5f61979c748687e66bSherry Moore iobits = pcic_getb(pcic, socket, PCIC_INTERRUPT);
193974072f41a843678abf5f61979c748687e66bSherry Moore if ((cbctl & CB_C_VCCMASK) == (orig_cbctl & CB_C_VCCMASK)) {
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * delay 400 ms: though the standard defines that the Vcc
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * set-up time is 20 ms, some PC-Card bridge requires longer
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * duration.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * Note: We should check the status AFTER the delay to give time
3db86aab554edbb4244c8d1a1c90f152eee768afstevel * for things to stabilize.
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* break; */
3db86aab554edbb4244c8d1a1c90f152eee768afstevel cmn_err(CE_WARN, "cbus_powerctl: bad power request\n");
193974072f41a843678abf5f61979c748687e66bSherry Moore "cbstev = 0x%x cbps = 0x%x cbctl 0x%x(0x%x)",
193974072f41a843678abf5f61979c748687e66bSherry Moore (orig_cbctl & (CB_C_VCCMASK|CB_C_VPPMASK)) == 0) {
193974072f41a843678abf5f61979c748687e66bSherry Moore pcic_putb(pcic, socket, PCIC_INTERRUPT, iobits);
193974072f41a843678abf5f61979c748687e66bSherry Moore (orig_cbctl & (CB_C_VCCMASK|CB_C_VPPMASK)) == 0) {
193974072f41a843678abf5f61979c748687e66bSherry Moore pcic_putb(pcic, socket, PCIC_INTERRUPT, iobits);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic socket %d: Power didn't get turned on/off!\n"
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "cbstev = 0x%x cbps = 0x%x cbctl 0x%x(0x%x) "
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(NULL, 6, debp ? "pcic debounce list (%s) lbolt 0x%x:\n" :
3db86aab554edbb4244c8d1a1c90f152eee768afstevel "pcic debounce_list (%s) EMPTY lbolt 0x%x\n", msg, lbolt);
3db86aab554edbb4244c8d1a1c90f152eee768afstevel pcic_err(NULL, 6, "%p: exp 0x%x next 0x%p id 0x%p\n",
3db86aab554edbb4244c8d1a1c90f152eee768afstevel (void *) debp, (int)debp->expire, (void *) debp->next,
3db86aab554edbb4244c8d1a1c90f152eee768afstevel/* PRINTFLIKE3 */
3db86aab554edbb4244c8d1a1c90f152eee768afstevelpcic_err(dev_info_t *dip, int level, const char *fmt, ...)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel#if !defined(PCIC_DEBUG)
3db86aab554edbb4244c8d1a1c90f152eee768afstevel /* name = ddi_binding_name(dip); */