#ifndef __ELINK_H
#define __ELINK_H
#if defined(_VBD_)
#include <SAL.h>
#include "debug.h"
#endif
#ifndef _In_
#define _In_
#endif
#ifndef _Out_
#define _Out_
#endif
/***********************************************************/
/* CLC Call backs functions */
/***********************************************************/
/* CLC device structure */
struct elink_dev;
/* wb_write - pointer to 2 32 bits vars to be passed to the DMAE*/
/* mode - 0( LOW ) /1(HIGH)*/
/* Delay */
/* This function is called every 1024 bytes downloading of phy firmware.
Driver can use it to print to screen indication for download progress */
/* Each log type has its own parameters */
typedef enum elink_log_id {
typedef enum elink_status {
ELINK_STATUS_OK = 0,
#ifndef EDEBUG
#endif
extern void elink_cb_load_warpcore_microcode(void);
#ifdef ELINK_AUX_POWER
#endif /*ELINK_AUX_POWER */
#ifndef ARRAY_SIZE
#define ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
#endif
/* Debug prints */
#ifdef ELINK_DEBUG
#if defined(_VBD_)
#else
#endif // _VBD_
#else
#endif
/***********************************************************/
/* Defines */
/***********************************************************/
#ifndef DUPLEX_FULL
#endif
#ifndef DUPLEX_HALF
#endif
#define ELINK_SPEED_AUTO_NEG 0
(((ext_phy_config) & PORT_HW_CFG_XGXS_EXT_PHY_ADDR_MASK) >> \
/* Single Media board contains single external phy */
/* Dual Media board contains two external phy with different media */
#define ELINK_MAXVAL(a, b) (((a) > (b)) ? (a) : (b))
/***********************************************************/
/* Structs */
/***********************************************************/
#define ELINK_INT_PHY 0
/* Same configuration is shared between the XGXS and the first external phy */
0 : (_phy_idx - 1))
/***********************************************************/
/* elink_phy struct */
/* Defines the required arguments and function per phy */
/***********************************************************/
struct elink_vars;
struct elink_params;
struct elink_phy;
struct elink_vars *vars);
struct elink_vars *vars);
struct elink_params *params);
struct elink_params *params);
struct elink_reg_set {
};
struct elink_phy {
/* Loaded during init */
/* No Over-Current detection */
/* Fan failure detection required */
/* Initialize first the XGXS and only then the phy itself */
/* preemphasis values for the rx side */
/* preemphasis values for the tx side */
/* EMAC address for access MDIO */
/* The address in which version is located*/
duplex, flow control negotiation, etc. */
/* Called due to interrupt. It determines the link, speed */
/* Called when driver is unloading. Should reset the phy */
/* Set the loopback configuration for the phy */
/* Format the given raw number into str up to len */
/* Reset the phy (both ports) */
/* PHY Specific tasks */
};
/* Inputs parameters to the CLC */
struct elink_params {
/* Default / User Configuration */
#define ELINK_LOOPBACK_NONE 0
/* Device parameters */
/* shmem parameters */
/* Phy register parameter */
/* features */
/* Will be populated during common init */
/* Will be populated during common init */
/* Used to configure the EEE Tx LPI timer, has several modes of
* operation, according to bits 29:28 -
* 2'b00: Timer will be configured by nvram, output will be the value
* from nvram.
* 2'b01: Timer will be configured by nvram, output will be in
* microseconds.
* 2'b10: bits 1:0 contain an nvram value which will be used instead
* of the one located in the nvram. Output will be that value.
* 2'b11: bits 19:0 contain the idle timer in microseconds; output
* will be in microseconds.
* Bits 31:30 should be 2'b11 in order for EEE to be enabled.
*/
/* Device pointer passed to all callback functions */
req_flow_ctrl is set to AUTO */
/* The same definitions as the shmem2 parameter */
};
/* Output parameters */
struct elink_vars {
#define ELINK_MAC_TYPE_NONE 0
/* The same definitions as the shmem parameter */
};
/***********************************************************/
/* Functions */
/***********************************************************/
#ifndef EXCLUDE_LINK_RESET
/* Reset the link. Should be called when driver or interface goes down
Before calling phy firmware upgrade, the reset_ext_phy should be set
to 0 */
#endif
/* elink_link_update should be called upon link interrupt */
ELINK_DEFAULT_PHY_DEV_ADDR as devad, and (_bank + (_addr & 0xf)) as
the register */
/* Reads the link_status from the shmem,
and update the link vars accordingly */
struct elink_vars *output);
#ifdef ELINK_ENHANCEMENTS
/* returns string representing the fw_version of the external phy */
#endif
Basically, the CLC takes care of the led for the link, but in case one needs
blink the led, and ELINK_LED_MODE_OFF to set the led off.*/
#define ELINK_LED_MODE_OFF 0
#ifdef ELINK_ENHANCEMENTS
/* elink_handle_module_detect_int should be called upon module detection
interrupt */
/* Get the actual link status. In case it returns ELINK_STATUS_OK, link is up,
otherwise link is down*/
#endif
/* One-time initialization for external phy after power up */
/* Reset the external PHY using GPIO */
#ifdef ELINK_ENHANCEMENTS
/* Reset the external of SFX7101 */
#endif
/* Read "byte_cnt" bytes from address "addr" from the SFP+ EEPROM */
/* Check swap bit and adjust PHY order */
#ifndef EXCLUDE_COMMON_INIT
/* Probe the phys on board, and populate them in "params" */
/* Checks if fan failure detection is required on one of the phys on board */
/* Open / close the gate between the NIG and the BRB */
#endif /* EXCLUDE_COMMON_INIT */
/* DCBX structs */
/* Number of maximum COS per chip */
#define ELINK_DCBX_E3B0_MAX_NUM_COS ( \
#define ELINK_DCBX_MAX_NUM_COS ( \
/* PFC port configuration params */
struct elink_nig_brb_pfc_port_params {
/* NIG */
};
/* ETS port configuration params */
struct elink_ets_bw_params {
};
struct elink_ets_sp_params {
/**
* valid values are 0 - 5. 0 is highest strict priority.
* There can't be two COS's with the same pri.
*/
};
enum elink_cos_state {
};
struct elink_ets_cos_params {
union {
} params;
};
struct elink_ets_params {
};
/* Used to update the PFC attributes in EMAC, BMAC, NIG and BRB
* when link is already up
*/
struct elink_vars *vars,
struct elink_nig_brb_pfc_port_params *pfc_params);
/* Used to configure the ETS to disable */
struct elink_vars *vars);
/* Used to configure the ETS to BW limited */
/* Used to configure the ETS to strict */
/* Configure the COS to ETS according to BW and SP settings.*/
const struct elink_vars *vars,
struct elink_ets_params *ets_params);
/* Read pfc statistic*/
#ifndef BNX2X_UPSTREAM /* ! BNX2X_UPSTREAM */
#endif
#ifndef BNX2X_ADD /* ! BNX2X_ADD */
struct elink_params *params);
#endif
#ifndef BNX2X_ADD /* ! BNX2X_ADD */
#endif
#ifndef EXCLUDE_FROM_BNX2X
#endif /* EXCLUDE_FROM_BNX2X */
#ifdef ELINK_AUX_POWER
struct elink_params *params);
#endif
#endif /* __ELINK_H */