Searched refs:outw (Results 1 - 25 of 37) sorted by relevance

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/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A D3c595.c73 outw(RX_DISABLE, BASE + VX_COMMAND);
74 outw(RX_DISCARD_TOP_PACK, BASE + VX_COMMAND);
76 outw(TX_DISABLE, BASE + VX_COMMAND);
77 outw(STOP_TRANSCEIVER, BASE + VX_COMMAND);
79 outw(RX_RESET, BASE + VX_COMMAND);
81 outw(TX_RESET, BASE + VX_COMMAND);
83 outw(C_INTR_LATCH, BASE + VX_COMMAND);
84 outw(SET_RD_0_MASK, BASE + VX_COMMAND);
85 outw(SET_INTR_MASK, BASE + VX_COMMAND);
86 outw(SET_RX_FILTE
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H A D3c90x.c265 outw(val, ioaddr + regCommandIntStatus_w);
305 outw(address + ((0x02)<<6), ioaddr + regEepromCommand_0_w);
329 outw(0x30, ioaddr + regEepromCommand_0_w);
333 outw(address + ((0x03)<<6), ioaddr + regEepromCommand_0_w);
337 outw(value, ioaddr + regEepromData_0_w);
338 outw(0x30, ioaddr + regEepromCommand_0_w);
342 outw(address + ((0x01)<<6), ioaddr + regEepromCommand_0_w);
416 outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+0);
417 outw(0, INF_3C90X.IOAddr + regStationMask_2_3w+2);
418 outw(
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H A Deepro100.c338 outw(EE_ENB, ee_addr); udelay(2);
339 outw(EE_ENB | EE_SHIFT_CLK, ee_addr); udelay(2);
344 outw(dataval, ee_addr); udelay(2);
345 outw(dataval | EE_SHIFT_CLK, ee_addr); udelay(2);
348 outw(EE_ENB, ee_addr); udelay(2);
351 outw(EE_ENB & ~EE_CS, ee_addr);
399 outw(status & 0xfc00, ioaddr + SCBStatus);
429 outw(INT_MASK | CU_START, ioaddr + SCBCmd);
517 outw(INT_MASK | RX_START, ioaddr + SCBCmd);
557 outw(INT_MAS
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H A Dsundance.c324 outw(inw(BASE + MACCtrl0) | EnbFullDuplex,
337 outw(inw(BASE + MACCtrl0) | duplex ? 0x20 : 0,
403 outw(addr16, BASE + StationAddr);
405 outw(addr16, BASE + StationAddr + 2);
407 outw(addr16, BASE + StationAddr + 4);
410 outw(sdc->mtu + 14, BASE + MaxFrameSize);
416 outw(0, BASE + DownCounter);
424 outw(RxEnable | TxEnable, BASE + MACCtrl1);
458 outw(intr_status, nic->ioaddr + IntrEnable);
461 outw(
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H A Dtlan.h398 outw(internal_addr, base_addr + TLAN_DIO_ADR);
408 outw(internal_addr, base_addr + TLAN_DIO_ADR);
418 outw(internal_addr, base_addr + TLAN_DIO_ADR);
428 outw(internal_addr, base_addr + TLAN_DIO_ADR);
438 outw(internal_addr, base_addr + TLAN_DIO_ADR);
439 outw(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2));
448 outw(internal_addr, base_addr + TLAN_DIO_ADR);
H A Drtl8139.c364 outw(0, nic->ioaddr + IntrMask);
402 outw(status & (TxOK | TxErr | PCIErr), nic->ioaddr + IntrStatus);
438 outw(status & ~(RxFIFOOver | RxOverflow | RxOK), nic->ioaddr + IntrStatus);
478 outw(cur_rx - 16, nic->ioaddr + RxBufPtr);
482 outw(status & (RxFIFOOver | RxOverflow | RxOK), nic->ioaddr + IntrStatus);
498 outw(mask, nic->ioaddr + IntrMask);
H A Dvia-rhine.c821 outw (ReadMIItmp, wMIIDATA);
902 outw(intr_status, nic->ioaddr + IntrEnable);
905 outw(0x0010, nic->ioaddr + 0x84);
1033 outw (CR_FDX, byCR0);
1167 outw (0x0000, byIMR0);
1179 outw (CR_FDX, byCR0);
1185 outw ((CRbak | CR_STRT | CR_TXON | CR_RXON | CR_DPOLL), byCR0);
1188 outw (IMRShadow, byIMR0);
1215 outw(intr_status & 0xffff, nic->ioaddr + IntrStatus);
1241 outw(DEFAULT_INT
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H A Dnatsemi.c463 outw(0x0001, ioaddr + PGSEL);
464 outw(0x189C, ioaddr + PMDCSR);
465 outw(0x0000, ioaddr + TSTDAT);
466 outw(0x5040, ioaddr + DSPCFG);
467 outw(0x008C, ioaddr + SDCFG);
490 outw(nic->node_addr[i] + (nic->node_addr[i+1] << 8), ioaddr + RxFilterData);
H A Dpcnet32.c294 outw(index, addr + PCNET32_WIO_RAP);
300 outw(index, addr + PCNET32_WIO_RAP);
301 outw(val, addr + PCNET32_WIO_RDP);
306 outw(index, addr + PCNET32_WIO_RAP);
312 outw(index, addr + PCNET32_WIO_RAP);
313 outw(val, addr + PCNET32_WIO_BDP);
323 outw(val, addr + PCNET32_WIO_RAP);
333 outw(88, addr + PCNET32_WIO_RAP);
H A Dpnic.c58 outw ( input_length, nic->ioaddr + PNIC_REG_LEN );
65 outw ( command, nic->ioaddr + PNIC_REG_CMD );
H A Dtlan.c374 outw(TLAN_NET_SIO, BASE + TLAN_DIO_ADR);
545 outw(host_int, BASE + TLAN_HOST_INT);
901 outw(data, BASE + TLAN_HOST_CMD);
906 outw(data, BASE + TLAN_HOST_CMD);
964 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
1006 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
1066 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
1194 outw(TLAN_NET_SIO, BASE + TLAN_DIO_ADR);
1272 outw(TLAN_NET_SIO, base_port + TLAN_DIO_ADR);
1311 outw(TLAN_NET_SI
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H A D3c595.h416 #define GO_WINDOW(x) outw(WINDOW_SELECT|(x),BASE+VX_COMMAND)
H A Dpci_io.c64 outw(value, 0xCFC + (where&2));
/illumos-gate/usr/src/uts/i86pc/ml/
H A Damd64.il149 .inline outw,8
152 outw (%dx)
H A Dia32.il136 .inline outw,8
139 outw (%dx)
/illumos-gate/usr/src/uts/intel/asm/
H A Dsunddi.h92 outw(int port, uint16_t value) function
97 "outw (%1)"
/illumos-gate/usr/src/cmd/mdb/intel/amd64/kmdb/
H A Dkmdb_asmutil.s161 outw (%dx)
/illumos-gate/usr/src/cmd/mdb/intel/ia32/kmdb/
H A Dkmdb_asmutil.s175 outw (%dx)
/illumos-gate/usr/src/uts/i86pc/os/
H A Dpci_mech1.c121 outw(PCI_CONFDATA | (reg & 0x2), val);
H A Dpci_mech2.c142 outw(PCI_CADDR2(device, reg), val);
H A Dpci_mech1_amd.c169 outw(PCI_CONFDATA | (reg & 0x2), val);
/illumos-gate/usr/src/boot/sys/boot/i386/gptzfsboot/
H A Dsio.S35 outw %ax,(%dx) # BPS
/illumos-gate/usr/src/uts/intel/sys/
H A Darchsystm.h106 extern void outw(int port, uint16_t value);
/illumos-gate/usr/src/uts/intel/ia32/os/
H A Dddi_i86.c543 outw((uintptr_t)addr, ddi_swap16(value));
798 outw(port, ddi_swap16(*h++));
801 outw(port, ddi_swap16(*h++));
1145 outw((uintptr_t)addr, value);
1193 outw((uintptr_t)addr, ddi_swap16(value));
1618 outw(port, *h++);
1621 outw(port, *h++);
1659 outw(port, ddi_swap16(*h++));
1662 outw(port, ddi_swap16(*h++));
/illumos-gate/usr/src/uts/intel/ia32/ml/
H A Dddi_i86_asm.s558 outw (%dx)
588 outw (%dx)
1257 outw (%dx)
1266 outw (%dx)
1631 outw (%dx)
1663 outw (%dx)

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