8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu/*
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * CDDL HEADER START
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu *
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * The contents of this file are subject to the terms of the
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * Common Development and Distribution License (the "License").
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * You may not use this file except in compliance with the License.
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu *
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * or http://www.opensolaris.org/os/licensing.
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * See the License for the specific language governing permissions
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * and limitations under the License.
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu *
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * When distributing Covered Code, include this CDDL HEADER in each
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * If applicable, add the following below this CDDL HEADER, with the
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * fields enclosed by brackets "[]" replaced with your own identifying
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * information: Portions Copyright [yyyy] [name of copyright owner]
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu *
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * CDDL HEADER END
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu */
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu/*
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * Copyright 2010 Advanced Micro Devices, Inc.
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved.
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu */
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu/*
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * PCI Mechanism 1 low-level routines with ECS support for AMD family >= 0x10
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu */
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu#include <sys/controlregs.h>
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu#include <sys/cpuvar.h>
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu#include <sys/types.h>
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu#include <sys/pci.h>
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu#include <sys/pci_impl.h>
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu#include <sys/sunddi.h>
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu#include <sys/pci_cfgspace_impl.h>
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu#include <sys/x86_archext.h>
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fuboolean_t
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fupci_check_amd_ioecs(void)
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu{
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu struct cpuid_regs cp;
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu int family;
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
7417cfdecea1902cef03c0d61a72df97d945925dKuriakose Kuruvilla if (!is_x86_feature(x86_featureset, X86FSET_CPUID))
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return (B_FALSE);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu /*
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * Get the CPU vendor string from CPUID.
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * This PCI mechanism only applies to AMD CPUs.
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu */
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu cp.cp_eax = 0;
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu (void) __cpuid_insn(&cp);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu if ((cp.cp_ebx != 0x68747541) || /* Auth */
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu (cp.cp_edx != 0x69746e65) || /* enti */
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu (cp.cp_ecx != 0x444d4163)) /* cAMD */
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return (B_FALSE);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu /*
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * Get the CPU family from CPUID.
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * This PCI mechanism is only available on family 0x10 or higher.
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu */
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu cp.cp_eax = 1;
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu (void) __cpuid_insn(&cp);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu family = ((cp.cp_eax >> 8) & 0xf) + ((cp.cp_eax >> 20) & 0xff);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu if (family < 0x10)
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return (B_FALSE);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu /*
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * Set the EnableCf8ExtCfg bit in the Northbridge Configuration Register
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * to enable accessing PCI ECS using in/out instructions.
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu */
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu wrmsr(MSR_AMD_NB_CFG, rdmsr(MSR_AMD_NB_CFG) | AMD_GH_NB_CFG_EN_ECS);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return (B_TRUE);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu}
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu/*
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * Macro to setup PCI Extended Configuration Space (ECS) address to give to
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * "in/out" instructions
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu */
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu#define PCI_CADDR1_ECS(b, d, f, r) \
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu (PCI_CADDR1((b), (d), (f), (r)) | ((((r) >> 8) & 0xf) << 24))
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu/*
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * Per PCI 2.1 section 3.7.4.1 and PCI-PCI Bridge Architecture 1.0 section
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * 5.3.1.2: dev=31 func=7 reg=0 means a special cycle. We don't want to
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * trigger that by accident, so we pretend that dev 31, func 7 doesn't
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * exist. If we ever want special cycle support, we'll add explicit
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu * special cycle support.
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu */
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fuuint8_t
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fupci_mech1_amd_getb(int bus, int device, int function, int reg)
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu{
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu uint8_t val;
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu if (device == PCI_MECH1_SPEC_CYCLE_DEV &&
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu function == PCI_MECH1_SPEC_CYCLE_FUNC) {
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return (0xff);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu }
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu mutex_enter(&pcicfg_mutex);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu val = inb(PCI_CONFDATA | (reg & 0x3));
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu mutex_exit(&pcicfg_mutex);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return (val);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu}
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fuuint16_t
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fupci_mech1_amd_getw(int bus, int device, int function, int reg)
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu{
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu uint16_t val;
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu if (device == PCI_MECH1_SPEC_CYCLE_DEV &&
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu function == PCI_MECH1_SPEC_CYCLE_FUNC) {
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return (0xffff);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu }
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu mutex_enter(&pcicfg_mutex);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu val = inw(PCI_CONFDATA | (reg & 0x2));
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu mutex_exit(&pcicfg_mutex);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return (val);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu}
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fuuint32_t
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fupci_mech1_amd_getl(int bus, int device, int function, int reg)
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu{
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu uint32_t val;
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu if (device == PCI_MECH1_SPEC_CYCLE_DEV &&
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu function == PCI_MECH1_SPEC_CYCLE_FUNC) {
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return (0xffffffffu);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu }
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu mutex_enter(&pcicfg_mutex);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu val = inl(PCI_CONFDATA);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu mutex_exit(&pcicfg_mutex);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return (val);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu}
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fuvoid
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fupci_mech1_amd_putb(int bus, int device, int function, int reg, uint8_t val)
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu{
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu if (device == PCI_MECH1_SPEC_CYCLE_DEV &&
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu function == PCI_MECH1_SPEC_CYCLE_FUNC) {
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return;
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu }
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu mutex_enter(&pcicfg_mutex);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu outb(PCI_CONFDATA | (reg & 0x3), val);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu mutex_exit(&pcicfg_mutex);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu}
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fuvoid
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fupci_mech1_amd_putw(int bus, int device, int function, int reg, uint16_t val)
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu{
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu if (device == PCI_MECH1_SPEC_CYCLE_DEV &&
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu function == PCI_MECH1_SPEC_CYCLE_FUNC) {
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return;
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu }
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu mutex_enter(&pcicfg_mutex);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu outw(PCI_CONFDATA | (reg & 0x2), val);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu mutex_exit(&pcicfg_mutex);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu}
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fuvoid
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fupci_mech1_amd_putl(int bus, int device, int function, int reg, uint32_t val)
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu{
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu if (device == PCI_MECH1_SPEC_CYCLE_DEV &&
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu function == PCI_MECH1_SPEC_CYCLE_FUNC) {
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu return;
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu }
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu mutex_enter(&pcicfg_mutex);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu outl(PCI_CONFDATA, val);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu mutex_exit(&pcicfg_mutex);
8d7fafffed373567f52062b634e61fd50858b8d9Zhi-Jun Robin Fu}