/**************************************************************************
*
* sundance.c -- Etherboot device driver for the Sundance ST201 "Alta".
* Written 2002-2002 by Timothy Legge <tlegge@rogers.com>
*
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Portions of this code based on:
* sundance.c: A Linux device driver for the Sundance ST201 "Alta"
* Written 1999-2002 by Donald Becker
*
* tulip.c: Tulip and Clone Etherboot Driver
* By Marty Conner
* Copyright (C) 2001 Entity Cyber, Inc.
*
* Linux Driver Version LK1.09a, 10-Jul-2003 (2.4.25)
*
* REVISION HISTORY:
* ================
* v1.1 01-01-2003 timlegge Initial implementation
* v1.7 04-10-2003 timlegge Transfers Linux Kernel (30 sec)
* v1.8 04-13-2003 timlegge Fix multiple transmission bug
* v1.9 08-19-2003 timlegge Support Multicast
* v1.10 01-17-2004 timlegge Initial driver output cleanup
* v1.11 03-21-2004 timlegge Remove unused variables
* v1.12 03-21-2004 timlegge Remove excess MII defines
* v1.13 03-24-2004 timlegge Update to Linux 2.4.25 driver
*
****************************************************************************/
/* to get some global routines like printf */
#include "etherboot.h"
/* to get the interface to the body of the program */
#include "nic.h"
/* to get the PCI support functions, if this is a PCI NIC */
#include "pci.h"
#include "timer.h"
#include "mii.h"
typedef unsigned char u8;
typedef signed char s8;
typedef unsigned short u16;
typedef signed short s16;
typedef unsigned int u32;
typedef signed int s32;
/* Condensed operations for readability. */
/* May need to be moved to mii.h */
struct mii_if_info {
int phy_id;
int advertising;
};
//#define EDEBUG
#ifdef EDEBUG
#else
#define dprintf(x)
#endif
#if defined(__sun)
/* Hack: use grub_strcmp since strcasecmp is undefined */
#endif
/* Set the mtu */
/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
The sundance uses a 64 element hash table based on the Ethernet CRC. */
// static int multicast_filter_limit = 32;
/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
Setting to > 1518 effectively disables this feature.
This chip can receive into any byte alignment buffers, so word-oriented
archs do not need a copy-align of the IP header. */
static int rx_copybreak = 0;
/* Allow forcing the media type */
/* media[] specifies the media type the NIC operates at.
autosense Autosensing active media.
10mbps_hd 10Mbps half duplex.
10mbps_fd 10Mbps full duplex.
100mbps_hd 100Mbps half duplex.
100mbps_fd 100Mbps full duplex.
*/
/* Operational parameters that are set at compile time. */
/* As Etherboot uses a Polling driver we can keep the number of rings
to the minimum number required. In general that is 1 transmit and 4 receive receive rings. However some cards require that
there be a minimum of 2 rings */
/* Operational parameters that usually are not changed. */
/* Time in jiffies before concluding the transmitter is hung. */
/* Offsets to the device registers.
Unlike software-only systems, device drivers interact with complex hardware.
It's not useful to define symbolic names for every register bit in the
device. The name can only partially document the semantics and make
the driver longer and more difficult to read.
In general, only the important configuration values or bits changed
multiple times should be defined symbolically.
*/
enum alta_offsets {
/* Aliased and bogus values! */
};
enum ASICCtrl_HiWord_bit {
};
enum intr_status_bits {
};
/* Bits in the RxMode register. */
enum rx_mode_bits {
0x01,
};
/* Bits in MACCtrl. */
enum mac_ctrl0_bits {
};
enum mac_ctrl1_bits {
};
/* The Rx and Tx buffer descriptors.
Using only 32 bit fields simplifies software endian correction.
This structure must be aligned, and should avoid spanning cache lines.
*/
struct netdev_desc {
};
/* Bits in netdev_desc.status */
enum desc_status_bits {
};
/**********************************************
* Descriptor Ring and Buffer defination
***********************************************/
/* Define the TX Descriptor */
/* Create a static buffer of size PKT_BUF_SZ for each TX Descriptor.
All descriptors point to a part of this buffer */
/* Define the RX Descriptor */
/* Create a static buffer of size PKT_BUF_SZ for each RX Descriptor.
All descriptors point to a part of this buffer */
/* FIXME: Move BASE to the private structure */
enum pci_id_flags_bits {
};
struct sundance_private {
const char *nic_name;
/* Frequently used values */
unsigned int mtu;
/* These values keep track of the tranceiver/media in use */
unsigned int speed;
/* MII tranceiver section */
unsigned char pci_rev_id;
} sdx;
/* Station Address location within the EEPROM */
int value);
{
int duplex;
/* Force media */
return;
}
/* Autonegotiation */
dprintf(("%s: Setting %s-duplex based on MII #%d "
negotiated));
}
}
/**************************************************************************
* init_ring - setup the tx and rx descriptors
*************************************************************************/
{
int i;
/* Initialize all the Rx descriptors */
for (i = 0; i < RX_RING_SIZE; i++) {
}
/* Mark the last entry as wrapping the ring */
for (i = 0; i < RX_RING_SIZE; i++) {
}
/* We only use one transmit buffer, but two
* descriptors so transmit engines have somewhere
* to point should they feel the need */
/* This descriptor is never used */
/* Mark the last entry as wrapping the ring,
* though this should never happen */
}
/**************************************************************************
* RESET - Reset Adapter
* ***********************************************************************/
{
int i;
/* The Tx List Pointer is written as packets are queued */
/* Initialize other registers. */
/* __set_mac_addr(dev); */
{
}
/* Set the chip to poll every N*30nsec */
/* Fix DFE-580TX packet drop issue */
/* Construct a perfect filter frame with the mac address as first match
* and broadcast for all others */
for (i = 0; i < 192; i++)
txb[i] = 0xFF;
dprintf(("%s: Done sundance_reset, status: Rx %hX Tx %hX "
"MAC Control %hX, %hX %hX\n",
}
/**************************************************************************
IRQ - Wait for a frame
***************************************************************************/
unsigned int intr_status;
switch ( action ) {
case DISABLE :
case ENABLE :
break;
case FORCE :
break;
}
}
/**************************************************************************
POLL - Wait for a frame
***************************************************************************/
{
/* return true if there's an ethernet packet ready to read */
/* nic->packet should contain data on return */
/* nic->packetlen should contain length of data */
int intr_status;
int pkt_len = 0;
if (!(frame_status & DescOwn))
return 0;
/* There is a packet ready */
if(!retreive)
return 1;
if (frame_status & 0x001f4000) {
} else {
if (pkt_len < rx_copybreak) {
/* FIXME: What should happen Will this ever occur */
printf("Poll Error: pkt_len < rx_copybreak");
} else {
}
}
entry++;
return 1;
}
/**************************************************************************
TRANSMIT - Transmit a frame
***************************************************************************/
unsigned int t, /* Type */
unsigned int s, /* size */
const char *p)
{ /* Packet */
/* Disable the Tx */
s += ETH_HLEN;
s &= 0x0FFF;
while (s < ETH_ZLEN)
txb[s++] = '\0';
/* Setup the transmit descriptor */
/* Point to transmit descriptor */
/* Enable Tx */
/* Trigger an immediate send */
printf("TX Time Out");
}
/* Disable Tx */
}
/**************************************************************************
DISABLE - Turn off ethernet interface
***************************************************************************/
{
/* put the card in its initial state */
/* This function serves 3 purposes.
* This disables DMA and interrupts so we don't receive
* unexpected packets or interrupts from the card after
* etherboot has finished.
* This frees resources so etherboot may use
* this driver on another interface
* This allows etherboot to reinitialize the interface
* if something is something goes wrong.
*/
/* Stop the Chipchips Tx and Rx Status */
}
/**************************************************************************
PROBE - Look for an adapter, this routine's visible to the outside
***************************************************************************/
{
int i;
int speed;
return 0;
/* BASE is used throughout to address the card */
printf(" sundance.c: Found %s Vendor=0x%hX Device=0x%hX\n",
/* Get the MAC Address by reading the EEPROM */
for (i = 0; i < 3; i++) {
}
/* Update the nic structure with the MAC Address */
for (i = 0; i < ETH_ALEN; i++) {
}
/* Set the card as PCI Bus Master */
// sdc->mii_if.dev = pci;
// sdc->mii_if.phy_id_mask = 0x1f;
// sdc->mii_if.reg_num_mask = 0x1f;
/* point to private storage */
/* Print out some hardware info */
sdc->mii_preamble_required = 0;
if (1) {
if ((mii_status & 0x0040) == 0)
(("%s: MII PHY found at address %d, status " "%hX advertising %hX\n", sdc->nic_name, phy, mii_status, sdc->mii_if.advertising));
}
}
if (phy_idx == 0)
printf("%s: No MII transceiver found!\n",
}
/* Parse override configuration */
} else {
}
}
if (flowctrl == 1)
/* Fibre PHY? */
/* Default 100Mbps Full */
}
}
/* The Linux driver uses flow control and resets the link here. This means the
mii section from above would need to be re done I believe. Since it serves
no real purpose leave it out. */
/* Force media type */
mii_ctl = 0;
printf("Override speed=%d, %s duplex\n",
}
/* Reset the chip to erase previous misconfiguration */
mii_advertise &= mii_lpa;
if (mii_advertise & ADVERTISE_100FULL)
else if (mii_advertise & ADVERTISE_100HALF)
else if (mii_advertise & ADVERTISE_10FULL)
else if (mii_advertise & ADVERTISE_10HALF)
} else {
"full" : "half");
}
}
/* point to NIC specific routines */
return 1;
}
/* Read the EEPROM and MII Management Data I/O (MDIO) interfaces. */
{
do {
}
}
while (--boguscnt > 0);
return 0;
}
/* MII transceiver control section.
Read and write the MII registers using software-generated serial
MDIO protocol. See the MII specifications or DP83840A data sheet
for details.
The maximum data clock rate is 2.5 Mhz.
The timing is decoupled from the processor clock by flushing the write
from the CPU write buffer with a following read, and using PCI
transaction time. */
enum mii_reg_bits {
0x0004,
};
#define MDIO_EnbIn (0)
/* Generate the preamble required for initial synchronization and
a few older transceivers. */
{
/* Establish sync by sending at least 32 logic ones. */
while (--bits >= 0) {
}
}
static int
{
int i, retval = 0;
if (sdc->mii_preamble_required)
/* Shift the read command bits out. */
for (i = 15; i >= 0; i--) {
int dataval =
}
/* Read the two transition, 16 data, and wire-idle bits. */
for (i = 19; i > 0; i--) {
? 1 : 0);
}
}
static void
{
int mii_cmd =
int i;
if (sdc->mii_preamble_required)
/* Shift the command bits out. */
for (i = 31; i >= 0; i--) {
int dataval =
}
/* Clear out extra bits. */
for (i = 2; i > 0; i--) {
}
return;
}
{
int i;
for (i = 0; i < 4; i++)
return;
}
};
.type = NIC_DRIVER,
.probe = sundance_probe,
.ids = sundance_nics,
.class = 0,
};